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Searched refs:bridge (Results 1 – 25 of 75) sorted by relevance

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/linux-2.4.37.9/drivers/hotplug/
Dacpiphp_glue.c107 struct acpiphp_bridge *bridge = (struct acpiphp_bridge *)context; in register_slot() local
153 for (slot = bridge->slots; slot; slot = slot->next) in register_slot()
168 slot->bridge = bridge; in register_slot()
175 slot->next = bridge->slots; in register_slot()
176 bridge->slots = slot; in register_slot()
178 bridge->nr_slots++; in register_slot()
181 slot->bridge->bus, slot->device, slot->sun); in register_slot()
188 newfunc->pci_dev = pci_find_slot(bridge->bus, in register_slot()
233 decode_acpi_resource (struct acpi_resource *resource, struct acpiphp_bridge *bridge) in decode_acpi_resource() argument
312 res->next = bridge->p_mem_head; in decode_acpi_resource()
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Dacpiphp_pci.c59 struct acpiphp_bridge *bridge; in init_config_space() local
64 bridge = func->slot->bridge; in init_config_space()
65 bus = bridge->pci_bus; in init_config_space()
86 spin_lock(&bridge->res_lock); in init_config_space()
87 res = acpiphp_get_io_resource(&bridge->io_head, len); in init_config_space()
88 spin_unlock(&bridge->res_lock); in init_config_space()
109 spin_lock(&bridge->res_lock); in init_config_space()
110 res = acpiphp_get_resource(&bridge->p_mem_head, len); in init_config_space()
111 spin_unlock(&bridge->res_lock); in init_config_space()
138 spin_lock(&bridge->res_lock); in init_config_space()
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Dacpiphp.h139 struct acpiphp_bridge *bridge; /* parent */ member
226 extern int acpiphp_check_bridge (struct acpiphp_bridge *bridge);
240 extern int acpiphp_detect_pci_resource (struct acpiphp_bridge *bridge);
252 extern void acpiphp_dump_resource (struct acpiphp_bridge *bridge); /* debug */
/linux-2.4.37.9/arch/ia64/sn/io/sn2/pcibr/
Dpcibr_rrb.c71 #define RRB_ENABLE_BIT(bridge) (0x8) /* [BRIDGE | PIC]_RRB_EN */ argument
72 #define NUM_PDEV_BITS(bridge) (1) argument
73 #define NUM_VDEV_BITS(bridge) (2) argument
74 #define NUMBER_VCHANNELS(bridge) (4) argument
75 #define SLOT_2_PDEV(bridge, slot) ((slot) >> 1) argument
76 #define SLOT_2_RRB_REG(bridge, slot) ((slot) & 0x1) argument
79 #define VALIDATE_SLOT_n_VCHAN(bridge, s, v) \ argument
87 do_pcibr_rrb_count_valid(bridge_t *bridge, in do_pcibr_rrb_count_valid() argument
95 if (!VALIDATE_SLOT_n_VCHAN(bridge, slot, vchan)) { in do_pcibr_rrb_count_valid()
100 enable_bit = RRB_ENABLE_BIT(bridge); in do_pcibr_rrb_count_valid()
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Dpcibr_error.c239 bridge_t *bridge = pcibr_soft->bs_base; in pcibr_error_dump() local
257 int_status_64 = (bridge->p_int_status_64 & ~BRIDGE_ISR_INT_MSK); in pcibr_error_dump()
261 int_status_32 = (bridge->b_int_status & ~BRIDGE_ISR_INT_MSK); in pcibr_error_dump()
315 bridge->p_ate_parity_err_64); in pcibr_error_dump()
321 bridge->b_arb); in pcibr_error_dump()
329 bridge->p_pcix_dma_req_err_addr_64, in pcibr_error_dump()
330 bridge->p_pcix_dma_req_err_attr_64); in pcibr_error_dump()
340 bridge->p_pcix_pio_split_addr_64, in pcibr_error_dump()
341 bridge->p_pcix_pio_split_attr_64); in pcibr_error_dump()
357 bridge->p_pcix_bus_err_addr_64, in pcibr_error_dump()
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Dpcibr_intr.c277 bridge_t *bridge = pcibr_soft->bs_base; in pcibr_force_interrupt() local
287 bridge->b_force_pin[bit].intr = 1; in pcibr_force_interrupt()
304 bridge_t *bridge = pcibr_soft->bs_base; in pcibr_intr_alloc() local
420 int_dev = bridge->b_int_device; in pcibr_intr_alloc()
423 bridge->b_int_device = int_dev; /* XXXMP */ in pcibr_intr_alloc()
456 intr_entry->il_wrbf = &(bridge->b_wr_req_buf[pciio_slot].reg); in pcibr_intr_alloc()
569 bridge_t *bridge = pcibr_soft->bs_base; in pcibr_intr_free() local
578 int_dev = bridge->b_int_device; in pcibr_intr_free()
580 bridge->b_int_device = int_dev; in pcibr_intr_free()
594 bridge_t *bridge; in pcibr_setpciint() local
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Dpcibr_config.c65 pcibr_func_config_addr(bridge_t *bridge, pciio_bus_t bus, pciio_slot_t slot, in pcibr_func_config_addr() argument
72 bridge->b_pci_cfg = ((bus << 16) | (slot << 11)); in pcibr_func_config_addr()
73 return &bridge->b_type1_cfg.f[func].l[(offset)]; in pcibr_func_config_addr()
80 return &bridge->b_type0_cfg_dev[slot].f[func].l[offset]; in pcibr_func_config_addr()
89 pcibr_slot_config_addr(bridge_t *bridge, pciio_slot_t slot, int offset) in pcibr_slot_config_addr() argument
91 return pcibr_func_config_addr(bridge, 0, slot, 0, offset); in pcibr_slot_config_addr()
98 pcibr_slot_config_get(bridge_t *bridge, pciio_slot_t slot, int offset) in pcibr_slot_config_get() argument
102 cfg_base = pcibr_slot_config_addr(bridge, slot, 0); in pcibr_slot_config_get()
110 pcibr_func_config_get(bridge_t *bridge, pciio_slot_t slot, in pcibr_func_config_get() argument
115 cfg_base = pcibr_func_config_addr(bridge, 0, slot, func, 0); in pcibr_func_config_get()
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Dpcibr_ate.c83 pcibr_init_ext_ate_ram(bridge_t *bridge) in pcibr_init_ext_ate_ram() argument
91 old_enable = bridge->b_int_enable; in pcibr_init_ext_ate_ram()
93 bridge->b_int_enable = new_enable; in pcibr_init_ext_ate_ram()
97 bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] = ATE_PROBE_VALUE; in pcibr_init_ext_ate_ram()
101 bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(j) - 1] = 0; in pcibr_init_ext_ate_ram()
104 if (bridge->b_ext_ate_ram[ATE_NUM_ENTRIES(i) - 1] == ATE_PROBE_VALUE) in pcibr_init_ext_ate_ram()
107 bridge->b_int_enable = old_enable; in pcibr_init_ext_ate_ram()
108 bridge->b_wid_tflush; /* wait until Bridge PIO complete */ in pcibr_init_ext_ate_ram()
115 bridge->b_wid_control = (bridge->b_wid_control in pcibr_init_ext_ate_ram()
118 bridge->b_wid_control; /* inval addr bug war */ in pcibr_init_ext_ate_ram()
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Dpcibr_slot.c163 bridge_t *bridge; in pcibr_slot_shutdown() local
178 bridge = pcibr_soft->bs_base; in pcibr_slot_shutdown()
207 if ((bridge->b_wid_control & BRIDGE_CTRL_BUS_SPEED_MASK) == in pcibr_slot_shutdown()
322 bridge_t *bridge = pcibr_soft->bs_base; in pcibr_slot_info_return() local
380 b_respp = &bridge->b_odd_resp; in pcibr_slot_info_return()
382 b_respp = &bridge->b_even_resp; in pcibr_slot_info_return()
387 slotp->resp_b_int_device = bridge->b_int_device; in pcibr_slot_info_return()
390 slotp->resp_p_int_enable = bridge->p_int_enable_64; in pcibr_slot_info_return()
391 slotp->resp_p_int_host = bridge->p_int_addr_64[slot]; in pcibr_slot_info_return()
393 slotp->resp_b_int_enable = bridge->b_int_enable; in pcibr_slot_info_return()
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Dpcibr_dvr.c279 bridge_t *bridge; in pcibr_try_set_device() local
304 bridge = pcibr_soft->bs_base; in pcibr_try_set_device()
505 bridge->b_device[slot].reg = new; in pcibr_try_set_device()
507 bridge->b_wid_tflush; /* wait until Bridge PIO complete */ in pcibr_try_set_device()
554 bridge_t *bridge; in pcibr_mmap() local
564 bridge = pcibr_soft->bs_base; in pcibr_mmap()
565 phys_addr = (unsigned long)bridge & ~0xc000000000000000; /* Mask out the Uncache bits */ in pcibr_mmap()
701 bridge_t *bridge; in pcibr_device_unregister() local
713 bridge = pcibr_soft->bs_base; in pcibr_device_unregister()
739 do_pcibr_rrb_free_all(pcibr_soft, bridge, slot); in pcibr_device_unregister()
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/linux-2.4.37.9/drivers/pci/
Dsetup-bus.c92 struct pci_dev *bridge = bus->self; in pci_setup_bridge() local
95 if (!bridge || (bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_setup_bridge()
107 bus->number, bridge->name)); in pci_setup_bridge()
111 pci_read_config_dword(bridge, PCI_IO_BASE, &l); in pci_setup_bridge()
116 pci_write_config_word(bridge, PCI_IO_BASE_UPPER16, in pci_setup_bridge()
118 pci_write_config_word(bridge, PCI_IO_LIMIT_UPPER16, in pci_setup_bridge()
125 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0); in pci_setup_bridge()
129 pci_write_config_dword(bridge, PCI_IO_BASE, l); in pci_setup_bridge()
143 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); in pci_setup_bridge()
146 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, 0); in pci_setup_bridge()
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/linux-2.4.37.9/arch/mips/sgi-ip27/
Dip27-pci.c48 bridge_t *bridge; \
55 bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id], \
66 addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2]; \
93 bridge_t *bridge; \
100 bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id], \
109 addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2]; \
242 bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id], in pci_disable_swapping() local
247 bridge->b_device[slot].reg &= ~BRIDGE_DEV_SWAP_DIR; in pci_disable_swapping()
248 bridge->b_widget.w_tflush; /* Flush */ in pci_disable_swapping()
254 bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id], in pci_enable_swapping() local
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Dip27-setup.c118 bridge_t *bridge; in pcibr_setup() local
251 bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[i],bus_to_wid[i]); in pcibr_setup()
255 bridge->b_int_rst_stat = (BRIDGE_IRR_ALL_CLR); in pcibr_setup()
259 bridge->b_int_device = (u32) 0x0; in pcibr_setup()
263 bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP; in pcibr_setup()
264 bridge->b_wid_control |= BRIDGE_CTRL_MEM_SWAP; in pcibr_setup()
270 bridge->b_int_mode = 0x0; /* Don't clear ints */ in pcibr_setup()
271 bridge->b_wid_int_upper = 0x8000 | (masterwid << 16); in pcibr_setup()
272 bridge->b_wid_int_lower = 0x01800090; /* PI_INT_PEND_MOD off*/ in pcibr_setup()
273 bridge->b_dir_map = (masterwid << 20); /* DMA */ in pcibr_setup()
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Dip27-irq.c189 bridge_t *bridge; in startup_bridge_irq() local
197 bridge = (bridge_t *) NODE_SWIN_BASE(master, WID_FROM_PCI_IRQ(irq)); in startup_bridge_irq()
209 bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (master << 8)); in startup_bridge_irq()
210 bridge->b_int_enable |= (1 << pin); in startup_bridge_irq()
212 bridge->b_int_enable |= 0x7ffffe00; in startup_bridge_irq()
219 device = bridge->b_int_device; in startup_bridge_irq()
221 bridge->b_int_device = device; in startup_bridge_irq()
223 bridge->b_widget.w_tflush; /* Flush */ in startup_bridge_irq()
231 bridge_t *bridge; in shutdown_bridge_irq() local
238 bridge = (bridge_t *) NODE_SWIN_BASE(NASID_FROM_PCI_IRQ(irq), in shutdown_bridge_irq()
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/linux-2.4.37.9/drivers/acpi/
Dpci_irq.c285 struct pci_dev *bridge = dev; in acpi_pci_irq_derive() local
298 while (!irq && bridge->bus->self) { in acpi_pci_irq_derive()
299 pin = (pin + PCI_SLOT(bridge->devfn)) % 4; in acpi_pci_irq_derive()
300 bridge = bridge->bus->self; in acpi_pci_irq_derive()
302 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) { in acpi_pci_irq_derive()
304 pci_read_config_byte(bridge, PCI_INTERRUPT_PIN, &bridge_pin); in acpi_pci_irq_derive()
308 pci_name(bridge))); in acpi_pci_irq_derive()
316 irq = acpi_pci_irq_lookup(0, bridge->bus->number, in acpi_pci_irq_derive()
317 PCI_SLOT(bridge->devfn), pin); in acpi_pci_irq_derive()
326 irq, pci_name(dev), pci_name(bridge))); in acpi_pci_irq_derive()
/linux-2.4.37.9/drivers/pcmcia/
Dcardbus.c371 static void program_bridge(struct pci_dev *bridge) in program_bridge() argument
376 pci_read_config_dword(bridge, PCI_IO_BASE, &l); in program_bridge()
378 l |= (bridge->resource[7].start >> 8) & 0x00f0; in program_bridge()
379 l |= bridge->resource[7].end & 0xf000; in program_bridge()
380 pci_write_config_dword(bridge, PCI_IO_BASE, l); in program_bridge()
383 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0); in program_bridge()
386 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, 0); in program_bridge()
387 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0); in program_bridge()
391 l = (bridge->resource[8].start >> 16) & 0xfff0; in program_bridge()
392 l |= bridge->resource[8].end & 0xfff00000; in program_bridge()
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DConfig.in20 bool ' Databook TCIC host bridge support' CONFIG_TCIC
22 dep_tristate ' HD64465 host bridge support' CONFIG_HD64465_PCMCIA $CONFIG_PCMCIA
24 dep_bool ' i82092 compatible bridge support' CONFIG_I82092 $CONFIG_PCI
25 bool ' i82365 compatible bridge support' CONFIG_I82365
/linux-2.4.37.9/arch/ia64/sn/io/sn2/
Dshub_intr.c209 bridge_t *bridge = intr->bi_soft->bs_base; in sn_shub_redirect_intr() local
227 int_enable = bridge->p_int_enable_64; in sn_shub_redirect_intr()
229 bridge->p_int_enable_64 = int_enable; in sn_shub_redirect_intr()
231 host_addr = bridge->p_int_addr_64[bit]; in sn_shub_redirect_intr()
234 bridge->p_int_addr_64[bit] = host_addr; in sn_shub_redirect_intr()
237 bridge->p_int_enable_64 = int_enable; in sn_shub_redirect_intr()
239 bridge->b_force_pin[bit].intr = 1; in sn_shub_redirect_intr()
/linux-2.4.37.9/arch/mips/pci/
Dpci.c223 unsigned long __init pci_bridge_check_io(struct pci_dev *bridge) in pci_bridge_check_io() argument
227 pci_read_config_word(bridge, PCI_IO_BASE, &io); in pci_bridge_check_io()
229 pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0); in pci_bridge_check_io()
230 pci_read_config_word(bridge, PCI_IO_BASE, &io); in pci_bridge_check_io()
231 pci_write_config_word(bridge, PCI_IO_BASE, 0x0); in pci_bridge_check_io()
236 bridge->name); in pci_bridge_check_io()
/linux-2.4.37.9/Documentation/networking/
Dbridge.txt3 at http://bridge.sourceforge.net. The download page is
4 http://prdownloads.sourceforge.net/bridge.
7 (more info http://lists.osdl.org/mailman/listinfo/bridge).
/linux-2.4.37.9/drivers/mtd/maps/
Dscx200_docflash.c126 struct pci_dev *bridge; in init_scx200_docflash() local
130 if ((bridge = pci_find_device(PCI_VENDOR_ID_NS, in init_scx200_docflash()
142 pci_read_config_dword(bridge, SCx200_DOCCS_BASE, &base); in init_scx200_docflash()
143 pci_read_config_dword(bridge, SCx200_DOCCS_CTRL, &ctrl); in init_scx200_docflash()
195 pci_write_config_dword(bridge, SCx200_DOCCS_BASE, docmem.start); in init_scx200_docflash()
196 pci_write_config_dword(bridge, SCx200_DOCCS_CTRL, ctrl); in init_scx200_docflash()
/linux-2.4.37.9/arch/sh64/kernel/
Dpci_sh5.c472 struct pci_dev *bridge = bus->self; in pcibios_size_bridge() local
475 if (!bridge) in pcibios_size_bridge()
525 bridge->resource[0].end = bridge->resource[0].start + inner.io_end; in pcibios_size_bridge()
526 bridge->resource[1].end = bridge->resource[1].start + inner.mem_end; in pcibios_size_bridge()
528 bridge->resource[PCI_BRIDGE_RESOURCES].end = in pcibios_size_bridge()
529 bridge->resource[PCI_BRIDGE_RESOURCES].start + inner.io_end; in pcibios_size_bridge()
530 bridge->resource[PCI_BRIDGE_RESOURCES+1].end = in pcibios_size_bridge()
531 bridge->resource[PCI_BRIDGE_RESOURCES+1].start + inner.mem_end; in pcibios_size_bridge()
/linux-2.4.37.9/drivers/char/
Dscx200.c81 struct pci_dev *bridge; in scx200_init() local
87 if ((bridge = pci_find_device(PCI_VENDOR_ID_NS, in scx200_init()
92 base = pci_resource_start(bridge, 0); in scx200_init()
/linux-2.4.37.9/drivers/ide/pci/
Dsl82c105.c375 struct pci_dev *bridge; in sl82c105_bridge_revision() local
381 bridge = pci_find_slot(dev->bus->number, in sl82c105_bridge_revision()
383 if (!bridge) in sl82c105_bridge_revision()
389 if (bridge->vendor != PCI_VENDOR_ID_WINBOND || in sl82c105_bridge_revision()
390 bridge->device != PCI_DEVICE_ID_WINBOND_83C553 || in sl82c105_bridge_revision()
391 bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) in sl82c105_bridge_revision()
397 pci_read_config_byte(bridge, PCI_REVISION_ID, &rev); in sl82c105_bridge_revision()
/linux-2.4.37.9/arch/i386/kernel/
Dpci-irq.c623 struct pci_dev *bridge; in pirq_bios_set() local
624 int pin = pci_get_interrupt_pin(dev, &bridge); in pirq_bios_set()
625 return pcibios_set_irq_routing(bridge, pin, irq); in pirq_bios_set()
1133 struct pci_dev * bridge = dev->bus->self; in pcibios_fixup_irqs() local
1136 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number, in pcibios_fixup_irqs()
1137 PCI_SLOT(bridge->devfn), pin); in pcibios_fixup_irqs()
1140 bridge->bus->number, PCI_SLOT(bridge->devfn), pin, irq); in pcibios_fixup_irqs()
1195 struct pci_dev * bridge = dev->bus->self; in pcibios_enable_irq() local
1198 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number, in pcibios_enable_irq()
1199 PCI_SLOT(bridge->devfn), pin); in pcibios_enable_irq()
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