277 	bridge_t       *bridge = pcibr_soft->bs_base;  in pcibr_force_interrupt()  local
287 	    			bridge->b_force_pin[bit].intr = 1;  in pcibr_force_interrupt()
304     bridge_t               *bridge = pcibr_soft->bs_base;  in pcibr_intr_alloc()  local
420 		    int_dev = bridge->b_int_device;  in pcibr_intr_alloc()
423 		    bridge->b_int_device = int_dev;	/* XXXMP */  in pcibr_intr_alloc()
456 	    intr_entry->il_wrbf = &(bridge->b_wr_req_buf[pciio_slot].reg);  in pcibr_intr_alloc()
569 		bridge_t 	*bridge = pcibr_soft->bs_base;  in pcibr_intr_free()  local
578 		int_dev = bridge->b_int_device;  in pcibr_intr_free()
580 		bridge->b_int_device = int_dev;  in pcibr_intr_free()
594     bridge_t		*bridge;  in pcibr_setpciint()  local
600     bridge = (bridge_t *)xtalk_piotrans_addr(vhdl, 0, 0, sizeof(bridge_t), 0);  in pcibr_setpciint()
612     bridge_t               *bridge = pcibr_soft->bs_base;  in pcibr_intr_connect()  local
657 		int_addr = (void *)&(bridge->p_int_addr_64[pcibr_int_bit]);  in pcibr_intr_connect()
659 		int_addr = (void *)&(bridge->b_int_addr[pcibr_int_bit].addr);  in pcibr_intr_connect()
680 	    int_enable = bridge->p_int_enable_64;  in pcibr_intr_connect()
682 	    bridge->p_int_enable_64 = int_enable;  in pcibr_intr_connect()
686 	    int_enable = bridge->b_int_enable;  in pcibr_intr_connect()
688 	    bridge->b_int_enable = int_enable;  in pcibr_intr_connect()
690 	bridge->b_wid_tflush;	/* wait until Bridge PIO complete */  in pcibr_intr_connect()
701     bridge_t               *bridge = pcibr_soft->bs_base;  in pcibr_intr_disconnect()  local
734 	int_enable = bridge->p_int_enable_64;  in pcibr_intr_disconnect()
736 	bridge->p_int_enable_64 = int_enable;  in pcibr_intr_disconnect()
738 	int_enable = (uint64_t)bridge->b_int_enable;  in pcibr_intr_disconnect()
740 	bridge->b_int_enable = (bridgereg_t)int_enable;  in pcibr_intr_disconnect()
742     bridge->b_wid_tflush;		/* wait until Bridge PIO complete */  in pcibr_intr_disconnect()
779                 int_addr = (void *)&(bridge->p_int_addr_64[pcibr_int_bit]);  in pcibr_intr_disconnect()
781                 int_addr = (void *)&(bridge->b_int_addr[pcibr_int_bit].addr);  in pcibr_intr_disconnect()
811 pcibr_clearwidint(bridge_t *bridge)  in pcibr_clearwidint()  argument
813     bridge->b_wid_int_upper = 0;  in pcibr_clearwidint()
814     bridge->b_wid_int_lower = 0;  in pcibr_clearwidint()
827     bridge_t               *bridge = (bridge_t *)xtalk_intr_sfarg_get(intr);  in pcibr_setwidint()  local
833     OLD_b_wid_int_upper = bridge->b_wid_int_upper;  in pcibr_setwidint()
834     OLD_b_wid_int_lower = bridge->b_wid_int_lower;  in pcibr_setwidint()
855 		printk(KERN_WARNING  "bridge=0x%lx targ=0x%x\n", (unsigned long)bridge, targ);  in pcibr_setwidint()
863     bridge->b_wid_int_upper = NEW_b_wid_int_upper;  in pcibr_setwidint()
864     bridge->b_wid_int_lower = NEW_b_wid_int_lower;  in pcibr_setwidint()
865     bridge->b_int_host_err = vect;  in pcibr_setwidint()
882     bridge_t               *bridge = (bridge_t *) which_widget;  in pcibr_xintr_preset()  local
886 	bridge->b_wid_int_upper = ( (0x000F0000 & (targ << 16)) |  in pcibr_xintr_preset()
888 	bridge->b_wid_int_lower = XTALK_ADDR_TO_LOWER(addr);  in pcibr_xintr_preset()
889 	bridge->b_int_host_err = vect;  in pcibr_xintr_preset()
898 	bridge->b_int_enable |= ~BRIDGE_IMR_INT_MSK;  in pcibr_xintr_preset()
906 	bridge->b_int_addr[which_widget_intr].addr =  in pcibr_xintr_preset()
915 	bridge->b_int_enable |= 1 << vect;  in pcibr_xintr_preset()
917     bridge->b_wid_tflush;		/* wait until Bridge PIO complete */  in pcibr_xintr_preset()
943     bridge_t               *bridge = pcibr_soft->bs_base;  in pcibr_intr_func()  local
961 		bridge->p_int_enable_64 = p_enable;  in pcibr_intr_func()
963 		bridge->p_int_enable_64 = p_enable;  in pcibr_intr_func()
1055 	    bridge_t               *bridge = pcibr_soft->bs_base;  in pcibr_intr_func()  local
1066 		int_enable = bridge->p_int_enable_64;  in pcibr_intr_func()
1068 		bridge->p_int_enable_64 = int_enable;  in pcibr_intr_func()
1070 		int_enable = (uint64_t)bridge->b_int_enable;  in pcibr_intr_func()
1072 		bridge->b_int_enable = (bridgereg_t)int_enable;  in pcibr_intr_func()
1074 	    bridge->b_wid_tflush;	/* wait until Bridge PIO complete */  in pcibr_intr_func()