Searched refs:LPSC (Results 1 – 8 of 8) sorted by relevance
44 LPSC(1, 0, vpss_slave, pll1_sysclk5, vpss_slave_clkdev, 0),45 LPSC(5, 0, timer3, pll1_auxclk, NULL, 0),46 LPSC(6, 0, spi1, pll1_sysclk4, spi1_clkdev, 0),47 LPSC(7, 0, mmcsd1, pll1_sysclk4, mmcsd1_clkdev, 0),48 LPSC(8, 0, asp0, pll1_sysclk4, asp0_clkdev, 0),49 LPSC(9, 0, usb, pll1_auxclk, usb_clkdev, 0),50 LPSC(10, 0, pwm3, pll1_auxclk, NULL, 0),51 LPSC(11, 0, spi2, pll1_sysclk4, spi2_clkdev, 0),52 LPSC(12, 0, rto, pll1_sysclk4, NULL, 0),53 LPSC(14, 0, aemif, pll1_sysclk4, aemif_clkdev, 0),[all …]
40 LPSC(0, 0, vpss_master, pll1_sysclk4, vpss_master_clkdev, 0),41 LPSC(1, 0, vpss_slave, pll1_sysclk4, vpss_slave_clkdev, 0),42 LPSC(5, 0, timer3, pll1_auxclk, NULL, 0),43 LPSC(6, 0, spi1, pll1_sysclk2, spi1_clkdev, 0),44 LPSC(7, 0, mmcsd1, pll1_sysclk2, mmcsd1_clkdev, 0),45 LPSC(8, 0, asp1, pll1_sysclk2, mcbsp1_clkdev, 0),46 LPSC(9, 0, usb, pll1_sysclk2, usb_clkdev, 0),47 LPSC(10, 0, pwm3, pll1_auxclk, NULL, 0),48 LPSC(11, 0, spi2, pll1_sysclk2, spi2_clkdev, 0),49 LPSC(12, 0, rto, pll1_auxclk, NULL, 0),[all …]
23 LPSC(0, 0, tpcc, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),24 LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),25 LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),26 LPSC(3, 0, aemif, pll0_sysclk3, aemif_clkdev, LPSC_ALWAYS_ENABLED),27 LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0),28 LPSC(5, 0, mmcsd, pll0_sysclk2, mmcsd_clkdev, 0),29 LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED),30 LPSC(7, 0, arm_rom, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),31 LPSC(8, 0, secu_mgr, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED),32 LPSC(9, 0, uart0, pll0_sysclk2, uart0_clkdev, 0),[all …]
28 LPSC(0, 0, tpcc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),29 LPSC(1, 0, tptc0, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),30 LPSC(2, 0, tptc1, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),31 LPSC(3, 0, emifa, async1, emifa_clkdev, 0),32 LPSC(4, 0, spi0, pll0_sysclk2, spi0_clkdev, 0),33 LPSC(5, 0, mmcsd0, pll0_sysclk2, mmcsd0_clkdev, 0),34 LPSC(6, 0, aintc, pll0_sysclk4, NULL, LPSC_ALWAYS_ENABLED),35 LPSC(7, 0, arm_rom, pll0_sysclk2, NULL, LPSC_ALWAYS_ENABLED),36 LPSC(9, 0, uart0, pll0_sysclk2, uart0_clkdev, 0),37 LPSC(13, 0, pruss, pll0_sysclk2, NULL, 0),[all …]
38 LPSC(0, 0, vpss_master, pll1_sysclk3, vpss_master_clkdev, 0),39 LPSC(1, 0, vpss_slave, pll1_sysclk3, vpss_slave_clkdev, 0),40 LPSC(6, 0, emac, pll1_sysclk5, emac_clkdev, 0),41 LPSC(9, 0, usb, pll1_sysclk5, usb_clkdev, 0),42 LPSC(10, 0, ide, pll1_sysclk5, ide_clkdev, 0),43 LPSC(11, 0, vlynq, pll1_sysclk5, NULL, 0),44 LPSC(14, 0, aemif, pll1_sysclk5, aemif_clkdev, 0),45 LPSC(15, 0, mmcsd, pll1_sysclk5, mmcsd_clkdev, 0),46 LPSC(17, 0, asp0, pll1_sysclk5, asp0_clkdev, 0),47 LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0),[all …]
34 LPSC(0, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),36 LPSC(1, 0, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),37 LPSC(4, 0, edma_cc, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),38 LPSC(5, 0, edma_tc0, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),39 LPSC(6, 0, edma_tc1, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),40 LPSC(7, 0, edma_tc2, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),41 LPSC(8, 0, edma_tc3, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),42 LPSC(10, 0, ide, pll1_sysclk4, ide_clkdev, 0),43 LPSC(14, 0, emac, pll1_sysclk3, emac_clkdev, 0),44 LPSC(16, 0, vpif0, ref_clk, NULL, LPSC_ALWAYS_ENABLED),[all …]
69 #define LPSC(m, d, n, p, c, f) \ macro
26 module ID (LPSC) as the index corresponding to the clock cell. Refer to