Lines Matching refs:LPSC
38 LPSC(0, 0, vpss_master, pll1_sysclk3, vpss_master_clkdev, 0),
39 LPSC(1, 0, vpss_slave, pll1_sysclk3, vpss_slave_clkdev, 0),
40 LPSC(6, 0, emac, pll1_sysclk5, emac_clkdev, 0),
41 LPSC(9, 0, usb, pll1_sysclk5, usb_clkdev, 0),
42 LPSC(10, 0, ide, pll1_sysclk5, ide_clkdev, 0),
43 LPSC(11, 0, vlynq, pll1_sysclk5, NULL, 0),
44 LPSC(14, 0, aemif, pll1_sysclk5, aemif_clkdev, 0),
45 LPSC(15, 0, mmcsd, pll1_sysclk5, mmcsd_clkdev, 0),
46 LPSC(17, 0, asp0, pll1_sysclk5, asp0_clkdev, 0),
47 LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0),
48 LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0),
49 LPSC(20, 0, uart1, pll1_auxclk, uart1_clkdev, 0),
50 LPSC(21, 0, uart2, pll1_auxclk, uart2_clkdev, 0),
51 LPSC(22, 0, spi, pll1_sysclk5, NULL, 0),
52 LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0),
53 LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0),
54 LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0),
55 LPSC(26, 0, gpio, pll1_sysclk5, gpio_clkdev, 0),
56 LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
57 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
59 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
60 LPSC(31, 0, arm, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),
62 LPSC(39, 1, dsp, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
64 LPSC(40, 1, vicp, pll1_sysclk2, NULL, LPSC_ALWAYS_ENABLED),