Lines Matching refs:LPSC
40 LPSC(0, 0, vpss_master, pll1_sysclk4, vpss_master_clkdev, 0),
41 LPSC(1, 0, vpss_slave, pll1_sysclk4, vpss_slave_clkdev, 0),
42 LPSC(5, 0, timer3, pll1_auxclk, NULL, 0),
43 LPSC(6, 0, spi1, pll1_sysclk2, spi1_clkdev, 0),
44 LPSC(7, 0, mmcsd1, pll1_sysclk2, mmcsd1_clkdev, 0),
45 LPSC(8, 0, asp1, pll1_sysclk2, mcbsp1_clkdev, 0),
46 LPSC(9, 0, usb, pll1_sysclk2, usb_clkdev, 0),
47 LPSC(10, 0, pwm3, pll1_auxclk, NULL, 0),
48 LPSC(11, 0, spi2, pll1_sysclk2, spi2_clkdev, 0),
49 LPSC(12, 0, rto, pll1_auxclk, NULL, 0),
50 LPSC(14, 0, aemif, pll1_sysclk2, aemif_clkdev, 0),
51 LPSC(15, 0, mmcsd0, pll1_sysclk2, mmcsd0_clkdev, 0),
52 LPSC(17, 0, asp0, pll1_sysclk2, mcbsp0_clkdev, 0),
53 LPSC(18, 0, i2c, pll1_auxclk, i2c_clkdev, 0),
54 LPSC(19, 0, uart0, pll1_auxclk, uart0_clkdev, 0),
55 LPSC(20, 0, uart1, pll1_auxclk, uart1_clkdev, 0),
56 LPSC(21, 0, uart2, pll1_sysclk2, uart2_clkdev, 0),
57 LPSC(22, 0, spi0, pll1_sysclk2, spi0_clkdev, 0),
58 LPSC(23, 0, pwm0, pll1_auxclk, NULL, 0),
59 LPSC(24, 0, pwm1, pll1_auxclk, NULL, 0),
60 LPSC(25, 0, pwm2, pll1_auxclk, NULL, 0),
61 LPSC(26, 0, gpio, pll1_sysclk2, gpio_clkdev, 0),
62 LPSC(27, 0, timer0, pll1_auxclk, timer0_clkdev, LPSC_ALWAYS_ENABLED),
63 LPSC(28, 0, timer1, pll1_auxclk, NULL, 0),
65 LPSC(29, 0, timer2, pll1_auxclk, timer2_clkdev, LPSC_ALWAYS_ENABLED),
66 LPSC(31, 0, arm, pll1_sysclk1, NULL, LPSC_ALWAYS_ENABLED),
67 LPSC(40, 0, mjcp, pll1_sysclk1, NULL, 0),
68 LPSC(41, 0, vpss_dac, pll1_sysclk3, vpss_dac_clkdev, 0),