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Searched refs:viafb_write_reg_mask (Results 1 – 6 of 6) sorted by relevance

/linux-2.6.39/drivers/video/via/
Dlcd.c370 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); in load_lcd_scaling()
401 viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6); in load_lcd_scaling()
413 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7); in load_lcd_scaling()
445 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
457 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
547 viafb_write_reg_mask(CR99, VIACR, 0x08, in lcd_patch_skew()
602 viafb_write_reg_mask(CR79, VIACR, 0x00, in viafb_lcd_set_mode()
625 viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); in viafb_lcd_set_mode()
647 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1); in integrated_lvds_disable()
650 viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7); in integrated_lvds_disable()
[all …]
Ddvi.c74 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
81 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
84 viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); in viafb_tmds_trasmitter_identify()
90 viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + in viafb_tmds_trasmitter_identify()
95 viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); in viafb_tmds_trasmitter_identify()
484 viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); in dvi_patch_skew_dvp0()
485 viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); in dvi_patch_skew_dvp0()
493 viafb_write_reg_mask(CR96, VIACR, 0x03, in dvi_patch_skew_dvp0()
496 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
503 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
[all …]
Dvia_utility.c152 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_set_gamma_table()
162 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_set_gamma_table()
166 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_set_gamma_table()
183 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_set_gamma_table()
184 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); in viafb_set_gamma_table()
207 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_get_gamma_table()
217 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_get_gamma_table()
221 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_get_gamma_table()
Dhw.c693 viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7); in viafb_lock_crt()
698 viafb_write_reg_mask(CR11, VIACR, 0, BIT7); in viafb_unlock_crt()
699 viafb_write_reg_mask(CR47, VIACR, 0, BIT0); in viafb_unlock_crt()
891 viafb_write_reg_mask(0x1A, VIASR, 0x00, 0x01); in viafb_set_primary_color_register()
897 viafb_write_reg_mask(0x1A, VIASR, 0x01, 0x01); in viafb_set_secondary_color_register()
1166 viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7); in load_fix_bit_crtc_reg()
1170 viafb_write_reg_mask(CR07, VIACR, 0x10, BIT4); in load_fix_bit_crtc_reg()
1172 viafb_write_reg_mask(CR09, VIACR, 0x40, BIT6); in load_fix_bit_crtc_reg()
1174 viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4); in load_fix_bit_crtc_reg()
1176 viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); in load_fix_bit_crtc_reg()
[all …]
Dviafbdev.c1160 viafb_write_reg_mask(CR96, VIACR, in viafb_dvp0_proc_write()
1164 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1166 viafb_write_reg_mask(SR1B, VIASR, in viafb_dvp0_proc_write()
1170 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1172 viafb_write_reg_mask(SR1E, VIASR, in viafb_dvp0_proc_write()
1228 viafb_write_reg_mask(CR9B, VIACR, in viafb_dvp1_proc_write()
1232 viafb_write_reg_mask(SR65, VIASR, in viafb_dvp1_proc_write()
1236 viafb_write_reg_mask(SR65, VIASR, in viafb_dvp1_proc_write()
1284 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f); in viafb_dfph_proc_write()
1323 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f); in viafb_dfpl_proc_write()
Dhw.h33 #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m) macro