| /linux-2.6.39/arch/cris/arch-v32/mach-a3/ |
| D | arbiter.c | 527 REG_RD(marb_foo, regi_marb_foo, r_masked_intr); in crisv32_foo_arbiter_irq()
540 masked_intr = REG_RD(marb_foo, regi_marb_foo, r_masked_intr); in crisv32_foo_arbiter_irq()
554 r_clients = REG_RD(marb_foo_bp, watch->instance, r_brk_clients); in crisv32_foo_arbiter_irq()
555 r_addr = REG_RD(marb_foo_bp, watch->instance, r_brk_addr); in crisv32_foo_arbiter_irq()
556 r_op = REG_RD(marb_foo_bp, watch->instance, r_brk_op); in crisv32_foo_arbiter_irq()
557 r_first = REG_RD(marb_foo_bp, watch->instance, r_brk_first_client); in crisv32_foo_arbiter_irq()
558 r_size = REG_RD(marb_foo_bp, watch->instance, r_brk_size); in crisv32_foo_arbiter_irq()
583 REG_RD(marb_bar, regi_marb_bar, r_masked_intr); in crisv32_bar_arbiter_irq()
596 masked_intr = REG_RD(marb_bar, regi_marb_bar, r_masked_intr); in crisv32_bar_arbiter_irq()
610 r_clients = REG_RD(marb_bar_bp, watch->instance, r_brk_clients); in crisv32_bar_arbiter_irq()
[all …]
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| D | cpufreq.c | 26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in cris_freq_get_cpu_frequency()
35 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in cris_freq_set_cpu_state()
141 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg); in cris_sdram_freq_notifier()
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| D | dma.c | 48 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in crisv32_request_dma()
49 strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); in crisv32_request_dma()
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| /linux-2.6.39/arch/cris/include/arch-v32/arch/hwregs/ |
| D | dma.h | 76 do { reg_dma_rw_cfg e = REG_RD( dma, inst, rw_cfg );\
82 do { reg_dma_rw_cfg r = REG_RD( dma, inst, rw_cfg );\
88 do { reg_dma_rw_cfg s = REG_RD( dma, inst, rw_cfg );\
94 do { reg_dma_rw_cfg c = REG_RD( dma, inst, rw_cfg );\
101 do { __x = REG_RD(dma, inst, rw_stream_cmd); } while (__x.busy); \
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| D | marb_defs.h | 17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \ macro
276 #ifndef REG_RD
277 #define REG_RD( scope, inst, reg ) \ macro
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| D | irq_nmi_defs.h | 17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \ macro
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| D | strcop_defs.h | 17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \ macro
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| /linux-2.6.39/arch/cris/boot/compressed/ |
| D | misc.c | 134 rs = REG_RD(ser, regi_ser, rs_stat_din); in serout()
243 xoff = REG_RD(ser, regi_ser, rw_xoff); in serial_setup()
251 tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl); in serial_setup()
252 rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl); in serial_setup()
253 tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div); in serial_setup()
254 rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div); in serial_setup()
295 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in decompress_kernel()
301 hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot); in decompress_kernel()
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| /linux-2.6.39/arch/cris/arch-v32/mach-fs/ |
| D | arbiter.c | 282 REG_RD(marb, regi_marb, rw_intr_mask); in crisv32_arbiter_watch()
319 reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask); in crisv32_arbiter_unwatch()
352 REG_RD(marb, regi_marb, r_masked_intr); in crisv32_arbiter_irq()
381 r_clients = REG_RD(marb_bp, watch->instance, r_brk_clients); in crisv32_arbiter_irq()
382 r_addr = REG_RD(marb_bp, watch->instance, r_brk_addr); in crisv32_arbiter_irq()
383 r_op = REG_RD(marb_bp, watch->instance, r_brk_op); in crisv32_arbiter_irq()
384 r_first = REG_RD(marb_bp, watch->instance, r_brk_first_client); in crisv32_arbiter_irq()
385 r_size = REG_RD(marb_bp, watch->instance, r_brk_size); in crisv32_arbiter_irq()
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| D | cpufreq.c | 26 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); in cris_freq_get_cpu_frequency()
35 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); in cris_freq_set_cpu_state()
135 REG_RD(bif_core, regi_bif_core, rw_sdram_timing); in cris_sdram_freq_notifier()
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| /linux-2.6.39/arch/cris/arch-v32/kernel/ |
| D | time.c | 42 return (u32)REG_RD(timer, regi_timer0, r_time); in read_cont_rotime()
89 data = REG_RD(timer, regi_timer0, r_tmr0_data); in get_ns_in_jiffie()
165 REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in handle_watchdog_bite()
198 masked_intr = REG_RD(timer, timer_regs[cpu], r_masked_intr); in timer_interrupt()
253 timer_intr_mask = REG_RD(timer, timer_regs[cpu], rw_intr_mask); in cris_timer_init()
321 data = REG_RD(timer, timer_regs[freqs->cpu], in cris_time_freq_notifier()
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| D | kgdb.c | 1563 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask); in kgdb_init()
1567 ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask); in kgdb_init()
1575 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask); in kgdb_init()
1579 ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask); in kgdb_init()
1587 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask); in kgdb_init()
1591 ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask); in kgdb_init()
1599 intr_mask = REG_RD(intr_vect, regi_irq, rw_mask); in kgdb_init()
1603 ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask); in kgdb_init()
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| /linux-2.6.39/arch/cris/arch-v32/drivers/mach-fs/ |
| D | nandflash.c | 60 dout = REG_RD(gio, regi_gio, rw_pa_dout); in crisv32_hwcontrol()
93 reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din); in crisv32_device_ready()
105 reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core, in crisv32_nand_flash_probe()
107 reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe); in crisv32_nand_flash_probe()
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| /linux-2.6.39/arch/cris/arch-v32/lib/ |
| D | delay.c | 24 u32 t0 = REG_RD(timer, regi_timer0, r_time); in cris_delay10ns()
25 while (REG_RD(timer, regi_timer0, r_time) - t0 < n10ns) in cris_delay10ns()
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| /linux-2.6.39/arch/cris/arch-v32/drivers/ |
| D | sync_serial.c | 620 reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg); in sync_serial_poll()
622 REG_RD(sser, port->regi_sser, rw_rec_cfg); in sync_serial_poll()
676 tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg); in sync_serial_ioctl()
677 rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg); in sync_serial_ioctl()
678 frm_cfg = REG_RD(sser, port->regi_sser, rw_frm_cfg); in sync_serial_ioctl()
679 gen_cfg = REG_RD(sser, port->regi_sser, rw_cfg); in sync_serial_ioctl()
680 intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask); in sync_serial_ioctl()
1052 reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg); in sync_serial_write()
1053 reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg); in sync_serial_write()
1073 intr_mask = REG_RD(sser, port->regi_sser, rw_intr_mask); in sync_serial_write()
[all …]
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| D | iop_fw_load.c | 41 mpu_stat = REG_RD(iop_mpu, regi_iop_mpu, r_stat); in wait_mpu_idle()
99 mc_stat = REG_RD(iop_sw_cpu, regi_iop_sw_cpu, r_mc_stat); in iop_fw_load_spu()
122 (void) REG_RD(iop_sw_cpu, regi_iop_sw_cpu, rs_mc_data); in iop_fw_load_spu()
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| /linux-2.6.39/drivers/net/bnx2x/ |
| D | bnx2x_main.c | 730 row0 = REG_RD(bp, BAR_XSTRORM_INTMEM + in bnx2x_mc_assert()
732 row1 = REG_RD(bp, BAR_XSTRORM_INTMEM + in bnx2x_mc_assert()
734 row2 = REG_RD(bp, BAR_XSTRORM_INTMEM + in bnx2x_mc_assert()
736 row3 = REG_RD(bp, BAR_XSTRORM_INTMEM + in bnx2x_mc_assert()
758 row0 = REG_RD(bp, BAR_TSTRORM_INTMEM + in bnx2x_mc_assert()
760 row1 = REG_RD(bp, BAR_TSTRORM_INTMEM + in bnx2x_mc_assert()
762 row2 = REG_RD(bp, BAR_TSTRORM_INTMEM + in bnx2x_mc_assert()
764 row3 = REG_RD(bp, BAR_TSTRORM_INTMEM + in bnx2x_mc_assert()
786 row0 = REG_RD(bp, BAR_CSTRORM_INTMEM + in bnx2x_mc_assert()
788 row1 = REG_RD(bp, BAR_CSTRORM_INTMEM + in bnx2x_mc_assert()
[all …]
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| D | bnx2x_link.c | 188 u32 val = REG_RD(bp, reg); in bnx2x_bits_en()
197 u32 val = REG_RD(bp, reg); in bnx2x_bits_dis()
422 val_xoff = REG_RD(bp, emac_base + in bnx2x_emac_get_pfc_stat()
425 val_xon = REG_RD(bp, emac_base + EMAC_REG_RX_PFC_STATS_XON_RCVD); in bnx2x_emac_get_pfc_stat()
431 val_xoff = REG_RD(bp, emac_base + in bnx2x_emac_get_pfc_stat()
434 val_xon = REG_RD(bp, emac_base + EMAC_REG_RX_PFC_STATS_XON_SENT); in bnx2x_emac_get_pfc_stat()
452 val = REG_RD(bp, MISC_REG_RESET_REG_2); in bnx2x_pfc_statistic()
485 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_init()
490 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_init()
549 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_enable()
[all …]
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| D | bnx2x_ethtool.c | 532 *p++ = REG_RD(bp, in bnx2x_read_pages_regs_e2()
559 dump_hdr.xstorm_waitp = REG_RD(bp, XSTORM_WAITP_ADDR); in bnx2x_get_regs()
560 dump_hdr.tstorm_waitp = REG_RD(bp, TSTORM_WAITP_ADDR); in bnx2x_get_regs()
561 dump_hdr.ustorm_waitp = REG_RD(bp, USTORM_WAITP_ADDR); in bnx2x_get_regs()
562 dump_hdr.cstorm_waitp = REG_RD(bp, CSTORM_WAITP_ADDR); in bnx2x_get_regs()
579 *p++ = REG_RD(bp, in bnx2x_get_regs()
586 *p++ = REG_RD(bp, in bnx2x_get_regs()
593 *p++ = REG_RD(bp, in bnx2x_get_regs()
736 val = REG_RD(bp, MCP_REG_MCPR_NVM_SW_ARB); in bnx2x_acquire_nvram_lock()
767 val = REG_RD(bp, MCP_REG_MCPR_NVM_SW_ARB); in bnx2x_release_nvram_lock()
[all …]
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| /linux-2.6.39/drivers/net/ |
| D | bnx2.c | 276 val = REG_RD(bp, BNX2_PCICFG_REG_WINDOW); in bnx2_reg_rd_ind()
314 val = REG_RD(bp, BNX2_CTX_CTX_CTRL); in bnx2_ctx_wr()
489 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE); in bnx2_read_phy()
493 REG_RD(bp, BNX2_EMAC_MDIO_MODE); in bnx2_read_phy()
506 val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM); in bnx2_read_phy()
510 val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM); in bnx2_read_phy()
527 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE); in bnx2_read_phy()
531 REG_RD(bp, BNX2_EMAC_MDIO_MODE); in bnx2_read_phy()
546 val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE); in bnx2_write_phy()
550 REG_RD(bp, BNX2_EMAC_MDIO_MODE); in bnx2_write_phy()
[all …]
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| /linux-2.6.39/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
| D | marb_defs.h | 17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \ macro
276 #ifndef REG_RD
277 #define REG_RD( scope, inst, reg ) \ macro
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| /linux-2.6.39/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| D | marb_bar_defs.h | 14 #ifndef REG_RD
15 #define REG_RD( scope, inst, reg ) \ macro
298 #ifndef REG_RD
299 #define REG_RD( scope, inst, reg ) \ macro
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| /linux-2.6.39/drivers/media/radio/wl128x/ |
| D | fmdrv_rx.c | 82 ret = fmc_send_cmd(fmdev, FLAG_GET, REG_RD, NULL, 2, NULL, NULL); in fm_rx_set_freq()
114 ret = fmc_send_cmd(fmdev, FREQ_SET, REG_RD, NULL, 2, &curr_frq, &resp_len); in fm_rx_set_freq()
186 ret = fmc_send_cmd(fmdev, FREQ_SET, REG_RD, NULL, in fm_rx_seek()
226 ret = fmc_send_cmd(fmdev, FLAG_GET, REG_RD, NULL, 2, NULL, NULL); in fm_rx_seek()
282 ret = fmc_send_cmd(fmdev, FREQ_SET, REG_RD, NULL, 2, in fm_rx_seek()
528 ret = fmc_send_cmd(fmdev, RSSI_LVL_GET, REG_RD, NULL, 2, in fm_rx_get_rssi_level()
618 ret = fmc_send_cmd(fmdev, MOST_MODE_SET, REG_RD, NULL, 2, in fm_rx_get_stereo_mono()
698 ret = fmc_send_cmd(fmdev, FLAG_GET, REG_RD, NULL, 2, in fm_rx_set_rds_mode()
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| /linux-2.6.39/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
| D | iop_version_defs.h | 14 #ifndef REG_RD
15 #define REG_RD( scope, inst, reg ) \ macro
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| /linux-2.6.39/arch/cris/include/arch-v32/arch/hwregs/iop/ |
| D | iop_version_defs.h | 17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \ macro
|