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/linux-2.6.39/include/linux/mfd/ab8500/
Dsysctrl.h76 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
77 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
78 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
79 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
80 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
81 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
82 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
84 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
85 #define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
90 #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0)
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/linux-2.6.39/drivers/scsi/
Dnsp32.h92 # define IRQSTATUS_LATCHED_MSG BIT(0)
93 # define IRQSTATUS_LATCHED_IO BIT(1)
94 # define IRQSTATUS_LATCHED_CD BIT(2)
95 # define IRQSTATUS_LATCHED_BUS_FREE BIT(3)
96 # define IRQSTATUS_RESELECT_OCCUER BIT(4)
97 # define IRQSTATUS_PHASE_CHANGE_IRQ BIT(5)
98 # define IRQSTATUS_SCSIRESET_IRQ BIT(6)
99 # define IRQSTATUS_TIMER_IRQ BIT(7)
100 # define IRQSTATUS_FIFO_SHLD_IRQ BIT(8)
101 # define IRQSTATUS_PCI_IRQ BIT(9)
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/linux-2.6.39/include/linux/usb/
Dlangwell_udc.h54 #define HCC_LEN BIT(17) /* Link power management (LPM) capability */
60 #define HOSTCAP BIT(8) /* host capable */
61 #define DEVCAP BIT(7) /* device capable */
71 #define EXTS_TI1 BIT(4) /* general purpose timer interrupt 1 */
72 #define EXTS_TI1TI0 BIT(3) /* general purpose timer interrupt 0 */
73 #define EXTS_TI1UPI BIT(2) /* USB host periodic interrupt */
74 #define EXTS_TI1UAI BIT(1) /* USB host asynchronous interrupt */
75 #define EXTS_TI1NAKI BIT(0) /* NAK interrupt */
77 #define EXTI_TIE1 BIT(4) /* general purpose timer interrupt enable 1 */
78 #define EXTI_TIE0 BIT(3) /* general purpose timer interrupt enable 0 */
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Dlangwell_otg.h26 # define USBCMD_RST BIT(1)
27 # define USBCMD_RS BIT(0)
29 # define USBSTS_SLI BIT(8)
30 # define USBSTS_URI BIT(6)
31 # define USBSTS_PCI BIT(2)
33 # define PORTSC_PP BIT(12)
34 # define PORTSC_LS (BIT(11) | BIT(10))
35 # define PORTSC_SUSP BIT(7)
36 # define PORTSC_CCS BIT(0)
38 # define HOSTPC1_PHCD BIT(22)
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/linux-2.6.39/drivers/staging/msm/
Dmdp.h37 #ifdef BIT
38 #undef BIT
41 #define BIT(x) (1<<(x)) macro
44 #define MDPOP_LR BIT(0) /* left to right flip */
45 #define MDPOP_UD BIT(1) /* up and down flip */
46 #define MDPOP_ROT90 BIT(2) /* rotate image to 90 degree */
49 #define MDPOP_ASCALE BIT(7)
50 #define MDPOP_ALPHAB BIT(8) /* enable alpha blending */
51 #define MDPOP_TRANSP BIT(9) /* enable transparency */
52 #define MDPOP_DITHER BIT(10) /* enable dither */
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/linux-2.6.39/drivers/net/wireless/rtlwifi/rtl8192ce/
Dreg.h359 #define CMDEEPROM_EN BIT(5)
360 #define CMDEEPROM_SEL BIT(4)
361 #define CMD9346CR_9356SEL BIT(4)
366 #define GPIOSEL_ENBT BIT(5)
384 #define RRSR_1M BIT(0)
385 #define RRSR_2M BIT(1)
386 #define RRSR_5_5M BIT(2)
387 #define RRSR_11M BIT(3)
388 #define RRSR_6M BIT(4)
389 #define RRSR_9M BIT(5)
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/linux-2.6.39/drivers/staging/rtl8712/
Drtl8712_cmdctrl_bitdef.h9 #define _APSDOFF_STATUS BIT(15)
10 #define _APSDOFF BIT(14)
11 #define _BBRSTn BIT(13) /*Enable OFDM/CCK*/
12 #define _BB_GLB_RSTn BIT(12) /*Enable BB*/
13 #define _SCHEDULE_EN BIT(10) /*Enable MAC scheduler*/
14 #define _MACRXEN BIT(9)
15 #define _MACTXEN BIT(8)
16 #define _DDMA_EN BIT(7) /*FW off load function enable*/
17 #define _FW2HW_EN BIT(6) /*MAC every module reset */
18 #define _RXDMA_EN BIT(5)
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Drtl8712_fifoctrl_bitdef.h11 #define _TXSTATUS_OVF BIT(15)
14 #define _STATUSFF1_OVF BIT(7)
15 #define _STATUSFF1_EMPTY BIT(6)
16 #define _STATUSFF0_OVF BIT(5)
17 #define _STATUSFF0_EMPTY BIT(4)
18 #define _RXFF1_OVF BIT(3)
19 #define _RXFF1_EMPTY BIT(2)
20 #define _RXFF0_OVF BIT(1)
21 #define _RXFF0_EMPTY BIT(0)
39 #define _C2HFF_POLL BIT(4)
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Drtl8712_syscfg_bitdef.h11 #define iso_LDR2RP BIT(iso_LDR2RP_SHT) /* 1:isolation, 0:attach*/
15 #define FEN_DIO_SDIO BIT(FEN_DIO_SDIO_SHT)
17 #define FEN_SDIO BIT(FEN_SDIO_SHT)
19 #define FEN_USBA BIT(FEN_USBA_SHT)
21 #define FEN_UPLL BIT(FEN_UPLL_SHT)
23 #define FEN_USBD BIT(FEN_USBD_SHT)
25 #define FEN_DIO_PCIE BIT(FEN_DIO_PCIE_SHT)
27 #define FEN_PCIEA BIT(FEN_PCIEA_SHT)
29 #define FEN_PPLL BIT(FEN_PPLL_SHT)
31 #define FEN_PCIED BIT(FEN_PCIED_SHT)
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Drtl8712_interrupt_bitdef.h6 #define _CPUERR BIT(29)
7 #define _ATIMEND BIT(28)
8 #define _TXBCNOK BIT(27)
9 #define _TXBCNERR BIT(26)
10 #define _BCNDMAINT4 BIT(25)
11 #define _BCNDMAINT3 BIT(24)
12 #define _BCNDMAINT2 BIT(23)
13 #define _BCNDMAINT1 BIT(22)
14 #define _BCNDOK4 BIT(21)
15 #define _BCNDOK3 BIT(20)
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Dwifi.h6 #ifdef BIT
7 #undef BIT
9 #define BIT(x) (1 << (x)) macro
36 WIFI_CTRL_TYPE = (BIT(2)),
37 WIFI_DATA_TYPE = (BIT(3)),
38 WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), /*!< QoS Data */
45 WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE),
46 WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE),
47 WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE),
48 WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE),
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/linux-2.6.39/arch/mips/include/asm/ip32/
Dmace.h26 #define MACEPCI_ERROR_MASTER_ABORT BIT(31)
27 #define MACEPCI_ERROR_TARGET_ABORT BIT(30)
28 #define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29)
29 #define MACEPCI_ERROR_RETRY_ERR BIT(28)
30 #define MACEPCI_ERROR_ILLEGAL_CMD BIT(27)
31 #define MACEPCI_ERROR_SYSTEM_ERR BIT(26)
32 #define MACEPCI_ERROR_INTERRUPT_TEST BIT(25)
33 #define MACEPCI_ERROR_PARITY_ERR BIT(24)
34 #define MACEPCI_ERROR_OVERRUN BIT(23)
35 #define MACEPCI_ERROR_RSVD BIT(22)
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Dcrime.h50 #define MACE_VID_IN1_INT BIT(0)
51 #define MACE_VID_IN2_INT BIT(1)
52 #define MACE_VID_OUT_INT BIT(2)
53 #define MACE_ETHERNET_INT BIT(3)
54 #define MACE_SUPERIO_INT BIT(4)
55 #define MACE_MISC_INT BIT(5)
56 #define MACE_AUDIO_INT BIT(6)
57 #define MACE_PCI_BRIDGE_INT BIT(7)
58 #define MACEPCI_SCSI0_INT BIT(8)
59 #define MACEPCI_SCSI1_INT BIT(9)
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/linux-2.6.39/drivers/mmc/host/
Ddw_mmc.h60 #define SDMMC_CTRL_USE_IDMAC BIT(25)
61 #define SDMMC_CTRL_CEATA_INT_EN BIT(11)
62 #define SDMMC_CTRL_SEND_AS_CCSD BIT(10)
63 #define SDMMC_CTRL_SEND_CCSD BIT(9)
64 #define SDMMC_CTRL_ABRT_READ_DATA BIT(8)
65 #define SDMMC_CTRL_SEND_IRQ_RESP BIT(7)
66 #define SDMMC_CTRL_READ_WAIT BIT(6)
67 #define SDMMC_CTRL_DMA_ENABLE BIT(5)
68 #define SDMMC_CTRL_INT_ENABLE BIT(4)
69 #define SDMMC_CTRL_DMA_RESET BIT(2)
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/linux-2.6.39/drivers/net/wireless/rtlwifi/
Ddebug.h79 #define COMP_ERR BIT(0)
80 #define COMP_FW BIT(1)
81 #define COMP_INIT BIT(2) /*For init/deinit */
82 #define COMP_RECV BIT(3) /*For Rx. */
83 #define COMP_SEND BIT(4) /*For Tx. */
84 #define COMP_MLME BIT(5) /*For MLME. */
85 #define COMP_SCAN BIT(6) /*For Scan. */
86 #define COMP_INTR BIT(7) /*For interrupt Related. */
87 #define COMP_LED BIT(8) /*For LED. */
88 #define COMP_SEC BIT(9) /*For sec. */
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/linux-2.6.39/drivers/scsi/pcmcia/
Dnsp_cs.h40 # define IRQCONTROL_RESELECT_CLEAR BIT(0)
41 # define IRQCONTROL_PHASE_CHANGE_CLEAR BIT(1)
42 # define IRQCONTROL_TIMER_CLEAR BIT(2)
43 # define IRQCONTROL_FIFO_CLEAR BIT(3)
52 # define IRQSTATUS_SCSI BIT(0)
53 # define IRQSTATUS_TIMER BIT(2)
54 # define IRQSTATUS_FIFO BIT(3)
58 # define IF_IFSEL BIT(0)
59 # define IF_REGSEL BIT(2)
64 # define FIFOSTATUS_FULL_EMPTY BIT(7)
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/linux-2.6.39/drivers/net/wireless/wl1251/
Devent.h39 RESERVED1_EVENT_ID = BIT(0),
40 RESERVED2_EVENT_ID = BIT(1),
41 MEASUREMENT_START_EVENT_ID = BIT(2),
42 SCAN_COMPLETE_EVENT_ID = BIT(3),
43 CALIBRATION_COMPLETE_EVENT_ID = BIT(4),
44 ROAMING_TRIGGER_LOW_RSSI_EVENT_ID = BIT(5),
45 PS_REPORT_EVENT_ID = BIT(6),
46 SYNCHRONIZATION_TIMEOUT_EVENT_ID = BIT(7),
47 HEALTH_REPORT_EVENT_ID = BIT(8),
48 ACI_DETECTION_EVENT_ID = BIT(9),
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/linux-2.6.39/drivers/net/
Dmeth.h117 #define SGI_MAC_RESET BIT(0) /* 0: MAC110 active in run mode, 1: Global reset signal to MAC110 cor…
118 #define METH_PHY_FDX BIT(1) /* 0: Disable full duplex, 1: Enable full duplex */
119 #define METH_PHY_LOOP BIT(2) /* 0: Normal operation, follows 10/100mbit and M10T/MII select, 1: loo…
121 #define METH_100MBIT BIT(3) /* 0: 10meg mode, 1: 100meg mode */
122 #define METH_PHY_MII BIT(4) /* 0: MII selected, 1: SIA selected */
132 #define METH_PHY_LINK_FAIL BIT(7) /* 0: Link failure detection disabled, 1: Hardware scans for link…
155 #define METH_DMA_TX_EN BIT(1) /* enable TX DMA */
156 #define METH_DMA_TX_INT_EN BIT(0) /* enable TX Buffer Empty interrupt */
157 #define METH_DMA_RX_EN BIT(15) /* Enable RX */
158 #define METH_DMA_RX_INT_EN BIT(9) /* Enable interrupt on RX packet */
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/linux-2.6.39/include/linux/i2c/
Ddm355evm_msp.h30 # define MSP_STATUS_BAD_OFFSET BIT(0)
31 # define MSP_STATUS_BAD_COMMAND BIT(1)
32 # define MSP_STATUS_POWER_ERROR BIT(2)
33 # define MSP_STATUS_RXBUF_OVERRUN BIT(3)
35 # define MSP_RESET_DC5 BIT(0)
36 # define MSP_RESET_TVP5154 BIT(2)
37 # define MSP_RESET_IMAGER BIT(3)
38 # define MSP_RESET_ETHERNET BIT(4)
39 # define MSP_RESET_SYS BIT(5)
40 # define MSP_RESET_AIC33 BIT(7)
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/linux-2.6.39/arch/mips/include/asm/mach-ath79/
Dar71xx_regs.h133 #define MISC_INT_DMA BIT(7)
134 #define MISC_INT_OHCI BIT(6)
135 #define MISC_INT_PERFC BIT(5)
136 #define MISC_INT_WDOG BIT(4)
137 #define MISC_INT_UART BIT(3)
138 #define MISC_INT_GPIO BIT(2)
139 #define MISC_INT_ERROR BIT(1)
140 #define MISC_INT_TIMER BIT(0)
142 #define AR71XX_RESET_EXTERNAL BIT(28)
143 #define AR71XX_RESET_FULL_CHIP BIT(24)
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/linux-2.6.39/drivers/net/wireless/ath/carl9170/
Dhw.h115 #define AR9170_MAC_INT_TXC BIT(0)
116 #define AR9170_MAC_INT_RXC BIT(1)
117 #define AR9170_MAC_INT_RETRY_FAIL BIT(2)
118 #define AR9170_MAC_INT_WAKEUP BIT(3)
119 #define AR9170_MAC_INT_ATIM BIT(4)
120 #define AR9170_MAC_INT_DTIM BIT(5)
121 #define AR9170_MAC_INT_CFG_BCN BIT(6)
122 #define AR9170_MAC_INT_ABORT BIT(7)
123 #define AR9170_MAC_INT_QOS BIT(8)
124 #define AR9170_MAC_INT_MIMO_PS BIT(9)
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/linux-2.6.39/drivers/net/wireless/wl12xx/
Devent.h41 RSSI_SNR_TRIGGER_0_EVENT_ID = BIT(0),
42 RSSI_SNR_TRIGGER_1_EVENT_ID = BIT(1),
43 RSSI_SNR_TRIGGER_2_EVENT_ID = BIT(2),
44 RSSI_SNR_TRIGGER_3_EVENT_ID = BIT(3),
45 RSSI_SNR_TRIGGER_4_EVENT_ID = BIT(4),
46 RSSI_SNR_TRIGGER_5_EVENT_ID = BIT(5),
47 RSSI_SNR_TRIGGER_6_EVENT_ID = BIT(6),
48 RSSI_SNR_TRIGGER_7_EVENT_ID = BIT(7),
49 MEASUREMENT_START_EVENT_ID = BIT(8),
50 MEASUREMENT_COMPLETE_EVENT_ID = BIT(9),
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/linux-2.6.39/include/video/
Dsstfb.h81 # define PCI_EN_INIT_WR BIT(0)
82 # define PCI_EN_FIFO_WR BIT(1)
83 # define PCI_REMAP_DAC BIT(2)
89 # define STATUS_FBI_BUSY BIT(7)
91 # define EN_CLIPPING BIT(0) /* enable clipping */
92 # define EN_RGB_WRITE BIT(9) /* enable writes to rgb area */
93 # define EN_ALPHA_WRITE BIT(10)
94 # define ENGINE_INVERT_Y BIT(17) /* invert Y origin (pipe) */
103 # define EN_PXL_PIPELINE BIT(8) /* pixel pipeline (clip..)*/
104 # define LFB_WORD_SWIZZLE_WR BIT(11) /* enable write-wordswap (big-endian) */
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Dtdfx.h90 #define AUTOINC_DSTX BIT(10)
91 #define AUTOINC_DSTY BIT(11)
97 #define STATUS_RETRACE BIT(6)
98 #define STATUS_BUSY BIT(9)
99 #define MISCINIT1_CLUT_INV BIT(0)
100 #define MISCINIT1_2DBLOCK_DIS BIT(15)
101 #define DRAMINIT0_SGRAM_NUM BIT(26)
102 #define DRAMINIT0_SGRAM_TYPE BIT(27)
103 #define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27) | BIT(28) | BIT(29))
105 #define DRAMINIT1_MEM_SDRAM BIT(30)
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/linux-2.6.39/include/linux/mfd/
Dtps6507x.h23 #define TPS6507X_CHG_USB BIT(7)
24 #define TPS6507X_CHG_AC BIT(6)
25 #define TPS6507X_CHG_USB_PW_ENABLE BIT(5)
26 #define TPS6507X_CHG_AC_PW_ENABLE BIT(4)
27 #define TPS6507X_CHG_AC_CURRENT BIT(2)
28 #define TPS6507X_CHG_USB_CURRENT BIT(0)
31 #define TPS6507X_REG_MASK_AC_USB BIT(7)
32 #define TPS6507X_REG_MASK_TSC BIT(6)
33 #define TPS6507X_REG_MASK_PB_IN BIT(5)
34 #define TPS6507X_REG_TSC_INT BIT(3)
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