Lines Matching refs:BIT

133 #define MISC_INT_DMA			BIT(7)
134 #define MISC_INT_OHCI			BIT(6)
135 #define MISC_INT_PERFC			BIT(5)
136 #define MISC_INT_WDOG			BIT(4)
137 #define MISC_INT_UART			BIT(3)
138 #define MISC_INT_GPIO			BIT(2)
139 #define MISC_INT_ERROR			BIT(1)
140 #define MISC_INT_TIMER			BIT(0)
142 #define AR71XX_RESET_EXTERNAL		BIT(28)
143 #define AR71XX_RESET_FULL_CHIP		BIT(24)
144 #define AR71XX_RESET_CPU_NMI		BIT(21)
145 #define AR71XX_RESET_CPU_COLD		BIT(20)
146 #define AR71XX_RESET_DMA		BIT(19)
147 #define AR71XX_RESET_SLIC		BIT(18)
148 #define AR71XX_RESET_STEREO		BIT(17)
149 #define AR71XX_RESET_DDR		BIT(16)
150 #define AR71XX_RESET_GE1_MAC		BIT(13)
151 #define AR71XX_RESET_GE1_PHY		BIT(12)
152 #define AR71XX_RESET_USBSUS_OVERRIDE	BIT(10)
153 #define AR71XX_RESET_GE0_MAC		BIT(9)
154 #define AR71XX_RESET_GE0_PHY		BIT(8)
155 #define AR71XX_RESET_USB_OHCI_DLL	BIT(6)
156 #define AR71XX_RESET_USB_HOST		BIT(5)
157 #define AR71XX_RESET_USB_PHY		BIT(4)
158 #define AR71XX_RESET_PCI_BUS		BIT(1)
159 #define AR71XX_RESET_PCI_CORE		BIT(0)
161 #define AR724X_RESET_GE1_MDIO		BIT(23)
162 #define AR724X_RESET_GE0_MDIO		BIT(22)
163 #define AR724X_RESET_PCIE_PHY_SERIAL	BIT(10)
164 #define AR724X_RESET_PCIE_PHY		BIT(7)
165 #define AR724X_RESET_PCIE		BIT(6)
166 #define AR724X_RESET_OHCI_DLL		BIT(3)
168 #define AR913X_RESET_AMBA2WMAC		BIT(22)
200 #define AR71XX_SPI_FS_GPIO	BIT(0)	/* Enable GPIO mode */
202 #define AR71XX_SPI_CTRL_RD	BIT(6)	/* Remap Disable */
205 #define AR71XX_SPI_IOC_DO	BIT(0)	/* Data Out pin */
206 #define AR71XX_SPI_IOC_CLK	BIT(8)	/* CLK pin */
207 #define AR71XX_SPI_IOC_CS(n)	BIT(16 + (n))