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Searched refs:inl (Results 1 – 25 of 206) sorted by relevance

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/linux-2.4.37.9/arch/mips/philips/nino/
Dirq.c26 outl(inl(TX3912_INT6_ENABLE) | in enable_irq6()
29 outl(inl(TX3912_INT5_ENABLE) | TX3912_INT5_PERINT, in enable_irq6()
33 outl(inl(TX3912_INT6_ENABLE) | in enable_irq6()
36 outl(inl(TX3912_INT2_ENABLE) | TX3912_INT2_UARTA_RX_BITS, in enable_irq6()
51 outl(inl(TX3912_INT6_ENABLE) & in disable_irq6()
54 outl(inl(TX3912_INT5_ENABLE) & ~TX3912_INT5_PERINT, in disable_irq6()
56 outl(inl(TX3912_INT5_CLEAR) | TX3912_INT5_PERINT, in disable_irq6()
60 outl(inl(TX3912_INT6_ENABLE) & in disable_irq6()
63 outl(inl(TX3912_INT2_ENABLE) & ~TX3912_INT2_UARTA_RX_BITS, in disable_irq6()
92 if((inl(TX3912_INT6_STATUS) & TX3912_INT6_STATUS_INTVEC_UARTARXINT) == in irq6_dispatch()
[all …]
Dpower.c19 outl(inl(TX3912_POWER_CTRL) | TX3912_POWER_CTRL_STOPCPU, in nino_wait()
27 outl(inl(TX3912_POWER_CTRL) & ~TX3912_POWER_CTRL_STOPCPU, in nino_wait()
/linux-2.4.37.9/drivers/net/tulip/
Dpnic.c26 u32 phy_reg = inl(ioaddr + 0xB8); in pnic_do_nway()
59 int phy_reg = inl(ioaddr + 0xB8); in pnic_lnk_change()
64 if (inl(ioaddr + CSR5) & TPLnkFail) { in pnic_lnk_change()
65 outl((inl(ioaddr + CSR7) & ~TPLnkFail) | TPLnkPass, ioaddr + CSR7); in pnic_lnk_change()
78 } else if (inl(ioaddr + CSR5) & TPLnkPass) { in pnic_lnk_change()
86 outl((inl(ioaddr + CSR7) & ~TPLnkPass) | TPLnkFail, ioaddr + CSR7); in pnic_lnk_change()
97 if(!inl(ioaddr + CSR7)) { in pnic_timer()
112 int csr12 = inl(ioaddr + CSR12); in pnic_timer()
114 int phy_reg = inl(ioaddr + 0xB8); in pnic_timer()
115 int csr5 = inl(ioaddr + CSR5); in pnic_timer()
[all …]
Dpnic2.c93 dev->name,inl(ioaddr + CSR12)); in pnic2_timer()
113 csr14 = (inl(ioaddr + CSR14) & 0xfff0ee39); in pnic2_start_nway()
140 tp->csr6 = inl(ioaddr + CSR6); in pnic2_start_nway()
169 csr12 = (inl(ioaddr + CSR12) & 0xffff8fff); in pnic2_start_nway()
183 int csr12 = inl(ioaddr + CSR12); in pnic2_lnk_change()
188 csr5, inl(ioaddr + CSR14)); in pnic2_lnk_change()
246 csr14 = (inl(ioaddr + CSR14) & 0xffffff7f); in pnic2_lnk_change()
258 tp->csr6 = (inl(ioaddr + CSR6) & 0xfe3bd1fd); in pnic2_lnk_change()
277 inl(ioaddr + CSR6), inl(ioaddr + CSR12)); in pnic2_lnk_change()
294 csr14 = (inl(ioaddr + CSR14) & 0xffffff7f); in pnic2_lnk_change()
[all …]
Dtimer.c26 u32 csr12 = inl(ioaddr + CSR12); in tulip_timer()
32 dev->name, medianame[dev->if_port], inl(ioaddr + CSR5), in tulip_timer()
33 inl(ioaddr + CSR6), csr12, inl(ioaddr + CSR13), in tulip_timer()
34 inl(ioaddr + CSR14), inl(ioaddr + CSR15)); in tulip_timer()
106 dev->name, inl(ioaddr + CSR6), csr12 & 0xff); in tulip_timer()
197 inl(ioaddr + CSR12)); in mxic_timer()
Dtulip_core.c441 outl(inl(ioaddr+CSR5)| 0x00008010, ioaddr + CSR5); in tulip_up()
442 outl(inl(ioaddr+CSR7)| 0x00008010, ioaddr + CSR7); in tulip_up()
449 } else if (inl(ioaddr + CSR5) & TPLnkPass) in tulip_up()
472 outl(inl(ioaddr + 0x88) | 1, ioaddr + 0x88); in tulip_up()
494 dev->name, inl(ioaddr + CSR0), inl(ioaddr + CSR5), in tulip_up()
495 inl(ioaddr + CSR6)); in tulip_up()
561 if ( !tp->medialock && inl(ioaddr + CSR12) & 0x0002) { in tulip_tx_timeout()
570 int csr12 = inl(ioaddr + CSR12); in tulip_tx_timeout()
574 dev->name, inl(ioaddr + CSR5), csr12, in tulip_tx_timeout()
575 inl(ioaddr + CSR13), inl(ioaddr + CSR14)); in tulip_tx_timeout()
[all …]
D21142.c34 int csr12 = inl(ioaddr + CSR12); in t21142_timer()
131 int csr12 = inl(ioaddr + CSR12); in t21142_lnk_change()
135 "%8.8x.\n", dev->name, csr12, csr5, inl(ioaddr + CSR14)); in t21142_lnk_change()
187 dev->name, inl(ioaddr + CSR5)); in t21142_lnk_change()
192 dev->name, tp->csr6, inl(ioaddr + CSR6), in t21142_lnk_change()
193 inl(ioaddr + CSR12)); in t21142_lnk_change()
214 outl(inl(ioaddr + CSR14) & ~0x080, ioaddr + CSR14); in t21142_lnk_change()
Dmedia.c34 #define mdio_delay() inl(mdio_addr)
71 return inl(ioaddr + comet_miireg2offset[location]); in tulip_mdio_read()
79 inl(ioaddr + 0xA0); in tulip_mdio_read()
80 inl(ioaddr + 0xA0); in tulip_mdio_read()
83 if ( ! ((retval = inl(ioaddr + 0xA0)) & 0x80000000)) in tulip_mdio_read()
110 retval = (retval << 1) | ((inl(mdio_addr) & MDIO_DATA_READ) ? 1 : 0); in tulip_mdio_read()
143 if ( ! (inl(ioaddr + 0xA0) & 0x80000000)) in tulip_mdio_write()
329 inl(ioaddr + CSR12) & 0xff); in tulip_select_media()
335 inl(ioaddr + CSR12)); in tulip_select_media()
346 dev->name, inl(ioaddr + 0xB8), medianame[dev->if_port]); in tulip_select_media()
[all …]
Dinterrupt.c92 if(((inl(dev->base_addr + CSR5)>>17)&0x07) == 4) { in tulip_refill_rx()
309 int csr12 = inl(dev->base_addr + CSR12) & 0xff; in phy_interrupt()
345 csr5 = inl(ioaddr + CSR5); in tulip_interrupt()
361 dev->name, csr5, inl(dev->base_addr + CSR5)); in tulip_interrupt()
444 dev->name, csr5, inl(ioaddr + CSR6), tp->csr6); in tulip_interrupt()
471 tp->stats.rx_missed_errors += inl(ioaddr + CSR8) & 0xffff; in tulip_interrupt()
559 csr5 = inl(ioaddr + CSR5); in tulip_interrupt()
573 if (tp->ttimer == 0 || (inl(ioaddr + CSR11) & 0xffff) == 0) { in tulip_interrupt()
585 if ((missed = inl(ioaddr + CSR8) & 0x1ffff)) { in tulip_interrupt()
591 dev->name, inl(ioaddr + CSR5)); in tulip_interrupt()
/linux-2.4.37.9/arch/sh/kernel/
Dpci-bigsur.c37 reg = inl(SH7751_BCR1); in pcibios_init_platform()
42 if(inl(PCI_REG(SH7751_PCICONF0)) != in pcibios_init_platform()
115 word = inl(SH7751_BCR1); in pcibios_init_platform()
130 word = inl(SH7751_WCR1); in pcibios_init_platform()
132 word = inl(SH7751_WCR2); in pcibios_init_platform()
134 word = inl(SH7751_WCR3); in pcibios_init_platform()
136 word = inl(SH7751_MCR); in pcibios_init_platform()
Dpci-snapgear.c43 reg = inl(SH7751_BCR1); in pcibios_init_platform()
48 id = inl(SH7751_PCIREG_BASE+SH7751_PCICONF0); in pcibios_init_platform()
132 word = inl(SH7751_BCR1); in pcibios_init_platform()
147 word = inl(SH7751_WCR1); in pcibios_init_platform()
149 word = inl(SH7751_WCR2); in pcibios_init_platform()
151 word = inl(SH7751_WCR3); in pcibios_init_platform()
153 word = inl(SH7751_MCR); in pcibios_init_platform()
Dsetup_dc.c78 mask = inl(emr); in disable_systemasic_irq()
92 mask = inl(emr); in enable_systemasic_irq()
160 status = inl(esr); in systemasic_irq_demux()
161 status &= inl(emr); in systemasic_irq_demux()
Dpci-sh7751.c59 word = inl(PCI_REG(SH7751_PCIPDR)); in pci_conf1_read_config_byte()
90 word = inl(PCI_REG(SH7751_PCIPDR)); in pci_conf1_read_config_word()
118 *value = inl(PCI_REG(SH7751_PCIPDR)); in pci_conf1_read_config_dword()
137 word = inl(PCI_REG(SH7751_PCIPDR)) ; in pci_conf1_write_config_byte()
163 word = inl(PCI_REG(SH7751_PCIPDR)) ; in pci_conf1_write_config_word()
203 id = inl(SH7751_PCIREG_BASE + SH7751_PCICONF0); in pci_check_direct()
214 tmp = inl (PCI_REG(SH7751_PCIPAR)); in pci_check_direct()
216 if (inl (PCI_REG(SH7751_PCIPAR)) == 0x80000000) { in pci_check_direct()
/linux-2.4.37.9/drivers/char/
Dserial_tx3912.c79 if (!(inl(TX3912_UARTA_CTRL1) & TX3912_UART_CTRL1_RXHOLDFULL)) in receive_char_pio()
101 if (!(inl(TX3912_UARTA_CTRL1) & TX3912_UART_CTRL1_EMPTY)) in transmit_char_pio()
156 status = inl(TX3912_INT2_STATUS); in rs_rx_interrupt()
212 status = inl(TX3912_INT2_STATUS); in rs_tx_interrupt()
246 outl(inl(TX3912_INT2_ENABLE) & ~TX3912_INT2_UARTA_TX_BITS, in rs_disable_tx_interrupts()
260 outl(inl(TX3912_INT2_ENABLE) | TX3912_INT2_UARTA_TX_BITS, in rs_enable_tx_interrupts()
273 outl(inl(TX3912_INT2_ENABLE) & ~TX3912_INT2_UARTA_RX_BITS, in rs_disable_rx_interrupts()
286 outl(inl(TX3912_INT2_ENABLE) | TX3912_INT2_UARTA_RX_BITS, in rs_enable_rx_interrupts()
288 while (inl(TX3912_UARTA_CTRL1) & TX3912_UART_CTRL1_RXHOLDFULL) in rs_enable_rx_interrupts()
350 ctrl1 = inl(TX3912_UARTA_CTRL1) & 0xf000000f; in rs_set_real_termios()
[all …]
Dau1000_gpio.c71 u32 pinfunc = inl(SYS_PINFUNC); in get_au1000_avail_gpio_mask()
84 avail_mask &= ~(inl(IC1_MASKRD) & in get_au1000_avail_gpio_mask()
85 (inl(IC1_CFG0RD) | inl(IC1_CFG1RD))); in get_au1000_avail_gpio_mask()
120 *data = inl(SYS_PINSTATERD); in au1000gpio_in()
Dlcd.h80 #define LCDReadData (inl(kLCD_DR) >> 24)
81 #define LCDReadInst (inl(kLCD_IR) >> 24)
83 #define GPIRead (inl(kGPI) >> 24)
/linux-2.4.37.9/drivers/net/pcmcia/
Dxircom_cb.c337 status = inl(card->io_port+CSR5); in xircom_interrupt()
514 val = inl(card->io_port + CSR0); in initialize_card()
520 val = inl(card->io_port + CSR0); in initialize_card()
673 val = inl(card->io_port + CSR5); /* Status register */ in link_status_changed()
699 val = inl(card->io_port + CSR5); /* Status register */ in transmit_active()
720 val = inl(card->io_port + CSR5); /* Status register */ in receive_active()
748 val = inl(card->io_port + CSR6); /* Operation mode */ in activate_receiver()
771 val = inl(card->io_port + CSR6); /* Operation mode */ in activate_receiver()
803 val = inl(card->io_port + CSR6); /* Operation mode */ in deactivate_receiver()
840 val = inl(card->io_port + CSR6); /* Operation mode */ in activate_transmitter()
[all …]
Dxircom_tulip_cb.c365 currcsr6 = inl(ioaddr + CSR6); in outl_CSR6()
375 csr5 = inl(ioaddr + CSR5); in outl_CSR6()
418 tuple = inl(ioaddr + CSR9) & 0xff; in read_mac_address()
420 link = inl(ioaddr + CSR9) & 0xff; in read_mac_address()
422 data_id = inl(ioaddr + CSR9) & 0xff; in read_mac_address()
424 data_count = inl(ioaddr + CSR9) & 0xff; in read_mac_address()
432 dev->dev_addr[j] = inl(ioaddr + CSR9) & 0xff; in read_mac_address()
578 outl_CSR6(inl(ioaddr + CSR6) & ~EnableTxRx, ioaddr); in xircom_init_one()
580 (volatile int)inl(ioaddr + CSR8); in xircom_init_one()
664 #define mdio_delay() inl(mdio_addr)
[all …]
/linux-2.4.37.9/arch/sparc64/lib/
DPeeCeeI.c182 *pi++ = le32_to_cpu(inl(addr)); in insl()
192 l = le32_to_cpu(inl(addr)); in insl()
196 l2 = le32_to_cpu(inl(addr)); in insl()
207 l = le32_to_cpu(inl(addr)); in insl()
213 l2 = le32_to_cpu(inl(addr)); in insl()
224 l = le32_to_cpu(inl(addr)); in insl()
228 l2 = le32_to_cpu(inl(addr)); in insl()
/linux-2.4.37.9/drivers/video/
Dtx3912fb.c353 outl(inl(TX3912_VIDEO_CTRL1) & in tx3912fb_init()
368 outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, in tx3912fb_init()
373 outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, in tx3912fb_init()
375 outl(inl(TX3912_VIDEO_CTRL1) | in tx3912fb_init()
381 outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, in tx3912fb_init()
383 outl(inl(TX3912_VIDEO_CTRL1) | in tx3912fb_init()
390 outl(inl(TX3912_VIDEO_CTRL1) & ~TX3912_VIDEO_CTRL1_BITSEL_MASK, in tx3912fb_init()
392 outl(inl(TX3912_VIDEO_CTRL1) | in tx3912fb_init()
399 outl(inl(TX3912_CLK_CTRL) | TX3912_CLK_CTRL_ENVIDCLK, in tx3912fb_init()
403 outl(inl(TX3912_VIDEO_CTRL1) & in tx3912fb_init()
[all …]
/linux-2.4.37.9/arch/parisc/lib/
Dio.c242 *(unsigned int *) dst = cpu_to_le32(inl(port)); in insl()
250 l = cpu_to_le32(inl(port)); in insl()
256 l2 = cpu_to_le32(inl(port)); in insl()
266 l = cpu_to_le32(inl(port)); in insl()
273 l2 = cpu_to_le32(inl(port)); in insl()
283 l = cpu_to_le32(inl(port)); in insl()
288 l2 = cpu_to_le32(inl(port)); in insl()
/linux-2.4.37.9/drivers/sound/emu10k1/
Dhwaccess.c151 data |= inl(card->iobase + reg) & ~mask; in emu10k1_writefn0()
178 val = inl(card->iobase + reg); in emu10k1_readfn0()
184 val = inl(card->iobase + reg); in emu10k1_readfn0()
221 data |= inl(card->iobase + DATA) & ~mask; in sblive_writeptr()
254 data |= inl(card->iobase + DATA) & ~mask; in sblive_writeptr_tag()
282 val = inl(card->iobase + DATA); in sblive_readptr()
289 val = inl(card->iobase + DATA); in sblive_readptr()
304 val = inl(card->iobase + INTE) | irq_mask; in emu10k1_irq_enable()
318 val = inl(card->iobase + INTE) & ~irq_mask; in emu10k1_irq_disable()
/linux-2.4.37.9/drivers/net/
Depic100.c258 #undef inl
264 #define inl readl macro
473 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); in epic_init_one()
524 outl(inl(ioaddr + NVCTL) & ~0x483C, ioaddr + NVCTL); in epic_init_one()
586 #define eeprom_delay() inl(ee_addr)
600 (inl(ee_addr) & 0x40 ? EE_READ64_CMD : EE_READ256_CMD); in read_eeprom()
618 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0); in read_eeprom()
640 if ((inl(ioaddr + MIICtrl) & MII_READOP) == 0) { in mdio_read()
662 if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0) in mdio_write()
698 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); in epic_open()
[all …]
Dde4x5.c688 imr = inl(DE4X5_IMR);\
699 imr = inl(DE4X5_IMR);\
708 omr = inl(DE4X5_OMR);\
714 omr = inl(DE4X5_OMR);\
1106 i=inl(DE4X5_BMR);\
1112 for (i=0;i<5;i++) {inl(DE4X5_BMR); mdelay(1);}\
1161 if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { in de4x5_hw_init()
1433 printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); in de4x5_open()
1434 printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); in de4x5_open()
1435 printk("\timr: 0x%08x\n", inl(DE4X5_IMR)); in de4x5_open()
[all …]
/linux-2.4.37.9/arch/alpha/lib/
Dio.c221 *(unsigned int *) dst = inl(port); in insl()
231 l = inl(port); in insl()
237 l2 = inl(port); in insl()
247 l = inl(port); in insl()
254 l2 = inl(port); in insl()
264 l = inl(port); in insl()
269 l2 = inl(port); in insl()

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