Lines Matching refs:inl
26 outl(inl(TX3912_INT6_ENABLE) | in enable_irq6()
29 outl(inl(TX3912_INT5_ENABLE) | TX3912_INT5_PERINT, in enable_irq6()
33 outl(inl(TX3912_INT6_ENABLE) | in enable_irq6()
36 outl(inl(TX3912_INT2_ENABLE) | TX3912_INT2_UARTA_RX_BITS, in enable_irq6()
51 outl(inl(TX3912_INT6_ENABLE) & in disable_irq6()
54 outl(inl(TX3912_INT5_ENABLE) & ~TX3912_INT5_PERINT, in disable_irq6()
56 outl(inl(TX3912_INT5_CLEAR) | TX3912_INT5_PERINT, in disable_irq6()
60 outl(inl(TX3912_INT6_ENABLE) & in disable_irq6()
63 outl(inl(TX3912_INT2_ENABLE) & ~TX3912_INT2_UARTA_RX_BITS, in disable_irq6()
92 if((inl(TX3912_INT6_STATUS) & TX3912_INT6_STATUS_INTVEC_UARTARXINT) == in irq6_dispatch()
97 if ((inl(TX3912_INT6_STATUS) & TX3912_INT6_STATUS_INTVEC_PERINT) == in irq6_dispatch()
106 inl(TX3912_INT6_STATUS)); in irq6_dispatch()
117 outl(inl(TX3912_INT2_CLEAR) | TX3912_INT2_UARTA_TX_BITS, in enable_irq4()
119 outl(inl(TX3912_INT2_ENABLE) | TX3912_INT2_UARTA_TX_BITS, in enable_irq4()
160 if(inl(TX3912_INT2_STATUS) & TX3912_INT2_UARTA_TX_BITS) { in irq4_dispatch()
168 inl(TX3912_INT1_STATUS)); in irq4_dispatch()
170 inl(TX3912_INT2_STATUS)); in irq4_dispatch()
172 inl(TX3912_INT3_STATUS)); in irq4_dispatch()
174 inl(TX3912_INT4_STATUS)); in irq4_dispatch()
176 inl(TX3912_INT5_STATUS)); in irq4_dispatch()