1 /* $Id: pci_common.c,v 1.27.2.5 2002/03/10 05:21:26 davem Exp $
2 * pci_common.c: PCI controller common support.
3 *
4 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
5 */
6
7 #include <linux/string.h>
8 #include <linux/slab.h>
9 #include <linux/init.h>
10
11 #include <asm/pbm.h>
12
13 /* Fix self device of BUS and hook it into BUS->self.
14 * The pci_scan_bus does not do this for the host bridge.
15 */
pci_fixup_host_bridge_self(struct pci_bus * pbus)16 void __init pci_fixup_host_bridge_self(struct pci_bus *pbus)
17 {
18 struct list_head *walk = &pbus->devices;
19
20 walk = walk->next;
21 while (walk != &pbus->devices) {
22 struct pci_dev *pdev = pci_dev_b(walk);
23
24 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_HOST) {
25 pbus->self = pdev;
26 return;
27 }
28
29 walk = walk->next;
30 }
31
32 prom_printf("PCI: Critical error, cannot find host bridge PDEV.\n");
33 prom_halt();
34 }
35
36 /* Find the OBP PROM device tree node for a PCI device.
37 * Return zero if not found.
38 */
find_device_prom_node(struct pci_pbm_info * pbm,struct pci_dev * pdev,int bus_prom_node,struct linux_prom_pci_registers * pregs,int * nregs)39 static int __init find_device_prom_node(struct pci_pbm_info *pbm,
40 struct pci_dev *pdev,
41 int bus_prom_node,
42 struct linux_prom_pci_registers *pregs,
43 int *nregs)
44 {
45 int node;
46
47 /*
48 * Return the PBM's PROM node in case we are it's PCI device,
49 * as the PBM's reg property is different to standard PCI reg
50 * properties. We would delete this device entry otherwise,
51 * which confuses XFree86's device probing...
52 */
53 if ((pdev->bus->number == pbm->pci_bus->number) && (pdev->devfn == 0) &&
54 (pdev->vendor == PCI_VENDOR_ID_SUN) &&
55 (pdev->device == PCI_DEVICE_ID_SUN_PBM ||
56 pdev->device == PCI_DEVICE_ID_SUN_SCHIZO ||
57 pdev->device == PCI_DEVICE_ID_SUN_TOMATILLO ||
58 pdev->device == PCI_DEVICE_ID_SUN_SABRE ||
59 pdev->device == PCI_DEVICE_ID_SUN_HUMMINGBIRD)) {
60 *nregs = 0;
61 return bus_prom_node;
62 }
63
64 node = prom_getchild(bus_prom_node);
65 while (node != 0) {
66 int err = prom_getproperty(node, "reg",
67 (char *)pregs,
68 sizeof(*pregs) * PROMREG_MAX);
69 if (err == 0 || err == -1)
70 goto do_next_sibling;
71 if (((pregs[0].phys_hi >> 8) & 0xff) == pdev->devfn) {
72 *nregs = err / sizeof(*pregs);
73 return node;
74 }
75
76 do_next_sibling:
77 node = prom_getsibling(node);
78 }
79 return 0;
80 }
81
82 /* Remove a PCI device from the device trees, then
83 * free it up. Note that this must run before
84 * the device's resources are registered because we
85 * do not handle unregistering them here.
86 */
pci_device_delete(struct pci_dev * pdev)87 static void pci_device_delete(struct pci_dev *pdev)
88 {
89 list_del(&pdev->global_list);
90 list_del(&pdev->bus_list);
91
92 /* Ok, all references are gone, free it up. */
93 kfree(pdev);
94 }
95
96 /* Older versions of OBP on PCI systems encode 64-bit MEM
97 * space assignments incorrectly, this fixes them up. We also
98 * take the opportunity here to hide other kinds of bogus
99 * assignments.
100 */
fixup_obp_assignments(struct pci_dev * pdev,struct pcidev_cookie * pcp)101 static void __init fixup_obp_assignments(struct pci_dev *pdev,
102 struct pcidev_cookie *pcp)
103 {
104 int i;
105
106 if (pdev->vendor == PCI_VENDOR_ID_AL &&
107 (pdev->device == PCI_DEVICE_ID_AL_M7101 ||
108 pdev->device == PCI_DEVICE_ID_AL_M1533)) {
109 int i;
110
111 /* Zap all of the normal resources, they are
112 * meaningless and generate bogus resource collision
113 * messages. This is OpenBoot's ill-fated attempt to
114 * represent the implicit resources that these devices
115 * have.
116 */
117 pcp->num_prom_assignments = 0;
118 for (i = 0; i < 6; i++) {
119 pdev->resource[i].start =
120 pdev->resource[i].end =
121 pdev->resource[i].flags = 0;
122 }
123 pdev->resource[PCI_ROM_RESOURCE].start =
124 pdev->resource[PCI_ROM_RESOURCE].end =
125 pdev->resource[PCI_ROM_RESOURCE].flags = 0;
126 return;
127 }
128
129 for (i = 0; i < pcp->num_prom_assignments; i++) {
130 struct linux_prom_pci_registers *ap;
131 int space;
132
133 ap = &pcp->prom_assignments[i];
134 space = ap->phys_hi >> 24;
135 if ((space & 0x3) == 2 &&
136 (space & 0x4) != 0) {
137 ap->phys_hi &= ~(0x7 << 24);
138 ap->phys_hi |= 0x3 << 24;
139 }
140 }
141 }
142
143 /* Fill in the PCI device cookie sysdata for the given
144 * PCI device. This cookie is the means by which one
145 * can get to OBP and PCI controller specific information
146 * for a PCI device.
147 */
pdev_cookie_fillin(struct pci_pbm_info * pbm,struct pci_dev * pdev,int bus_prom_node)148 static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
149 struct pci_dev *pdev,
150 int bus_prom_node)
151 {
152 struct linux_prom_pci_registers pregs[PROMREG_MAX];
153 struct pcidev_cookie *pcp;
154 int device_prom_node, nregs, err;
155
156 device_prom_node = find_device_prom_node(pbm, pdev, bus_prom_node,
157 pregs, &nregs);
158 if (device_prom_node == 0) {
159 /* If it is not in the OBP device tree then
160 * there must be a damn good reason for it.
161 *
162 * So what we do is delete the device from the
163 * PCI device tree completely. This scenerio
164 * is seen, for example, on CP1500 for the
165 * second EBUS/HappyMeal pair if the external
166 * connector for it is not present.
167 */
168 pci_device_delete(pdev);
169 return;
170 }
171
172 pcp = kmalloc(sizeof(*pcp), GFP_ATOMIC);
173 if (pcp == NULL) {
174 prom_printf("PCI_COOKIE: Fatal malloc error, aborting...\n");
175 prom_halt();
176 }
177 pcp->pbm = pbm;
178 pcp->prom_node = device_prom_node;
179 memcpy(pcp->prom_regs, pregs, sizeof(pcp->prom_regs));
180 pcp->num_prom_regs = nregs;
181 err = prom_getproperty(device_prom_node, "name",
182 pcp->prom_name, sizeof(pcp->prom_name));
183 if (err > 0)
184 pcp->prom_name[err] = 0;
185 else
186 pcp->prom_name[0] = 0;
187
188 err = prom_getproperty(device_prom_node,
189 "assigned-addresses",
190 (char *)pcp->prom_assignments,
191 sizeof(pcp->prom_assignments));
192 if (err == 0 || err == -1)
193 pcp->num_prom_assignments = 0;
194 else
195 pcp->num_prom_assignments =
196 (err / sizeof(pcp->prom_assignments[0]));
197
198 if (strcmp(pcp->prom_name, "ebus") == 0) {
199 struct linux_prom_ebus_ranges erng[PROM_PCIRNG_MAX];
200 int iter;
201
202 /* EBUS is special... */
203 err = prom_getproperty(device_prom_node, "ranges",
204 (char *)&erng[0], sizeof(erng));
205 if (err == 0 || err == -1) {
206 prom_printf("EBUS: Fatal error, no range property\n");
207 prom_halt();
208 }
209 err = (err / sizeof(erng[0]));
210 for(iter = 0; iter < err; iter++) {
211 struct linux_prom_ebus_ranges *ep = &erng[iter];
212 struct linux_prom_pci_registers *ap;
213
214 ap = &pcp->prom_assignments[iter];
215
216 ap->phys_hi = ep->parent_phys_hi;
217 ap->phys_mid = ep->parent_phys_mid;
218 ap->phys_lo = ep->parent_phys_lo;
219 ap->size_hi = 0;
220 ap->size_lo = ep->size;
221 }
222 pcp->num_prom_assignments = err;
223 }
224
225 fixup_obp_assignments(pdev, pcp);
226
227 pdev->sysdata = pcp;
228 }
229
pci_fill_in_pbm_cookies(struct pci_bus * pbus,struct pci_pbm_info * pbm,int prom_node)230 void __init pci_fill_in_pbm_cookies(struct pci_bus *pbus,
231 struct pci_pbm_info *pbm,
232 int prom_node)
233 {
234 struct list_head *walk = &pbus->devices;
235
236 /* This loop is coded like this because the cookie
237 * fillin routine can delete devices from the tree.
238 */
239 walk = walk->next;
240 while (walk != &pbus->devices) {
241 struct pci_dev *pdev = pci_dev_b(walk);
242 struct list_head *walk_next = walk->next;
243
244 pdev_cookie_fillin(pbm, pdev, prom_node);
245
246 walk = walk_next;
247 }
248
249 walk = &pbus->children;
250 walk = walk->next;
251 while (walk != &pbus->children) {
252 struct pci_bus *this_pbus = pci_bus_b(walk);
253 struct pcidev_cookie *pcp = this_pbus->self->sysdata;
254 struct list_head *walk_next = walk->next;
255
256 pci_fill_in_pbm_cookies(this_pbus, pbm, pcp->prom_node);
257
258 walk = walk_next;
259 }
260 }
261
bad_assignment(struct pci_dev * pdev,struct linux_prom_pci_registers * ap,struct resource * res,int do_prom_halt)262 static void __init bad_assignment(struct pci_dev *pdev,
263 struct linux_prom_pci_registers *ap,
264 struct resource *res,
265 int do_prom_halt)
266 {
267 prom_printf("PCI: Bogus PROM assignment. BUS[%02x] DEVFN[%x]\n",
268 pdev->bus->number, pdev->devfn);
269 if (ap)
270 prom_printf("PCI: phys[%08x:%08x:%08x] size[%08x:%08x]\n",
271 ap->phys_hi, ap->phys_mid, ap->phys_lo,
272 ap->size_hi, ap->size_lo);
273 if (res)
274 prom_printf("PCI: RES[%016lx-->%016lx:(%lx)]\n",
275 res->start, res->end, res->flags);
276 prom_printf("Please email this information to davem@redhat.com\n");
277 if (do_prom_halt)
278 prom_halt();
279 }
280
281 static struct resource *
get_root_resource(struct linux_prom_pci_registers * ap,struct pci_pbm_info * pbm)282 __init get_root_resource(struct linux_prom_pci_registers *ap,
283 struct pci_pbm_info *pbm)
284 {
285 int space = (ap->phys_hi >> 24) & 3;
286
287 switch (space) {
288 case 0:
289 /* Configuration space, silently ignore it. */
290 return NULL;
291
292 case 1:
293 /* 16-bit IO space */
294 return &pbm->io_space;
295
296 case 2:
297 /* 32-bit MEM space */
298 return &pbm->mem_space;
299
300 case 3:
301 /* 64-bit MEM space, these are allocated out of
302 * the 32-bit mem_space range for the PBM, ie.
303 * we just zero out the upper 32-bits.
304 */
305 return &pbm->mem_space;
306
307 default:
308 printk("PCI: What is resource space %x? "
309 "Tell davem@redhat.com about it!\n", space);
310 return NULL;
311 };
312 }
313
314 static struct resource *
get_device_resource(struct linux_prom_pci_registers * ap,struct pci_dev * pdev)315 __init get_device_resource(struct linux_prom_pci_registers *ap,
316 struct pci_dev *pdev)
317 {
318 struct resource *res;
319 int breg = (ap->phys_hi & 0xff);
320
321 switch (breg) {
322 case PCI_ROM_ADDRESS:
323 /* Unfortunately I have seen several cases where
324 * buggy FCODE uses a space value of '1' (I/O space)
325 * in the register property for the ROM address
326 * so disable this sanity check for now.
327 */
328 #if 0
329 {
330 int space = (ap->phys_hi >> 24) & 3;
331
332 /* It had better be MEM space. */
333 if (space != 2)
334 bad_assignment(pdev, ap, NULL, 0);
335 }
336 #endif
337 res = &pdev->resource[PCI_ROM_RESOURCE];
338 break;
339
340 case PCI_BASE_ADDRESS_0:
341 case PCI_BASE_ADDRESS_1:
342 case PCI_BASE_ADDRESS_2:
343 case PCI_BASE_ADDRESS_3:
344 case PCI_BASE_ADDRESS_4:
345 case PCI_BASE_ADDRESS_5:
346 res = &pdev->resource[(breg - PCI_BASE_ADDRESS_0) / 4];
347 break;
348
349 default:
350 bad_assignment(pdev, ap, NULL, 0);
351 res = NULL;
352 break;
353 };
354
355 return res;
356 }
357
pdev_resource_collisions_expected(struct pci_dev * pdev)358 static int __init pdev_resource_collisions_expected(struct pci_dev *pdev)
359 {
360 if (pdev->vendor != PCI_VENDOR_ID_SUN)
361 return 0;
362
363 if (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS ||
364 pdev->device == PCI_DEVICE_ID_SUN_RIO_1394 ||
365 pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
366 return 1;
367
368 return 0;
369 }
370
pdev_record_assignments(struct pci_pbm_info * pbm,struct pci_dev * pdev)371 static void __init pdev_record_assignments(struct pci_pbm_info *pbm,
372 struct pci_dev *pdev)
373 {
374 struct pcidev_cookie *pcp = pdev->sysdata;
375 int i;
376
377 for (i = 0; i < pcp->num_prom_assignments; i++) {
378 struct linux_prom_pci_registers *ap;
379 struct resource *root, *res;
380
381 /* The format of this property is specified in
382 * the PCI Bus Binding to IEEE1275-1994.
383 */
384 ap = &pcp->prom_assignments[i];
385 root = get_root_resource(ap, pbm);
386 res = get_device_resource(ap, pdev);
387 if (root == NULL || res == NULL ||
388 res->flags == 0)
389 continue;
390
391 /* Ok we know which resource this PROM assignment is
392 * for, sanity check it.
393 */
394 if ((res->start & 0xffffffffUL) != ap->phys_lo)
395 bad_assignment(pdev, ap, res, 1);
396
397 /* If it is a 64-bit MEM space assignment, verify that
398 * the resource is too and that the upper 32-bits match.
399 */
400 if (((ap->phys_hi >> 24) & 3) == 3) {
401 if (((res->flags & IORESOURCE_MEM) == 0) ||
402 ((res->flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK)
403 != PCI_BASE_ADDRESS_MEM_TYPE_64))
404 bad_assignment(pdev, ap, res, 1);
405 if ((res->start >> 32) != ap->phys_mid)
406 bad_assignment(pdev, ap, res, 1);
407
408 /* PBM cannot generate cpu initiated PIOs
409 * to the full 64-bit space. Therefore the
410 * upper 32-bits better be zero. If it is
411 * not, just skip it and we will assign it
412 * properly ourselves.
413 */
414 if ((res->start >> 32) != 0UL) {
415 printk(KERN_ERR "PCI: OBP assigns out of range MEM address "
416 "%016lx for region %ld on device %s\n",
417 res->start, (res - &pdev->resource[0]), pdev->name);
418 continue;
419 }
420 }
421
422 /* Adjust the resource into the physical address space
423 * of this PBM.
424 */
425 pbm->parent->resource_adjust(pdev, res, root);
426
427 if (request_resource(root, res) < 0) {
428 /* OK, there is some conflict. But this is fine
429 * since we'll reassign it in the fixup pass.
430 *
431 * We notify the user that OBP made an error if it
432 * is a case we don't expect.
433 */
434 if (!pdev_resource_collisions_expected(pdev)) {
435 printk(KERN_ERR "PCI: Address space collision on region %ld "
436 "[%016lx:%016lx] of device %s\n",
437 (res - &pdev->resource[0]),
438 res->start, res->end,
439 pdev->name);
440 }
441 }
442 }
443 }
444
pci_record_assignments(struct pci_pbm_info * pbm,struct pci_bus * pbus)445 void __init pci_record_assignments(struct pci_pbm_info *pbm,
446 struct pci_bus *pbus)
447 {
448 struct list_head *walk = &pbus->devices;
449
450 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
451 pdev_record_assignments(pbm, pci_dev_b(walk));
452
453 walk = &pbus->children;
454 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
455 pci_record_assignments(pbm, pci_bus_b(walk));
456 }
457
458 /* Return non-zero if PDEV has implicit I/O resources even
459 * though it may not have an I/O base address register
460 * active.
461 */
has_implicit_io(struct pci_dev * pdev)462 static int __init has_implicit_io(struct pci_dev *pdev)
463 {
464 int class = pdev->class >> 8;
465
466 if (class == PCI_CLASS_NOT_DEFINED ||
467 class == PCI_CLASS_NOT_DEFINED_VGA ||
468 class == PCI_CLASS_STORAGE_IDE ||
469 (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
470 return 1;
471
472 return 0;
473 }
474
pdev_assign_unassigned(struct pci_pbm_info * pbm,struct pci_dev * pdev)475 static void __init pdev_assign_unassigned(struct pci_pbm_info *pbm,
476 struct pci_dev *pdev)
477 {
478 u32 reg;
479 u16 cmd;
480 int i, io_seen, mem_seen;
481
482 io_seen = mem_seen = 0;
483 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
484 struct resource *root, *res;
485 unsigned long size, min, max, align;
486
487 res = &pdev->resource[i];
488
489 if (res->flags & IORESOURCE_IO)
490 io_seen++;
491 else if (res->flags & IORESOURCE_MEM)
492 mem_seen++;
493
494 /* If it is already assigned or the resource does
495 * not exist, there is nothing to do.
496 */
497 if (res->parent != NULL || res->flags == 0UL)
498 continue;
499
500 /* Determine the root we allocate from. */
501 if (res->flags & IORESOURCE_IO) {
502 root = &pbm->io_space;
503 min = root->start + 0x400UL;
504 max = root->end;
505 } else {
506 root = &pbm->mem_space;
507 min = root->start;
508 max = min + 0x80000000UL;
509 }
510
511 size = res->end - res->start;
512 align = size + 1;
513 if (allocate_resource(root, res, size + 1, min, max, align, NULL, NULL) < 0) {
514 /* uh oh */
515 prom_printf("PCI: Failed to allocate resource %d for %s\n",
516 i, pdev->name);
517 prom_halt();
518 }
519
520 /* Update PCI config space. */
521 pbm->parent->base_address_update(pdev, i);
522 }
523
524 /* Special case, disable the ROM. Several devices
525 * act funny (ie. do not respond to memory space writes)
526 * when it is left enabled. A good example are Qlogic,ISP
527 * adapters.
528 */
529 pci_read_config_dword(pdev, PCI_ROM_ADDRESS, ®);
530 reg &= ~PCI_ROM_ADDRESS_ENABLE;
531 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, reg);
532
533 /* If we saw I/O or MEM resources, enable appropriate
534 * bits in PCI command register.
535 */
536 if (io_seen || mem_seen) {
537 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
538 if (io_seen || has_implicit_io(pdev))
539 cmd |= PCI_COMMAND_IO;
540 if (mem_seen)
541 cmd |= PCI_COMMAND_MEMORY;
542 pci_write_config_word(pdev, PCI_COMMAND, cmd);
543 }
544
545 /* If this is a PCI bridge or an IDE controller,
546 * enable bus mastering. In the former case also
547 * set the cache line size correctly.
548 */
549 if (((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI) ||
550 (((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) &&
551 ((pdev->class & 0x80) != 0))) {
552 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
553 cmd |= PCI_COMMAND_MASTER;
554 pci_write_config_word(pdev, PCI_COMMAND, cmd);
555
556 if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
557 pci_write_config_byte(pdev,
558 PCI_CACHE_LINE_SIZE,
559 (64 / sizeof(u32)));
560 }
561 }
562
pci_assign_unassigned(struct pci_pbm_info * pbm,struct pci_bus * pbus)563 void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
564 struct pci_bus *pbus)
565 {
566 struct list_head *walk = &pbus->devices;
567
568 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
569 pdev_assign_unassigned(pbm, pci_dev_b(walk));
570
571 walk = &pbus->children;
572 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
573 pci_assign_unassigned(pbm, pci_bus_b(walk));
574 }
575
pci_intmap_match(struct pci_dev * pdev,unsigned int * interrupt)576 static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
577 {
578 struct linux_prom_pci_intmap bridge_local_intmap[PROM_PCIIMAP_MAX], *intmap;
579 struct linux_prom_pci_intmask bridge_local_intmask, *intmask;
580 struct pcidev_cookie *dev_pcp = pdev->sysdata;
581 struct pci_pbm_info *pbm = dev_pcp->pbm;
582 struct linux_prom_pci_registers *pregs = dev_pcp->prom_regs;
583 unsigned int hi, mid, lo, irq;
584 int i, num_intmap, map_slot;
585
586 intmap = &pbm->pbm_intmap[0];
587 intmask = &pbm->pbm_intmask;
588 num_intmap = pbm->num_pbm_intmap;
589 map_slot = 0;
590
591 /* If we are underneath a PCI bridge, use PROM register
592 * property of the parent bridge which is closest to
593 * the PBM.
594 *
595 * However if that parent bridge has interrupt map/mask
596 * properties of it's own we use the PROM register property
597 * of the next child device on the path to PDEV.
598 *
599 * In detail the two cases are (note that the 'X' below is the
600 * 'next child on the path to PDEV' mentioned above):
601 *
602 * 1) PBM --> PCI bus lacking int{map,mask} --> X ... PDEV
603 *
604 * Here we use regs of 'PCI bus' device.
605 *
606 * 2) PBM --> PCI bus with int{map,mask} --> X ... PDEV
607 *
608 * Here we use regs of 'X'. Note that X can be PDEV.
609 */
610 if (pdev->bus->number != pbm->pci_first_busno) {
611 struct pcidev_cookie *bus_pcp, *regs_pcp;
612 struct pci_dev *bus_dev, *regs_dev;
613 int plen;
614
615 bus_dev = pdev->bus->self;
616 regs_dev = pdev;
617
618 while (bus_dev->bus &&
619 bus_dev->bus->number != pbm->pci_first_busno) {
620 regs_dev = bus_dev;
621 bus_dev = bus_dev->bus->self;
622 }
623
624 regs_pcp = regs_dev->sysdata;
625 pregs = regs_pcp->prom_regs;
626
627 bus_pcp = bus_dev->sysdata;
628
629 /* But if the PCI bridge has it's own interrupt map
630 * and mask properties, use that and the regs of the
631 * PCI entity at the next level down on the path to the
632 * device.
633 */
634 plen = prom_getproperty(bus_pcp->prom_node, "interrupt-map",
635 (char *) &bridge_local_intmap[0],
636 sizeof(bridge_local_intmap));
637 if (plen != -1) {
638 intmap = &bridge_local_intmap[0];
639 num_intmap = plen / sizeof(struct linux_prom_pci_intmap);
640 plen = prom_getproperty(bus_pcp->prom_node,
641 "interrupt-map-mask",
642 (char *) &bridge_local_intmask,
643 sizeof(bridge_local_intmask));
644 if (plen == -1) {
645 printk("pci_intmap_match: Warning! Bridge has intmap "
646 "but no intmask.\n");
647 printk("pci_intmap_match: Trying to recover.\n");
648 return 0;
649 }
650
651 if (pdev->bus->self != bus_dev)
652 map_slot = 1;
653 } else {
654 pregs = bus_pcp->prom_regs;
655 map_slot = 1;
656 }
657 }
658
659 if (map_slot) {
660 *interrupt = ((*interrupt
661 - 1
662 + PCI_SLOT(pdev->devfn)) & 0x3) + 1;
663 }
664
665 hi = pregs->phys_hi & intmask->phys_hi;
666 mid = pregs->phys_mid & intmask->phys_mid;
667 lo = pregs->phys_lo & intmask->phys_lo;
668 irq = *interrupt & intmask->interrupt;
669
670 for (i = 0; i < num_intmap; i++) {
671 if (intmap[i].phys_hi == hi &&
672 intmap[i].phys_mid == mid &&
673 intmap[i].phys_lo == lo &&
674 intmap[i].interrupt == irq) {
675 *interrupt = intmap[i].cinterrupt;
676 printk("PCI-IRQ: Routing bus[%2x] slot[%2x] map[%d] to INO[%02x]\n",
677 pdev->bus->number, PCI_SLOT(pdev->devfn),
678 map_slot, *interrupt);
679 return 1;
680 }
681 }
682
683 /* We will run this code even if pbm->num_pbm_intmap is zero, just so
684 * we can apply the slot mapping to the PROM interrupt property value.
685 * So do not spit out these warnings in that case.
686 */
687 if (num_intmap != 0) {
688 /* Print it both to OBP console and kernel one so that if bootup
689 * hangs here the user has the information to report.
690 */
691 prom_printf("pci_intmap_match: bus %02x, devfn %02x: ",
692 pdev->bus->number, pdev->devfn);
693 prom_printf("IRQ [%08x.%08x.%08x.%08x] not found in interrupt-map\n",
694 pregs->phys_hi, pregs->phys_mid, pregs->phys_lo, *interrupt);
695 prom_printf("Please email this information to davem@redhat.com\n");
696
697 printk("pci_intmap_match: bus %02x, devfn %02x: ",
698 pdev->bus->number, pdev->devfn);
699 printk("IRQ [%08x.%08x.%08x.%08x] not found in interrupt-map\n",
700 pregs->phys_hi, pregs->phys_mid, pregs->phys_lo, *interrupt);
701 printk("Please email this information to davem@redhat.com\n");
702 }
703
704 return 0;
705 }
706
pdev_fixup_irq(struct pci_dev * pdev)707 static void __init pdev_fixup_irq(struct pci_dev *pdev)
708 {
709 struct pcidev_cookie *pcp = pdev->sysdata;
710 struct pci_pbm_info *pbm = pcp->pbm;
711 struct pci_controller_info *p = pbm->parent;
712 unsigned int portid = pbm->portid;
713 unsigned int prom_irq;
714 int prom_node = pcp->prom_node;
715 int err;
716
717 /* If this is an empty EBUS device, sometimes OBP fails to
718 * give it a valid fully specified interrupts property.
719 * The EBUS hooked up to SunHME on PCI I/O boards of
720 * Ex000 systems is one such case.
721 *
722 * The interrupt is not important so just ignore it.
723 */
724 if (pdev->vendor == PCI_VENDOR_ID_SUN &&
725 pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
726 !prom_getchild(prom_node)) {
727 pdev->irq = 0;
728 return;
729 }
730
731 err = prom_getproperty(prom_node, "interrupts",
732 (char *)&prom_irq, sizeof(prom_irq));
733 if (err == 0 || err == -1) {
734 pdev->irq = 0;
735 return;
736 }
737
738 /* Fully specified already? */
739 if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
740 pdev->irq = p->irq_build(pbm, pdev, prom_irq);
741 goto have_irq;
742 }
743
744 /* An onboard device? (bit 5 set) */
745 if ((prom_irq & PCI_IRQ_INO) & 0x20) {
746 pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
747 goto have_irq;
748 }
749
750 /* Can we find a matching entry in the interrupt-map? */
751 if (pci_intmap_match(pdev, &prom_irq)) {
752 pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
753 goto have_irq;
754 }
755
756 /* Ok, we have to do it the hard way. */
757 {
758 unsigned int bus, slot, line;
759
760 bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
761
762 /* If we have a legal interrupt property, use it as
763 * the IRQ line.
764 */
765 if (prom_irq > 0 && prom_irq < 5) {
766 line = ((prom_irq - 1) & 3);
767 } else {
768 u8 pci_irq_line;
769
770 /* Else just directly consult PCI config space. */
771 pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
772 line = ((pci_irq_line - 1) & 3);
773 }
774
775 /* Now figure out the slot.
776 *
777 * Basically, device number zero on the top-level bus is
778 * always the PCI host controller. Slot 0 is then device 1.
779 * PBM A supports two external slots (0 and 1), and PBM B
780 * supports 4 external slots (0, 1, 2, and 3). On-board PCI
781 * devices are wired to device numbers outside of these
782 * ranges. -DaveM
783 */
784 if (pdev->bus->number == pbm->pci_first_busno) {
785 slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
786 } else {
787 struct pci_dev *bus_dev;
788
789 /* Underneath a bridge, use slot number of parent
790 * bridge which is closest to the PBM.
791 */
792 bus_dev = pdev->bus->self;
793 while (bus_dev->bus &&
794 bus_dev->bus->number != pbm->pci_first_busno)
795 bus_dev = bus_dev->bus->self;
796
797 slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
798 }
799 slot = slot << 2;
800
801 pdev->irq = p->irq_build(pbm, pdev,
802 ((portid << 6) & PCI_IRQ_IGN) |
803 (bus | slot | line));
804 }
805
806 have_irq:
807 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
808 pdev->irq & PCI_IRQ_INO);
809 }
810
pci_fixup_irq(struct pci_pbm_info * pbm,struct pci_bus * pbus)811 void __init pci_fixup_irq(struct pci_pbm_info *pbm,
812 struct pci_bus *pbus)
813 {
814 struct list_head *walk = &pbus->devices;
815
816 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
817 pdev_fixup_irq(pci_dev_b(walk));
818
819 walk = &pbus->children;
820 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
821 pci_fixup_irq(pbm, pci_bus_b(walk));
822 }
823
pdev_setup_busmastering(struct pci_dev * pdev,int is_66mhz)824 static void pdev_setup_busmastering(struct pci_dev *pdev, int is_66mhz)
825 {
826 u16 cmd;
827 u8 hdr_type, min_gnt, ltimer;
828
829 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
830 cmd |= PCI_COMMAND_MASTER;
831 pci_write_config_word(pdev, PCI_COMMAND, cmd);
832
833 /* Read it back, if the mastering bit did not
834 * get set, the device does not support bus
835 * mastering so we have nothing to do here.
836 */
837 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
838 if ((cmd & PCI_COMMAND_MASTER) == 0)
839 return;
840
841 /* Set correct cache line size, 64-byte on all
842 * Sparc64 PCI systems. Note that the value is
843 * measured in 32-bit words.
844 */
845 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
846 64 / sizeof(u32));
847
848 pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr_type);
849 hdr_type &= ~0x80;
850 if (hdr_type != PCI_HEADER_TYPE_NORMAL)
851 return;
852
853 /* If the latency timer is already programmed with a non-zero
854 * value, assume whoever set it (OBP or whoever) knows what
855 * they are doing.
856 */
857 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, <imer);
858 if (ltimer != 0)
859 return;
860
861 /* XXX Since I'm tipping off the min grant value to
862 * XXX choose a suitable latency timer value, I also
863 * XXX considered making use of the max latency value
864 * XXX as well. Unfortunately I've seen too many bogusly
865 * XXX low settings for it to the point where it lacks
866 * XXX any usefulness. In one case, an ethernet card
867 * XXX claimed a min grant of 10 and a max latency of 5.
868 * XXX Now, if I had two such cards on the same bus I
869 * XXX could not set the desired burst period (calculated
870 * XXX from min grant) without violating the max latency
871 * XXX bound. Duh...
872 * XXX
873 * XXX I blame dumb PC bios implementors for stuff like
874 * XXX this, most of them don't even try to do something
875 * XXX sensible with latency timer values and just set some
876 * XXX default value (usually 32) into every device.
877 */
878
879 pci_read_config_byte(pdev, PCI_MIN_GNT, &min_gnt);
880
881 if (min_gnt == 0) {
882 /* If no min_gnt setting then use a default
883 * value.
884 */
885 if (is_66mhz)
886 ltimer = 16;
887 else
888 ltimer = 32;
889 } else {
890 int shift_factor;
891
892 if (is_66mhz)
893 shift_factor = 2;
894 else
895 shift_factor = 3;
896
897 /* Use a default value when the min_gnt value
898 * is erroneously high.
899 */
900 if (((unsigned int) min_gnt << shift_factor) > 512 ||
901 ((min_gnt << shift_factor) & 0xff) == 0) {
902 ltimer = 8 << shift_factor;
903 } else {
904 ltimer = min_gnt << shift_factor;
905 }
906 }
907
908 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ltimer);
909 }
910
pci_determine_66mhz_disposition(struct pci_pbm_info * pbm,struct pci_bus * pbus)911 void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
912 struct pci_bus *pbus)
913 {
914 struct list_head *walk;
915 int all_are_66mhz;
916 u16 status;
917
918 if (pbm->is_66mhz_capable == 0) {
919 all_are_66mhz = 0;
920 goto out;
921 }
922
923 walk = &pbus->devices;
924 all_are_66mhz = 1;
925 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
926 struct pci_dev *pdev = pci_dev_b(walk);
927
928 pci_read_config_word(pdev, PCI_STATUS, &status);
929 if (!(status & PCI_STATUS_66MHZ)) {
930 all_are_66mhz = 0;
931 break;
932 }
933 }
934 out:
935 pbm->all_devs_66mhz = all_are_66mhz;
936
937 printk("PCI%d(PBM%c): Bus running at %dMHz\n",
938 pbm->parent->index,
939 (pbm == &pbm->parent->pbm_A) ? 'A' : 'B',
940 (all_are_66mhz ? 66 : 33));
941 }
942
pci_setup_busmastering(struct pci_pbm_info * pbm,struct pci_bus * pbus)943 void pci_setup_busmastering(struct pci_pbm_info *pbm,
944 struct pci_bus *pbus)
945 {
946 struct list_head *walk = &pbus->devices;
947 int is_66mhz;
948
949 is_66mhz = pbm->is_66mhz_capable && pbm->all_devs_66mhz;
950
951 for (walk = walk->next; walk != &pbus->devices; walk = walk->next)
952 pdev_setup_busmastering(pci_dev_b(walk), is_66mhz);
953
954 walk = &pbus->children;
955 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
956 pci_setup_busmastering(pbm, pci_bus_b(walk));
957 }
958
pci_register_legacy_regions(struct resource * io_res,struct resource * mem_res)959 void pci_register_legacy_regions(struct resource *io_res,
960 struct resource *mem_res)
961 {
962 struct resource *p;
963
964 /* VGA Video RAM. */
965 p = kmalloc(sizeof(*p), GFP_KERNEL);
966 if (!p)
967 return;
968
969 memset(p, 0, sizeof(*p));
970 p->name = "Video RAM area";
971 p->start = mem_res->start + 0xa0000UL;
972 p->end = p->start + 0x1ffffUL;
973 p->flags = IORESOURCE_BUSY;
974 request_resource(mem_res, p);
975
976 p = kmalloc(sizeof(*p), GFP_KERNEL);
977 if (!p)
978 return;
979
980 memset(p, 0, sizeof(*p));
981 p->name = "System ROM";
982 p->start = mem_res->start + 0xf0000UL;
983 p->end = p->start + 0xffffUL;
984 p->flags = IORESOURCE_BUSY;
985 request_resource(mem_res, p);
986
987 p = kmalloc(sizeof(*p), GFP_KERNEL);
988 if (!p)
989 return;
990
991 memset(p, 0, sizeof(*p));
992 p->name = "Video ROM";
993 p->start = mem_res->start + 0xc0000UL;
994 p->end = p->start + 0x7fffUL;
995 p->flags = IORESOURCE_BUSY;
996 request_resource(mem_res, p);
997 }
998
999 /* Generic helper routines for PCI error reporting. */
pci_scan_for_target_abort(struct pci_controller_info * p,struct pci_pbm_info * pbm,struct pci_bus * pbus)1000 void pci_scan_for_target_abort(struct pci_controller_info *p,
1001 struct pci_pbm_info *pbm,
1002 struct pci_bus *pbus)
1003 {
1004 struct list_head *walk = &pbus->devices;
1005
1006 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
1007 struct pci_dev *pdev = pci_dev_b(walk);
1008 u16 status, error_bits;
1009
1010 pci_read_config_word(pdev, PCI_STATUS, &status);
1011 error_bits =
1012 (status & (PCI_STATUS_SIG_TARGET_ABORT |
1013 PCI_STATUS_REC_TARGET_ABORT));
1014 if (error_bits) {
1015 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1016 printk("PCI%d(PBM%c): Device [%s] saw Target Abort [%016x]\n",
1017 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1018 pdev->name, status);
1019 }
1020 }
1021
1022 walk = &pbus->children;
1023 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
1024 pci_scan_for_target_abort(p, pbm, pci_bus_b(walk));
1025 }
1026
pci_scan_for_master_abort(struct pci_controller_info * p,struct pci_pbm_info * pbm,struct pci_bus * pbus)1027 void pci_scan_for_master_abort(struct pci_controller_info *p,
1028 struct pci_pbm_info *pbm,
1029 struct pci_bus *pbus)
1030 {
1031 struct list_head *walk = &pbus->devices;
1032
1033 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
1034 struct pci_dev *pdev = pci_dev_b(walk);
1035 u16 status, error_bits;
1036
1037 pci_read_config_word(pdev, PCI_STATUS, &status);
1038 error_bits =
1039 (status & (PCI_STATUS_REC_MASTER_ABORT));
1040 if (error_bits) {
1041 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1042 printk("PCI%d(PBM%c): Device [%s] received Master Abort [%016x]\n",
1043 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1044 pdev->name, status);
1045 }
1046 }
1047
1048 walk = &pbus->children;
1049 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
1050 pci_scan_for_master_abort(p, pbm, pci_bus_b(walk));
1051 }
1052
pci_scan_for_parity_error(struct pci_controller_info * p,struct pci_pbm_info * pbm,struct pci_bus * pbus)1053 void pci_scan_for_parity_error(struct pci_controller_info *p,
1054 struct pci_pbm_info *pbm,
1055 struct pci_bus *pbus)
1056 {
1057 struct list_head *walk = &pbus->devices;
1058
1059 for (walk = walk->next; walk != &pbus->devices; walk = walk->next) {
1060 struct pci_dev *pdev = pci_dev_b(walk);
1061 u16 status, error_bits;
1062
1063 pci_read_config_word(pdev, PCI_STATUS, &status);
1064 error_bits =
1065 (status & (PCI_STATUS_PARITY |
1066 PCI_STATUS_DETECTED_PARITY));
1067 if (error_bits) {
1068 pci_write_config_word(pdev, PCI_STATUS, error_bits);
1069 printk("PCI%d(PBM%c): Device [%s] saw Parity Error [%016x]\n",
1070 p->index, ((pbm == &p->pbm_A) ? 'A' : 'B'),
1071 pdev->name, status);
1072 }
1073 }
1074
1075 walk = &pbus->children;
1076 for (walk = walk->next; walk != &pbus->children; walk = walk->next)
1077 pci_scan_for_parity_error(p, pbm, pci_bus_b(walk));
1078 }
1079