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Searched refs:PF2 (Results 1 – 23 of 23) sorted by relevance

/linux-6.1.9/arch/x86/include/asm/
Dxor.h43 #define PF2(x) " prefetchnta "PF_OFFS(x)"(%[p3]) ;\n" macro
164 PF2(i) \ in xor_sse_3()
165 PF2(i + 2) \ in xor_sse_3()
220 BLK64(PF2, XO2, i) \ in xor_sse_3_pf64()
263 PF2(i) \ in xor_sse_4()
264 PF2(i + 2) \ in xor_sse_4()
327 BLK64(PF2, XO2, i) \ in xor_sse_4_pf64()
373 PF2(i) \ in xor_sse_5()
374 PF2(i + 2) \ in xor_sse_5()
445 BLK64(PF2, XO2, i) \ in xor_sse_5_pf64()
/linux-6.1.9/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-pcie.dtsi24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
/linux-6.1.9/arch/arm/boot/dts/
Dsuniv-f1c100s.dtsi164 pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
Dsun8i-a23-a33.dtsi376 pins = "PF0", "PF1", "PF2",
438 pins = "PF2", "PF4";
Dsun4i-a10.dtsi752 pins = "PF0", "PF1", "PF2",
831 pins = "PF2", "PF4";
Dsun8i-a83t.dtsi788 pins = "PF0", "PF1", "PF2",
828 pins = "PF2", "PF4";
Dsun8i-v3s.dtsi402 pins = "PF0", "PF1", "PF2", "PF3",
Dsun7i-a20.dtsi951 pins = "PF0", "PF1", "PF2",
1069 pins = "PF2", "PF4";
Dsun5i.dtsi505 pins = "PF0", "PF1", "PF2", "PF3",
Dsunxi-h3-h5.dtsi441 pins = "PF0", "PF1", "PF2", "PF3",
Dsun9i-a80.dtsi1008 pins = "PF0", "PF1" ,"PF2", "PF3",
Dsun8i-r40.dtsi630 pins = "PF0", "PF1", "PF2",
Dsun6i-a31.dtsi689 pins = "PF0", "PF1", "PF2",
/linux-6.1.9/Documentation/devicetree/bindings/net/dsa/
Dmscc,ocelot.yaml43 If any external switch port is enabled, the enetc PF2 (enetc_port2) should
/linux-6.1.9/arch/arm64/boot/dts/allwinner/
Dsun50i-h616.dtsi187 pins = "PF0", "PF1", "PF2", "PF3",
Dsun50i-h6.dtsi359 pins = "PF0", "PF1", "PF2", "PF3",
Dsun50i-a64.dtsi735 pins = "PF0", "PF1", "PF2", "PF3",
/linux-6.1.9/drivers/pinctrl/renesas/
Dpfc-shx3.c341 PINMUX_GPIO(PF2),
Dpfc-sh7786.c457 PINMUX_GPIO(PF2),
Dpfc-sh7785.c725 PINMUX_GPIO(PF2),
Dpfc-sh7203.c809 PINMUX_GPIO(PF2),
Dpfc-sh7264.c1149 PINMUX_GPIO(PF2),
Dpfc-sh7269.c1543 PINMUX_GPIO(PF2),