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Searched refs:ramfc (Results 1 – 19 of 19) sorted by relevance

/linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv40.c41 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc; in nv40_chan_ramfc_write() local
46 nvkm_kmap(ramfc); in nv40_chan_ramfc_write()
47 nvkm_wo32(ramfc, base + 0x00, offset); in nv40_chan_ramfc_write()
48 nvkm_wo32(ramfc, base + 0x04, offset); in nv40_chan_ramfc_write()
49 nvkm_wo32(ramfc, base + 0x0c, chan->push->addr >> 4); in nv40_chan_ramfc_write()
50 nvkm_wo32(ramfc, base + 0x18, 0x30000000 | in nv40_chan_ramfc_write()
57 nvkm_wo32(ramfc, base + 0x3c, 0x0001ffff); in nv40_chan_ramfc_write()
58 nvkm_done(ramfc); in nv40_chan_ramfc_write()
105 .ramfc = &nv40_chan_ramfc,
129 struct nvkm_memory *ramfc = device->imem->ramfc; in nv40_ectx_bind() local
[all …]
Dnv17.c40 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc; in nv17_chan_ramfc_write() local
45 nvkm_kmap(ramfc); in nv17_chan_ramfc_write()
46 nvkm_wo32(ramfc, base + 0x00, offset); in nv17_chan_ramfc_write()
47 nvkm_wo32(ramfc, base + 0x04, offset); in nv17_chan_ramfc_write()
48 nvkm_wo32(ramfc, base + 0x0c, chan->push->addr >> 4); in nv17_chan_ramfc_write()
49 nvkm_wo32(ramfc, base + 0x14, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES | in nv17_chan_ramfc_write()
55 nvkm_done(ramfc); in nv17_chan_ramfc_write()
87 .ramfc = &nv17_chan_ramfc,
99 struct nvkm_memory *ramfc = imem->ramfc; in nv17_fifo_init() local
108 nvkm_wr32(device, NV03_PFIFO_RAMFC, nvkm_memory_addr(ramfc) >> 8 | in nv17_fifo_init()
Dnv10.c39 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc; in nv10_chan_ramfc_write() local
44 nvkm_kmap(ramfc); in nv10_chan_ramfc_write()
45 nvkm_wo32(ramfc, base + 0x00, offset); in nv10_chan_ramfc_write()
46 nvkm_wo32(ramfc, base + 0x04, offset); in nv10_chan_ramfc_write()
47 nvkm_wo32(ramfc, base + 0x0c, chan->push->addr >> 4); in nv10_chan_ramfc_write()
48 nvkm_wo32(ramfc, base + 0x14, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES | in nv10_chan_ramfc_write()
54 nvkm_done(ramfc); in nv10_chan_ramfc_write()
81 .ramfc = &nv10_chan_ramfc,
Dg84.c39 nvkm_wr32(device, 0x002600 + (chan->id * 4), chan->ramfc->addr >> 8); in g84_chan_bind()
61 ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, chan->inst, &chan->ramfc); in g84_chan_ramfc_write()
69 nvkm_kmap(chan->ramfc); in g84_chan_ramfc_write()
70 nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); in g84_chan_ramfc_write()
71 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in g84_chan_ramfc_write()
72 nvkm_wo32(chan->ramfc, 0x48, chan->push->node->offset >> 4); in g84_chan_ramfc_write()
73 nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(offset)); in g84_chan_ramfc_write()
74 nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(offset) | (limit2 << 16)); in g84_chan_ramfc_write()
75 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in g84_chan_ramfc_write()
76 nvkm_wo32(chan->ramfc, 0x78, 0x00000000); in g84_chan_ramfc_write()
[all …]
Dnv04.c45 struct nvkm_memory *fctx = device->imem->ramfc; in nv04_chan_stop()
62 c = chan->func->ramfc->layout; in nv04_chan_stop()
73 c = chan->func->ramfc->layout; in nv04_chan_stop()
105 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc; in nv04_chan_ramfc_clear() local
106 const struct nvkm_ramfc_layout *c = chan->func->ramfc->layout; in nv04_chan_ramfc_clear()
108 nvkm_kmap(ramfc); in nv04_chan_ramfc_clear()
110 nvkm_wo32(ramfc, chan->ramfc_offset + c->ctxp, 0x00000000); in nv04_chan_ramfc_clear()
112 nvkm_done(ramfc); in nv04_chan_ramfc_clear()
118 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc; in nv04_chan_ramfc_write() local
123 nvkm_kmap(ramfc); in nv04_chan_ramfc_write()
[all …]
Dnv50.c76 nvkm_wr32(device, 0x002600 + (chan->id * 4), chan->ramfc->addr >> 12); in nv50_chan_bind()
86 ret = nvkm_gpuobj_new(device, 0x0200, 0x1000, true, chan->inst, &chan->ramfc); in nv50_chan_ramfc_write()
102 nvkm_kmap(chan->ramfc); in nv50_chan_ramfc_write()
103 nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); in nv50_chan_ramfc_write()
104 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in nv50_chan_ramfc_write()
105 nvkm_wo32(chan->ramfc, 0x48, chan->push->node->offset >> 4); in nv50_chan_ramfc_write()
106 nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(offset)); in nv50_chan_ramfc_write()
107 nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(offset) | (limit2 << 16)); in nv50_chan_ramfc_write()
108 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in nv50_chan_ramfc_write()
109 nvkm_wo32(chan->ramfc, 0x78, 0x00000000); in nv50_chan_ramfc_write()
[all …]
Dchan.c269 if (chan->func->ramfc->clear) in nvkm_chan_del()
270 chan->func->ramfc->clear(chan); in nvkm_chan_del()
276 nvkm_gpuobj_del(&chan->ramfc); in nvkm_chan_del()
360 (!func->ramfc->ctxdma != !dmaobj) || in nvkm_chan_new_()
361 ((func->ramfc->devm < devm) && devm != BIT(0)) || in nvkm_chan_new_()
362 (!func->ramfc->priv && priv)) { in nvkm_chan_new_()
366 func->userd->bar < 0, userd, func->ramfc->ctxdma, dmaobj, in nvkm_chan_new_()
367 func->ramfc->devm, devm, func->ramfc->priv, priv); in nvkm_chan_new_()
432 if (func->ramfc->ctxdma) { in nvkm_chan_new_()
473 ret = chan->func->ramfc->write(chan, offset, length, devm, priv); in nvkm_chan_new_()
Dgk110.c52 .ramfc = &gk104_chan_ramfc,
Dchan.h46 } *ramfc; member
Dgm107.c37 .ramfc = &gk104_chan_ramfc,
Dtu102.c52 .ramfc = &gv100_chan_ramfc,
Dgv100.c82 .ramfc = &gv100_chan_ramfc,
Dga100.c100 .ramfc = &ga100_chan_ramfc,
Dgk104.c125 .ramfc = &gk104_chan_ramfc,
Dgf100.c152 .ramfc = &gf100_chan_ramfc,
/linux-6.6.21/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dinstmem.h24 struct nvkm_memory *ramfc; member
/linux-6.6.21/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
Dnv04.c184 &imem->base.ramfc); in nv04_instmem_oneinit()
201 nvkm_memory_unref(&imem->base.ramfc); in nv04_instmem_dtor()
Dnv40.c206 &imem->base.ramfc); in nv40_instmem_oneinit()
217 nvkm_memory_unref(&imem->base.ramfc); in nv40_instmem_dtor()
/linux-6.6.21/drivers/gpu/drm/nouveau/include/nvkm/engine/
Dfifo.h28 struct nvkm_gpuobj *ramfc; member