39 	nvkm_wr32(device, 0x002600 + (chan->id * 4), chan->ramfc->addr >> 8);  in g84_chan_bind()
61 	ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, chan->inst, &chan->ramfc);  in g84_chan_ramfc_write()
69 	nvkm_kmap(chan->ramfc);  in g84_chan_ramfc_write()
70 	nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078);  in g84_chan_ramfc_write()
71 	nvkm_wo32(chan->ramfc, 0x44, 0x01003fff);  in g84_chan_ramfc_write()
72 	nvkm_wo32(chan->ramfc, 0x48, chan->push->node->offset >> 4);  in g84_chan_ramfc_write()
73 	nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(offset));  in g84_chan_ramfc_write()
74 	nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(offset) | (limit2 << 16));  in g84_chan_ramfc_write()
75 	nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff);  in g84_chan_ramfc_write()
76 	nvkm_wo32(chan->ramfc, 0x78, 0x00000000);  in g84_chan_ramfc_write()
77 	nvkm_wo32(chan->ramfc, 0x7c, 0x30000000 | devm);  in g84_chan_ramfc_write()
78 	nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |  in g84_chan_ramfc_write()
81 	nvkm_wo32(chan->ramfc, 0x88, chan->cache->addr >> 10);  in g84_chan_ramfc_write()
82 	nvkm_wo32(chan->ramfc, 0x98, chan->inst->addr >> 12);  in g84_chan_ramfc_write()
83 	nvkm_done(chan->ramfc);  in g84_chan_ramfc_write()
98 	.ramfc = &g84_chan_ramfc,