Searched refs:DISP_CC_MDSS_BYTE0_CLK (Results 1 – 25 of 26) sorted by relevance
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| /linux-6.1.9/include/dt-bindings/clock/ |
| D | qcom,dispcc-qcm2290.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| D | qcom,sm6115-dispcc.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
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| D | qcom,dispcc-sm6125.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| D | qcom,dispcc-sc7180.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 4 macro
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| D | qcom,dispcc-sm6350.h | 14 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| D | qcom,dispcc-sdm845.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| D | qcom,dispcc-sc7280.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| D | qcom,dispcc-sm8150.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| D | qcom,dispcc-sm8250.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| D | qcom,dispcc-sm8350.h | 12 #define DISP_CC_MDSS_BYTE0_CLK 2 macro
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| D | qcom,sm8450-dispcc.h | 13 #define DISP_CC_MDSS_BYTE0_CLK 3 macro
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| /linux-6.1.9/Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 159 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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| /linux-6.1.9/drivers/clk/qcom/ |
| D | dispcc-qcm2290.c | 470 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sm6115.c | 533 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sc7180.c | 645 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sm6125.c | 621 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sm6350.c | 703 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sdm845.c | 772 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sc7280.c | 803 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sm8250.c | 1146 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| D | dispcc-sm8450.c | 1647 [DISP_CC_MDSS_BYTE0_CLK] = &disp_cc_mdss_byte0_clk.clkr,
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| /linux-6.1.9/arch/arm64/boot/dts/qcom/ |
| D | sm8250-sony-xperia-edo.dtsi | 42 <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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| D | sc7180.dtsi | 2995 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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| D | sdm845.dtsi | 4532 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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| D | sm8250.dtsi | 3535 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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