Searched refs:performance_level_count (Results 1 – 12 of 12) sorted by relevance
807 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()824 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()826 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()833 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()844 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()850 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()855 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()863 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()868 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()872 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()[all …]
2288 if (state->performance_level_count == 0) in si_populate_power_containment_values()2291 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2302 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2370 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2373 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2394 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3011 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()3016 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3036 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3062 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()[all …]
173 u16 performance_level_count; member
47 u16 performance_level_count; member
805 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()816 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3719 if (state->performance_level_count < 1) in ci_trim_dpm_states()3722 if (state->performance_level_count == 1) in ci_trim_dpm_states()3824 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3826 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3865 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3866 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4767 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5445 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
2402 if (state->performance_level_count == 0) in si_populate_power_containment_values()2405 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2416 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2483 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2486 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2507 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3178 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3179 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3196 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()3197 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_after_set_eng_clock()[all …]
622 u16 performance_level_count; member
3304 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3365 [smu7_ps->performance_level_count - 1].memory_clock; in smu7_apply_state_adjust_rules()3432 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3462 [smu7_ps->performance_level_count-1].memory_clock; in smu7_dpm_get_mclk()3484 [smu7_ps->performance_level_count-1].engine_clock; in smu7_dpm_get_sclk()3598 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3601 …(smu7_power_state->performance_level_count < smum_get_mac_definition(hwmgr, SMU_MAX_LEVELS_GRAPHIC… in smu7_get_pp_table_entry_callback_func_v1()3606 (smu7_power_state->performance_level_count <= in smu7_get_pp_table_entry_callback_func_v1()3626 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3694 for (i = 0; i < ps->performance_level_count; i++) { in smu7_get_pp_table_entry_v1()[all …]
3149 [vega10_ps->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3152 (vega10_ps->performance_level_count < in vega10_get_pp_table_entry_callback_func()3158 (vega10_ps->performance_level_count <= in vega10_get_pp_table_entry_callback_func()3173 [vega10_ps->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3262 if (vega10_ps->performance_level_count != 2) in vega10_apply_state_adjust_rules()3271 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3379 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3397 [vega10_ps->performance_level_count - 1].gfx_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3400 [vega10_ps->performance_level_count - 1].mem_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3519 PP_ASSERT_WITH_CODE((vega10_ps->performance_level_count >= 1), in vega10_trim_dpm_states()[all …]
82 uint16_t performance_level_count; member
109 uint16_t performance_level_count; member
126 uint16_t performance_level_count; member