Home
last modified time | relevance | path

Searched refs:hsp (Results 1 – 21 of 21) sorted by relevance

/linux-5.19.10/drivers/mailbox/
Dtegra-hsp.c65 struct tegra_hsp *hsp; member
126 static inline u32 tegra_hsp_readl(struct tegra_hsp *hsp, unsigned int offset) in tegra_hsp_readl() argument
128 return readl(hsp->regs + offset); in tegra_hsp_readl()
131 static inline void tegra_hsp_writel(struct tegra_hsp *hsp, u32 value, in tegra_hsp_writel() argument
134 writel(value, hsp->regs + offset); in tegra_hsp_writel()
159 __tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) in __tegra_hsp_doorbell_get() argument
163 list_for_each_entry(entry, &hsp->doorbells, list) in __tegra_hsp_doorbell_get()
171 tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) in tegra_hsp_doorbell_get() argument
176 spin_lock_irqsave(&hsp->lock, flags); in tegra_hsp_doorbell_get()
177 db = __tegra_hsp_doorbell_get(hsp, master); in tegra_hsp_doorbell_get()
[all …]
DMakefile48 obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
/linux-5.19.10/Documentation/devicetree/bindings/mailbox/
Dnvidia,tegra186-hsp.yaml4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
59 <dt-bindings/mailbox/tegra186-hsp.h>
63 pattern: "^hsp@[0-9a-f]+$"
67 - const: nvidia,tegra186-hsp
68 - const: nvidia,tegra194-hsp
70 - const: nvidia,tegra234-hsp
71 - const: nvidia,tegra194-hsp
111 #include <dt-bindings/mailbox/tegra186-hsp.h>
113 hsp_top0: hsp@3c00000 {
114 compatible = "nvidia,tegra186-hsp";
/linux-5.19.10/drivers/video/fbdev/
Dcarminefb.c62 u32 hsp; member
105 .hsp = 672,
117 .hsp = 864,
371 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
380 hsp = par->res->hsp - 1; in set_display_parameters()
393 (hsp)); in set_display_parameters()
/linux-5.19.10/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.yaml26 - .../mailbox/nvidia,tegra186-hsp.yaml
129 #include <dt-bindings/mailbox/tegra186-hsp.h>
132 hsp_top0: hsp@3c00000 {
133 compatible = "nvidia,tegra186-hsp";
/linux-5.19.10/drivers/scsi/lpfc/
Dlpfc_nportdisc.c76 volatile struct serv_parm *hsp = &vport->fc_sparam; in lpfc_check_sparm() local
88 hsp_value = ((hsp->cls1.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
89 hsp->cls1.rcvDataSizeLsb); in lpfc_check_sparm()
96 hsp->cls1.rcvDataSizeLsb; in lpfc_check_sparm()
98 hsp->cls1.rcvDataSizeMsb; in lpfc_check_sparm()
105 hsp_value = ((hsp->cls2.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
106 hsp->cls2.rcvDataSizeLsb); in lpfc_check_sparm()
113 hsp->cls2.rcvDataSizeLsb; in lpfc_check_sparm()
115 hsp->cls2.rcvDataSizeMsb; in lpfc_check_sparm()
122 hsp_value = ((hsp->cls3.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
[all …]
Dlpfc_ct.c3069 struct serv_parm *hsp; in lpfc_fdmi_port_attr_max_frame() local
3075 hsp = (struct serv_parm *)&vport->fc_sparam; in lpfc_fdmi_port_attr_max_frame()
3076 ae->un.AttrInt = (((uint32_t) hsp->cmn.bbRcvSizeMsb & 0x0F) << 8) | in lpfc_fdmi_port_attr_max_frame()
3077 (uint32_t) hsp->cmn.bbRcvSizeLsb; in lpfc_fdmi_port_attr_max_frame()
/linux-5.19.10/drivers/clk/imx/
Dclk-imx31.c40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
63 clk[hsp] = imx_clk_divider("hsp", "mcu_main", base + MXC_CCM_PDR0, 11, 3); in _mx31_clocks_init()
Dclk-imx35.c65 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
130 clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]); in _mx35_clocks_init()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hpo_dp_stream_encoder.c203 uint8_t hsp; in dcn31_hpo_dp_stream_enc_set_stream_attribute() local
361 hsp = hw_crtc_timing.flags.HSYNC_POSITIVE_POLARITY ? 0 : 0x80; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
421 MSA_DATA_LANE_0, hsp | (hw_crtc_timing.h_sync_width >> 8), in dcn31_hpo_dp_stream_enc_set_stream_attribute()
/linux-5.19.10/drivers/video/fbdev/mb862xx/
Dmb862xxfbdrv.c56 static inline int hsp(struct fb_var_screeninfo *var) in hsp() function
260 pack((fbi->var.hsync_len - 1), hsp(&fbi->var)); in mb862xxfb_set_par()
449 unsigned long hsp, vsp, ht, vt; in mb862xxfb_init_fbinfo() local
472 hsp = (reg & 0xffff) + 1; in mb862xxfb_init_fbinfo()
474 fbi->var.right_margin = hsp - fbi->var.xres; in mb862xxfb_init_fbinfo()
475 fbi->var.left_margin = ht - hsp - fbi->var.hsync_len; in mb862xxfb_init_fbinfo()
/linux-5.19.10/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.yaml54 #include <dt-bindings/mailbox/tegra186-hsp.h>
/linux-5.19.10/Documentation/devicetree/bindings/clock/
Dimx35-clock.yaml24 hsp 5
Dimx31-clock.yaml26 hsp 7
/linux-5.19.10/arch/arm64/boot/dts/nvidia/
Dtegra234.dtsi6 #include <dt-bindings/mailbox/tegra186-hsp.h>
776 hsp_top0: hsp@3c00000 {
777 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
936 hsp_aon: hsp@c150000 {
937 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
Dtegra186-p3310.dtsi160 hsp@3c00000 {
Dtegra194.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
1285 hsp_top0: hsp@3c00000 {
1286 compatible = "nvidia,tegra194-hsp";
1463 hsp_aon: hsp@c150000 {
1464 compatible = "nvidia,tegra194-hsp";
Dtegra186.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
1137 hsp_top0: hsp@3c00000 {
1138 compatible = "nvidia,tegra186-hsp";
Dtegra186-p3509-0000+p3636-0001.dts231 hsp@3c00000 {
/linux-5.19.10/drivers/atm/
Dhe.c1466 he_dev->hsp = dma_alloc_coherent(&he_dev->pci_dev->dev, in he_start()
1469 if (he_dev->hsp == NULL) { in he_start()
1568 if (he_dev->hsp) in he_stop()
1570 he_dev->hsp, he_dev->hsp_phys); in he_stop()
1646 he_dev->hsp->group[group].rbrq_tail); in he_service_rbrq()
1806 he_dev->hsp->group[group].tbrq_tail); in he_service_tbrq()
Dhe.h310 struct he_hsp *hsp; member