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Searched refs:SM (Results 1 – 24 of 24) sorted by relevance

/linux-2.6.39/drivers/net/wireless/ath/ath9k/
Dbtcoex.c57 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) | in ath9k_hw_init_btcoex_hw()
58 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) | in ath9k_hw_init_btcoex_hw()
59 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) | in ath9k_hw_init_btcoex_hw()
60 SM(ath_bt_config.bt_mode, AR_BT_MODE) | in ath9k_hw_init_btcoex_hw()
61 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) | in ath9k_hw_init_btcoex_hw()
62 SM(ath_bt_config.bt_rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) | in ath9k_hw_init_btcoex_hw()
63 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) | in ath9k_hw_init_btcoex_hw()
64 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) | in ath9k_hw_init_btcoex_hw()
65 SM(qnum, AR_BT_QCU_THRESH); in ath9k_hw_init_btcoex_hw()
68 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) | in ath9k_hw_init_btcoex_hw()
[all …]
Deeprom_9287.c399 regval = SM(pdGainOverlap_t2, in ath9k_hw_set_ar9287_power_cal_table()
401 | SM(gainBoundaries[0], in ath9k_hw_set_ar9287_power_cal_table()
403 | SM(gainBoundaries[1], in ath9k_hw_set_ar9287_power_cal_table()
405 | SM(gainBoundaries[2], in ath9k_hw_set_ar9287_power_cal_table()
407 | SM(gainBoundaries[3], in ath9k_hw_set_ar9287_power_cal_table()
896 SM(pModal->iqCalICh[i], in ath9k_hw_ar9287_set_board_values()
898 SM(pModal->iqCalQCh[i], in ath9k_hw_ar9287_set_board_values()
929 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF) in ath9k_hw_ar9287_set_board_values()
930 | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF) in ath9k_hw_ar9287_set_board_values()
931 | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON) in ath9k_hw_ar9287_set_board_values()
[all …]
Dmac.c32 SM(ah->txok_interrupt_mask, AR_IMR_S0_QCU_TXOK) in ath9k_hw_set_txq_interrupts()
33 | SM(ah->txdesc_interrupt_mask, AR_IMR_S0_QCU_TXDESC)); in ath9k_hw_set_txq_interrupts()
35 SM(ah->txerr_interrupt_mask, AR_IMR_S1_QCU_TXERR) in ath9k_hw_set_txq_interrupts()
36 | SM(ah->txeol_interrupt_mask, AR_IMR_S1_QCU_TXEOL)); in ath9k_hw_set_txq_interrupts()
136 (txcfg & ~AR_FTRIG) | SM(newLevel, AR_FTRIG)); in ath9k_hw_updatetxtriglevel()
451 SM(cwMin, AR_D_LCL_IFS_CWMIN) | in ath9k_hw_resettxqueue()
452 SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX) | in ath9k_hw_resettxqueue()
453 SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS)); in ath9k_hw_resettxqueue()
456 SM(INIT_SSH_RETRY, AR_D_RETRY_LIMIT_STA_SH) | in ath9k_hw_resettxqueue()
457 SM(INIT_SLG_RETRY, AR_D_RETRY_LIMIT_STA_LG) | in ath9k_hw_resettxqueue()
[all …]
Dar9002_mac.c291 | SM(txPower, AR_XmitPower) in ar9002_hw_set11n_txdesc()
298 (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0) in ar9002_hw_set11n_txdesc()
299 | SM(type, AR_FrameType) in ar9002_hw_set11n_txdesc()
304 ads->ds_ctl6 = SM(keyType, AR_EncrType); in ar9002_hw_set11n_txdesc()
347 | SM(0, AR_BurstDur); in ar9002_hw_set11n_ratescenario()
364 | SM(rtsctsRate, AR_RTSCTSRate); in ar9002_hw_set11n_ratescenario()
376 ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen); in ar9002_hw_set11n_aggr_first()
389 ctl6 |= SM(numDelims, AR_PadDelim); in ar9002_hw_set11n_aggr_middle()
415 ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur); in ar9002_hw_set11n_burstduration()
Deeprom_4k.c320 SM(pdGainOverlap_t2, in ath9k_hw_set_4k_power_cal_table()
322 | SM(gainBoundaries[0], in ath9k_hw_set_4k_power_cal_table()
324 | SM(gainBoundaries[1], in ath9k_hw_set_4k_power_cal_table()
326 | SM(gainBoundaries[2], in ath9k_hw_set_4k_power_cal_table()
328 | SM(gainBoundaries[3], in ath9k_hw_set_4k_power_cal_table()
733 SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) | in ath9k_hw_4k_set_gain()
734 SM(pModal->iqCalQCh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF)); in ath9k_hw_4k_set_gain()
805 regVal |= SM(ant_div_control1, in ath9k_hw_4k_set_board_values()
807 regVal |= SM(ant_div_control2, in ath9k_hw_4k_set_board_values()
809 regVal |= SM((ant_div_control2 >> 2), in ath9k_hw_4k_set_board_values()
[all …]
Dar9003_mac.c330 | SM(txpower, AR_XmitPower) in ar9003_hw_set11n_txdesc()
337 (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0) in ar9003_hw_set11n_txdesc()
338 | SM(type, AR_FrameType) in ar9003_hw_set11n_txdesc()
343 ads->ctl17 = SM(keyType, AR_EncrType) | in ar9003_hw_set11n_txdesc()
385 | SM(0, AR_BurstDur); in ar9003_hw_set11n_ratescenario()
402 | SM(rtsctsRate, AR_RTSCTSRate); in ar9003_hw_set11n_ratescenario()
432 ctl17 |= SM(aggrLen, AR_AggrLen); in ar9003_hw_set11n_aggr_first()
435 ctl17 |= SM(ndelim, AR_PadDelim); in ar9003_hw_set11n_aggr_first()
440 ads->ctl17 |= SM(aggrLen, AR_AggrLen); in ar9003_hw_set11n_aggr_first()
458 ctl17 |= SM(numDelims, AR_PadDelim); in ar9003_hw_set11n_aggr_middle()
[all …]
Dar9002_phy.c254 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH)); in ar9002_hw_spur_mitigate()
283 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) | in ar9002_hw_spur_mitigate()
284 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE)); in ar9002_hw_spur_mitigate()
452 pll = SM(0x5, AR_RTC_9160_PLL_REFDIV); in ar9002_hw_compute_pll_control()
455 pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL); in ar9002_hw_compute_pll_control()
457 pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL); in ar9002_hw_compute_pll_control()
465 pll |= SM(0x28, AR_RTC_9160_PLL_DIV); in ar9002_hw_compute_pll_control()
467 pll |= SM(0x2c, AR_RTC_9160_PLL_DIV); in ar9002_hw_compute_pll_control()
Dar5008_phy.c292 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH)); in ar5008_hw_spur_mitigate()
302 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) | in ar5008_hw_spur_mitigate()
303 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE)); in ar5008_hw_spur_mitigate()
997 pll = SM(0x5, AR_RTC_9160_PLL_REFDIV); in ar9160_hw_compute_pll_control()
1000 pll |= SM(0x1, AR_RTC_9160_PLL_CLKSEL); in ar9160_hw_compute_pll_control()
1002 pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL); in ar9160_hw_compute_pll_control()
1005 pll |= SM(0x50, AR_RTC_9160_PLL_DIV); in ar9160_hw_compute_pll_control()
1007 pll |= SM(0x58, AR_RTC_9160_PLL_DIV); in ar9160_hw_compute_pll_control()
1020 pll |= SM(0x1, AR_RTC_PLL_CLKSEL); in ar5008_hw_compute_pll_control()
1022 pll |= SM(0x2, AR_RTC_PLL_CLKSEL); in ar5008_hw_compute_pll_control()
[all …]
Dar9003_phy.c425 pll = SM(0x5, AR_RTC_9300_PLL_REFDIV); in ar9003_hw_compute_pll_control()
428 pll |= SM(0x1, AR_RTC_9300_PLL_CLKSEL); in ar9003_hw_compute_pll_control()
430 pll |= SM(0x2, AR_RTC_9300_PLL_CLKSEL); in ar9003_hw_compute_pll_control()
432 pll |= SM(0x2c, AR_RTC_9300_PLL_DIV); in ar9003_hw_compute_pll_control()
1128 radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR); in ar9003_hw_set_radar_params()
1129 radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI); in ar9003_hw_set_radar_params()
1130 radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT); in ar9003_hw_set_radar_params()
1131 radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI); in ar9003_hw_set_radar_params()
1132 radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND); in ar9003_hw_set_radar_params()
1136 radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN); in ar9003_hw_set_radar_params()
[all …]
Deeprom_def.c365 | SM(pModal-> bswMargin[i], in ath9k_hw_def_set_gain()
370 | SM(pModal->bswAtten[i], in ath9k_hw_def_set_gain()
387 | SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN)); in ath9k_hw_def_set_gain()
392 SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN)); in ath9k_hw_def_set_gain()
428 SM(pModal->iqCalICh[i], in ath9k_hw_def_set_board_values()
430 SM(pModal->iqCalQCh[i], in ath9k_hw_def_set_board_values()
498 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF) in ath9k_hw_def_set_board_values()
499 | SM(pModal->txEndToXpaOff, in ath9k_hw_def_set_board_values()
501 | SM(pModal->txFrameToXpaOn, in ath9k_hw_def_set_board_values()
503 | SM(pModal->txFrameToXpaOn, in ath9k_hw_def_set_board_values()
[all …]
Dmac.h25 (SM((_series)[_index].Tries, AR_XmitDataTries##_index))
28 (SM((_series)[_index].Rate, AR_XmitRate##_index))
31 (SM((_series)[_index].PktDuration, AR_PacketDur##_index) | \
42 |SM((_series)[_index].ChSel, AR_ChainSel##_index))
Dhw.c661 SM(2, AR_QOS_NO_ACK_TWO_BIT) | in ath9k_hw_init_qos()
662 SM(5, AR_QOS_NO_ACK_BIT_OFF) | in ath9k_hw_init_qos()
663 SM(0, AR_QOS_NO_ACK_BYTE_OFF)); in ath9k_hw_init_qos()
1026 val |= SM(1, AR_RTC_DERIVED_CLK_PERIOD); in ath9k_hw_set_reset()
1762 SM((CAB_TIMEOUT_VAL << 3), AR_SLEEP1_CAB_TIMEOUT) in ath9k_hw_set_sta_beacon_timers()
1771 SM(beacontimeout, AR_SLEEP2_BEACON_TIMEOUT)); in ath9k_hw_set_sta_beacon_timers()
2440 (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) | in ath9k_hw_gen_timer_start()
2441 SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG))); in ath9k_hw_gen_timer_start()
2460 (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) | in ath9k_hw_gen_timer_stop()
2461 SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG))); in ath9k_hw_gen_timer_stop()
Dhw.h88 #define SM(_v, _f) (((_v) << _f##_S) & _f) macro
/linux-2.6.39/drivers/staging/keucr/
DKconfig2 tristate "USB ENE SM/MS card reader support"
5 Say Y here if you wish to control a ENE SM/MS Card reader.
/linux-2.6.39/Documentation/devicetree/bindings/fb/
Dsm501fb.txt1 * SM SM501
3 The SM SM501 is a LCD controller, with proper hardware, it can also
/linux-2.6.39/arch/m68k/fpsp040/
Ddecbin.S31 | adds and muls in FP0. Set the sign according to SM.
40 | added if SM = 1 and subtracted if SM = 0. Scale the
43 | SM = 0 a non-zero digit in the integer position
44 | SM = 1 a non-zero digit in Mant0, lsd of the fraction
435 bfextu %d4{#0:#2},%d0 | {FPCR[6],FPCR[5],SM,SE}
Dbindec.S903 bges mant_p |if pos, don't set SM
904 moveql #2,%d0 |move 2 in to d0 for SM
/linux-2.6.39/Documentation/filesystems/nfs/
Dnfs-rdma.txt175 If you are using InfiniBand, make sure there is a Subnet Manager (SM)
176 running on the network. If your IB switch has an embedded SM, you can
177 use it. Otherwise, you will need to run an SM, such as OpenSM, on one
180 If an SM is running on your network, you should see the following:
/linux-2.6.39/net/ipv4/
DKconfig242 bool "IP: PIM-SM version 1 support"
251 Say Y if you want to use PIM-SM v1. Note that you can say N here if
255 bool "IP: PIM-SM version 2 support"
/linux-2.6.39/net/ipv6/
DKconfig247 bool "IPv6: PIM-SM version 2 support (EXPERIMENTAL)"
/linux-2.6.39/drivers/usb/storage/
DKconfig191 To use SM/MS card, please build driver/staging/keucr/keucr.ko
/linux-2.6.39/Documentation/sound/oss/
DREADME.OSS492 SM Wave and AudioTrix Pro) support the OPL4 mode using MPU401
764 SM Games). If your card was in the list of supported cards (above),
925 NOTE! Don't enable the SM Games option (asked by the configuration program)
927 (not a SM Wave or SM16).
937 I know just Thunderboard and SM Games. Other cards require some kind of
1230 The Logitech SoundMan Wave (don't confuse this with the SM16 or SM Games) is
1234 you have a SM Wave immediately after asking the second DMA channel of jazz16.
1246 NOTE! Don't answer 'y' when the driver asks about SM Games support
/linux-2.6.39/Documentation/networking/
Dlapb-module.txt83 1 [SM]LP operation (0=LAPB_SLP 1=LAPB=MLP).
/linux-2.6.39/sound/oss/
DKconfig430 SM Games). For an unknown card you may answer Y if the card claims