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Searched refs:RXS (Results 1 – 8 of 8) sorted by relevance

/linux-2.4.37.9/drivers/net/wan/
Dhd64570.h67 #define RXS 0x16 /* RX Clock Source */ macro
Dhd64572.h60 #define RXS 0x13c /* RX clock source */ macro
Dc101.c149 sca_out(rxs, msci + RXS, port); in c101_set_iface()
Dhd6457x.c485 sca_out(port->rxs, msci + RXS, card); in sca_set_port()
583 sca_out(port->rxs, msci + RXS, card); in sca_open()
Dpci200syn.c169 sca_out(rxs, msci + RXS, card); in pci200_set_iface()
Dn2.c207 sca_out(rxs, msci + RXS, card); in n2_set_iface()
Dpc300_drv.c2286 cpc_readb(scabase + M_REG(RXS, ch)), in cpc_sca_status()
2755 cpc_writeb(scabase + M_REG(RXS, ch), in ch_config()
2759 cpc_writeb(scabase + M_REG(RXS, ch), 0); in ch_config()
2777 cpc_writeb(scabase + M_REG(RXS, ch), 0); in ch_config()
2792 cpc_writeb(scabase + M_REG(RXS, ch), 0); in ch_config()
/linux-2.4.37.9/drivers/char/
Dsynclinkmp.c354 #define RXS 0x36 macro
4062 write_reg(info, RXS, 0x40); in enable_loopback()
4076 write_reg(info, RXS, 0x00); in enable_loopback()
4125 write_reg(info, RXS, in set_rate()
4126 (unsigned char)((read_reg(info, RXS) & 0xf0) | BRValue)); in set_rate()
4131 write_reg(info, RXS,0); in set_rate()
4460 write_reg(info, RXS, RegValue); in async_mode()
4630 write_reg(info, RXS, RegValue); in hdlc_mode()