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Searched refs:CP_PACKET0 (Results 1 – 4 of 4) sorted by relevance

/linux-2.4.37.9/drivers/char/drm-4.0/
Dradeon_state.c52 OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) ); in radeon_emit_clip_rect()
55 OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) ); in radeon_emit_clip_rect()
70 OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); in radeon_emit_context()
79 OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) ); in radeon_emit_context()
84 OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) ); in radeon_emit_context()
99 OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) ); in radeon_emit_vertfmt()
114 OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) ); in radeon_emit_line()
118 OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) ); in radeon_emit_line()
133 OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) ); in radeon_emit_bumpmap()
136 OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) ); in radeon_emit_bumpmap()
[all …]
Dradeon_drv.h560 #define CP_PACKET0( reg, n ) \ macro
578 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
585 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
592 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
600 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
606 OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \
612 OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \
618 OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
624 OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
646 OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) ); \
[all …]
/linux-2.4.37.9/drivers/char/drm/
Dradeon_drv.h724 #define CP_PACKET0( reg, n ) \ macro
741 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
747 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
753 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
760 OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
765 OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \
770 OUT_RING( CP_PACKET0( RADEON_RB2D_DSTCACHE_CTLSTAT, 0 ) ); \
775 OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
780 OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) ); \
823 OUT_RING( CP_PACKET0( RADEON_LAST_DISPATCH_REG, 0 ) ); \
[all …]
Dradeon_state.c51 OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) ); in radeon_emit_clip_rect()
53 OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) ); in radeon_emit_clip_rect()
70 OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) ); in radeon_emit_state()
78 OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) ); in radeon_emit_state()
82 OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) ); in radeon_emit_state()
89 OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) ); in radeon_emit_state()
96 OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) ); in radeon_emit_state()
99 OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) ); in radeon_emit_state()
106 OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) ); in radeon_emit_state()
108 OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) ); in radeon_emit_state()
[all …]