1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_DMA_MAPPING_H
3 #define _LINUX_DMA_MAPPING_H
4 
5 #include <linux/cache.h>
6 #include <linux/sizes.h>
7 #include <linux/string.h>
8 #include <linux/device.h>
9 #include <linux/err.h>
10 #include <linux/dma-direction.h>
11 #include <linux/scatterlist.h>
12 #include <linux/bug.h>
13 #include <linux/mem_encrypt.h>
14 
15 /**
16  * List of possible attributes associated with a DMA mapping. The semantics
17  * of each attribute should be defined in Documentation/core-api/dma-attributes.rst.
18  */
19 
20 /*
21  * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
22  * may be weakly ordered, that is that reads and writes may pass each other.
23  */
24 #define DMA_ATTR_WEAK_ORDERING		(1UL << 1)
25 /*
26  * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
27  * buffered to improve performance.
28  */
29 #define DMA_ATTR_WRITE_COMBINE		(1UL << 2)
30 /*
31  * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
32  * virtual mapping for the allocated buffer.
33  */
34 #define DMA_ATTR_NO_KERNEL_MAPPING	(1UL << 4)
35 /*
36  * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
37  * the CPU cache for the given buffer assuming that it has been already
38  * transferred to 'device' domain.
39  */
40 #define DMA_ATTR_SKIP_CPU_SYNC		(1UL << 5)
41 /*
42  * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
43  * in physical memory.
44  */
45 #define DMA_ATTR_FORCE_CONTIGUOUS	(1UL << 6)
46 /*
47  * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
48  * that it's probably not worth the time to try to allocate memory to in a way
49  * that gives better TLB efficiency.
50  */
51 #define DMA_ATTR_ALLOC_SINGLE_PAGES	(1UL << 7)
52 /*
53  * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
54  * allocation failure reports (similarly to __GFP_NOWARN).
55  */
56 #define DMA_ATTR_NO_WARN	(1UL << 8)
57 
58 /*
59  * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
60  * accessible at an elevated privilege level (and ideally inaccessible or
61  * at least read-only at lesser-privileged levels).
62  */
63 #define DMA_ATTR_PRIVILEGED		(1UL << 9)
64 
65 /*
66  * A dma_addr_t can hold any valid DMA or bus address for the platform.  It can
67  * be given to a device to use as a DMA source or target.  It is specific to a
68  * given device and there may be a translation between the CPU physical address
69  * space and the bus address space.
70  *
71  * DMA_MAPPING_ERROR is the magic error code if a mapping failed.  It should not
72  * be used directly in drivers, but checked for using dma_mapping_error()
73  * instead.
74  */
75 #define DMA_MAPPING_ERROR		(~(dma_addr_t)0)
76 
77 #define DMA_BIT_MASK(n)	(((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
78 
79 #ifdef CONFIG_DMA_API_DEBUG
80 void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
81 void debug_dma_map_single(struct device *dev, const void *addr,
82 		unsigned long len);
83 #else
debug_dma_mapping_error(struct device * dev,dma_addr_t dma_addr)84 static inline void debug_dma_mapping_error(struct device *dev,
85 		dma_addr_t dma_addr)
86 {
87 }
debug_dma_map_single(struct device * dev,const void * addr,unsigned long len)88 static inline void debug_dma_map_single(struct device *dev, const void *addr,
89 		unsigned long len)
90 {
91 }
92 #endif /* CONFIG_DMA_API_DEBUG */
93 
94 #ifdef CONFIG_HAS_DMA
dma_mapping_error(struct device * dev,dma_addr_t dma_addr)95 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
96 {
97 	debug_dma_mapping_error(dev, dma_addr);
98 
99 	if (unlikely(dma_addr == DMA_MAPPING_ERROR))
100 		return -ENOMEM;
101 	return 0;
102 }
103 
104 dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page,
105 		size_t offset, size_t size, enum dma_data_direction dir,
106 		unsigned long attrs);
107 void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size,
108 		enum dma_data_direction dir, unsigned long attrs);
109 unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
110 		int nents, enum dma_data_direction dir, unsigned long attrs);
111 void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
112 				      int nents, enum dma_data_direction dir,
113 				      unsigned long attrs);
114 int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
115 		enum dma_data_direction dir, unsigned long attrs);
116 dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr,
117 		size_t size, enum dma_data_direction dir, unsigned long attrs);
118 void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size,
119 		enum dma_data_direction dir, unsigned long attrs);
120 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size,
121 		enum dma_data_direction dir);
122 void dma_sync_single_for_device(struct device *dev, dma_addr_t addr,
123 		size_t size, enum dma_data_direction dir);
124 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
125 		    int nelems, enum dma_data_direction dir);
126 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
127 		       int nelems, enum dma_data_direction dir);
128 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
129 		gfp_t flag, unsigned long attrs);
130 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
131 		dma_addr_t dma_handle, unsigned long attrs);
132 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
133 		gfp_t gfp, unsigned long attrs);
134 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
135 		dma_addr_t dma_handle);
136 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
137 		void *cpu_addr, dma_addr_t dma_addr, size_t size,
138 		unsigned long attrs);
139 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
140 		void *cpu_addr, dma_addr_t dma_addr, size_t size,
141 		unsigned long attrs);
142 bool dma_can_mmap(struct device *dev);
143 bool dma_pci_p2pdma_supported(struct device *dev);
144 int dma_set_mask(struct device *dev, u64 mask);
145 int dma_set_coherent_mask(struct device *dev, u64 mask);
146 u64 dma_get_required_mask(struct device *dev);
147 size_t dma_max_mapping_size(struct device *dev);
148 size_t dma_opt_mapping_size(struct device *dev);
149 bool dma_need_sync(struct device *dev, dma_addr_t dma_addr);
150 unsigned long dma_get_merge_boundary(struct device *dev);
151 struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size,
152 		enum dma_data_direction dir, gfp_t gfp, unsigned long attrs);
153 void dma_free_noncontiguous(struct device *dev, size_t size,
154 		struct sg_table *sgt, enum dma_data_direction dir);
155 void *dma_vmap_noncontiguous(struct device *dev, size_t size,
156 		struct sg_table *sgt);
157 void dma_vunmap_noncontiguous(struct device *dev, void *vaddr);
158 int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma,
159 		size_t size, struct sg_table *sgt);
160 #else /* CONFIG_HAS_DMA */
dma_map_page_attrs(struct device * dev,struct page * page,size_t offset,size_t size,enum dma_data_direction dir,unsigned long attrs)161 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
162 		struct page *page, size_t offset, size_t size,
163 		enum dma_data_direction dir, unsigned long attrs)
164 {
165 	return DMA_MAPPING_ERROR;
166 }
dma_unmap_page_attrs(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir,unsigned long attrs)167 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
168 		size_t size, enum dma_data_direction dir, unsigned long attrs)
169 {
170 }
dma_map_sg_attrs(struct device * dev,struct scatterlist * sg,int nents,enum dma_data_direction dir,unsigned long attrs)171 static inline unsigned int dma_map_sg_attrs(struct device *dev,
172 		struct scatterlist *sg, int nents, enum dma_data_direction dir,
173 		unsigned long attrs)
174 {
175 	return 0;
176 }
dma_unmap_sg_attrs(struct device * dev,struct scatterlist * sg,int nents,enum dma_data_direction dir,unsigned long attrs)177 static inline void dma_unmap_sg_attrs(struct device *dev,
178 		struct scatterlist *sg, int nents, enum dma_data_direction dir,
179 		unsigned long attrs)
180 {
181 }
dma_map_sgtable(struct device * dev,struct sg_table * sgt,enum dma_data_direction dir,unsigned long attrs)182 static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
183 		enum dma_data_direction dir, unsigned long attrs)
184 {
185 	return -EOPNOTSUPP;
186 }
dma_map_resource(struct device * dev,phys_addr_t phys_addr,size_t size,enum dma_data_direction dir,unsigned long attrs)187 static inline dma_addr_t dma_map_resource(struct device *dev,
188 		phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
189 		unsigned long attrs)
190 {
191 	return DMA_MAPPING_ERROR;
192 }
dma_unmap_resource(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir,unsigned long attrs)193 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
194 		size_t size, enum dma_data_direction dir, unsigned long attrs)
195 {
196 }
dma_sync_single_for_cpu(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir)197 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
198 		size_t size, enum dma_data_direction dir)
199 {
200 }
dma_sync_single_for_device(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir)201 static inline void dma_sync_single_for_device(struct device *dev,
202 		dma_addr_t addr, size_t size, enum dma_data_direction dir)
203 {
204 }
dma_sync_sg_for_cpu(struct device * dev,struct scatterlist * sg,int nelems,enum dma_data_direction dir)205 static inline void dma_sync_sg_for_cpu(struct device *dev,
206 		struct scatterlist *sg, int nelems, enum dma_data_direction dir)
207 {
208 }
dma_sync_sg_for_device(struct device * dev,struct scatterlist * sg,int nelems,enum dma_data_direction dir)209 static inline void dma_sync_sg_for_device(struct device *dev,
210 		struct scatterlist *sg, int nelems, enum dma_data_direction dir)
211 {
212 }
dma_mapping_error(struct device * dev,dma_addr_t dma_addr)213 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
214 {
215 	return -ENOMEM;
216 }
dma_alloc_attrs(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t flag,unsigned long attrs)217 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
218 		dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
219 {
220 	return NULL;
221 }
dma_free_attrs(struct device * dev,size_t size,void * cpu_addr,dma_addr_t dma_handle,unsigned long attrs)222 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
223 		dma_addr_t dma_handle, unsigned long attrs)
224 {
225 }
dmam_alloc_attrs(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t gfp,unsigned long attrs)226 static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
227 		dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
228 {
229 	return NULL;
230 }
dmam_free_coherent(struct device * dev,size_t size,void * vaddr,dma_addr_t dma_handle)231 static inline void dmam_free_coherent(struct device *dev, size_t size,
232 		void *vaddr, dma_addr_t dma_handle)
233 {
234 }
dma_get_sgtable_attrs(struct device * dev,struct sg_table * sgt,void * cpu_addr,dma_addr_t dma_addr,size_t size,unsigned long attrs)235 static inline int dma_get_sgtable_attrs(struct device *dev,
236 		struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
237 		size_t size, unsigned long attrs)
238 {
239 	return -ENXIO;
240 }
dma_mmap_attrs(struct device * dev,struct vm_area_struct * vma,void * cpu_addr,dma_addr_t dma_addr,size_t size,unsigned long attrs)241 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
242 		void *cpu_addr, dma_addr_t dma_addr, size_t size,
243 		unsigned long attrs)
244 {
245 	return -ENXIO;
246 }
dma_can_mmap(struct device * dev)247 static inline bool dma_can_mmap(struct device *dev)
248 {
249 	return false;
250 }
dma_pci_p2pdma_supported(struct device * dev)251 static inline bool dma_pci_p2pdma_supported(struct device *dev)
252 {
253 	return false;
254 }
dma_set_mask(struct device * dev,u64 mask)255 static inline int dma_set_mask(struct device *dev, u64 mask)
256 {
257 	return -EIO;
258 }
dma_set_coherent_mask(struct device * dev,u64 mask)259 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
260 {
261 	return -EIO;
262 }
dma_get_required_mask(struct device * dev)263 static inline u64 dma_get_required_mask(struct device *dev)
264 {
265 	return 0;
266 }
dma_max_mapping_size(struct device * dev)267 static inline size_t dma_max_mapping_size(struct device *dev)
268 {
269 	return 0;
270 }
dma_opt_mapping_size(struct device * dev)271 static inline size_t dma_opt_mapping_size(struct device *dev)
272 {
273 	return 0;
274 }
dma_need_sync(struct device * dev,dma_addr_t dma_addr)275 static inline bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
276 {
277 	return false;
278 }
dma_get_merge_boundary(struct device * dev)279 static inline unsigned long dma_get_merge_boundary(struct device *dev)
280 {
281 	return 0;
282 }
dma_alloc_noncontiguous(struct device * dev,size_t size,enum dma_data_direction dir,gfp_t gfp,unsigned long attrs)283 static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev,
284 		size_t size, enum dma_data_direction dir, gfp_t gfp,
285 		unsigned long attrs)
286 {
287 	return NULL;
288 }
dma_free_noncontiguous(struct device * dev,size_t size,struct sg_table * sgt,enum dma_data_direction dir)289 static inline void dma_free_noncontiguous(struct device *dev, size_t size,
290 		struct sg_table *sgt, enum dma_data_direction dir)
291 {
292 }
dma_vmap_noncontiguous(struct device * dev,size_t size,struct sg_table * sgt)293 static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size,
294 		struct sg_table *sgt)
295 {
296 	return NULL;
297 }
dma_vunmap_noncontiguous(struct device * dev,void * vaddr)298 static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr)
299 {
300 }
dma_mmap_noncontiguous(struct device * dev,struct vm_area_struct * vma,size_t size,struct sg_table * sgt)301 static inline int dma_mmap_noncontiguous(struct device *dev,
302 		struct vm_area_struct *vma, size_t size, struct sg_table *sgt)
303 {
304 	return -EINVAL;
305 }
306 #endif /* CONFIG_HAS_DMA */
307 
308 struct page *dma_alloc_pages(struct device *dev, size_t size,
309 		dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
310 void dma_free_pages(struct device *dev, size_t size, struct page *page,
311 		dma_addr_t dma_handle, enum dma_data_direction dir);
312 int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma,
313 		size_t size, struct page *page);
314 
dma_alloc_noncoherent(struct device * dev,size_t size,dma_addr_t * dma_handle,enum dma_data_direction dir,gfp_t gfp)315 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
316 		dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
317 {
318 	struct page *page = dma_alloc_pages(dev, size, dma_handle, dir, gfp);
319 	return page ? page_address(page) : NULL;
320 }
321 
dma_free_noncoherent(struct device * dev,size_t size,void * vaddr,dma_addr_t dma_handle,enum dma_data_direction dir)322 static inline void dma_free_noncoherent(struct device *dev, size_t size,
323 		void *vaddr, dma_addr_t dma_handle, enum dma_data_direction dir)
324 {
325 	dma_free_pages(dev, size, virt_to_page(vaddr), dma_handle, dir);
326 }
327 
dma_map_single_attrs(struct device * dev,void * ptr,size_t size,enum dma_data_direction dir,unsigned long attrs)328 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
329 		size_t size, enum dma_data_direction dir, unsigned long attrs)
330 {
331 	/* DMA must never operate on areas that might be remapped. */
332 	if (dev_WARN_ONCE(dev, is_vmalloc_addr(ptr),
333 			  "rejecting DMA map of vmalloc memory\n"))
334 		return DMA_MAPPING_ERROR;
335 	debug_dma_map_single(dev, ptr, size);
336 	return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr),
337 			size, dir, attrs);
338 }
339 
dma_unmap_single_attrs(struct device * dev,dma_addr_t addr,size_t size,enum dma_data_direction dir,unsigned long attrs)340 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
341 		size_t size, enum dma_data_direction dir, unsigned long attrs)
342 {
343 	return dma_unmap_page_attrs(dev, addr, size, dir, attrs);
344 }
345 
dma_sync_single_range_for_cpu(struct device * dev,dma_addr_t addr,unsigned long offset,size_t size,enum dma_data_direction dir)346 static inline void dma_sync_single_range_for_cpu(struct device *dev,
347 		dma_addr_t addr, unsigned long offset, size_t size,
348 		enum dma_data_direction dir)
349 {
350 	return dma_sync_single_for_cpu(dev, addr + offset, size, dir);
351 }
352 
dma_sync_single_range_for_device(struct device * dev,dma_addr_t addr,unsigned long offset,size_t size,enum dma_data_direction dir)353 static inline void dma_sync_single_range_for_device(struct device *dev,
354 		dma_addr_t addr, unsigned long offset, size_t size,
355 		enum dma_data_direction dir)
356 {
357 	return dma_sync_single_for_device(dev, addr + offset, size, dir);
358 }
359 
360 /**
361  * dma_unmap_sgtable - Unmap the given buffer for DMA
362  * @dev:	The device for which to perform the DMA operation
363  * @sgt:	The sg_table object describing the buffer
364  * @dir:	DMA direction
365  * @attrs:	Optional DMA attributes for the unmap operation
366  *
367  * Unmaps a buffer described by a scatterlist stored in the given sg_table
368  * object for the @dir DMA operation by the @dev device. After this function
369  * the ownership of the buffer is transferred back to the CPU domain.
370  */
dma_unmap_sgtable(struct device * dev,struct sg_table * sgt,enum dma_data_direction dir,unsigned long attrs)371 static inline void dma_unmap_sgtable(struct device *dev, struct sg_table *sgt,
372 		enum dma_data_direction dir, unsigned long attrs)
373 {
374 	dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs);
375 }
376 
377 /**
378  * dma_sync_sgtable_for_cpu - Synchronize the given buffer for CPU access
379  * @dev:	The device for which to perform the DMA operation
380  * @sgt:	The sg_table object describing the buffer
381  * @dir:	DMA direction
382  *
383  * Performs the needed cache synchronization and moves the ownership of the
384  * buffer back to the CPU domain, so it is safe to perform any access to it
385  * by the CPU. Before doing any further DMA operations, one has to transfer
386  * the ownership of the buffer back to the DMA domain by calling the
387  * dma_sync_sgtable_for_device().
388  */
dma_sync_sgtable_for_cpu(struct device * dev,struct sg_table * sgt,enum dma_data_direction dir)389 static inline void dma_sync_sgtable_for_cpu(struct device *dev,
390 		struct sg_table *sgt, enum dma_data_direction dir)
391 {
392 	dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir);
393 }
394 
395 /**
396  * dma_sync_sgtable_for_device - Synchronize the given buffer for DMA
397  * @dev:	The device for which to perform the DMA operation
398  * @sgt:	The sg_table object describing the buffer
399  * @dir:	DMA direction
400  *
401  * Performs the needed cache synchronization and moves the ownership of the
402  * buffer back to the DMA domain, so it is safe to perform the DMA operation.
403  * Once finished, one has to call dma_sync_sgtable_for_cpu() or
404  * dma_unmap_sgtable().
405  */
dma_sync_sgtable_for_device(struct device * dev,struct sg_table * sgt,enum dma_data_direction dir)406 static inline void dma_sync_sgtable_for_device(struct device *dev,
407 		struct sg_table *sgt, enum dma_data_direction dir)
408 {
409 	dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir);
410 }
411 
412 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
413 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
414 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
415 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
416 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
417 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
418 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
419 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
420 
421 bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size);
422 
dma_alloc_coherent(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t gfp)423 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
424 		dma_addr_t *dma_handle, gfp_t gfp)
425 {
426 	return dma_alloc_attrs(dev, size, dma_handle, gfp,
427 			(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
428 }
429 
dma_free_coherent(struct device * dev,size_t size,void * cpu_addr,dma_addr_t dma_handle)430 static inline void dma_free_coherent(struct device *dev, size_t size,
431 		void *cpu_addr, dma_addr_t dma_handle)
432 {
433 	return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
434 }
435 
436 
dma_get_mask(struct device * dev)437 static inline u64 dma_get_mask(struct device *dev)
438 {
439 	if (dev->dma_mask && *dev->dma_mask)
440 		return *dev->dma_mask;
441 	return DMA_BIT_MASK(32);
442 }
443 
444 /*
445  * Set both the DMA mask and the coherent DMA mask to the same thing.
446  * Note that we don't check the return value from dma_set_coherent_mask()
447  * as the DMA API guarantees that the coherent DMA mask can be set to
448  * the same or smaller than the streaming DMA mask.
449  */
dma_set_mask_and_coherent(struct device * dev,u64 mask)450 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
451 {
452 	int rc = dma_set_mask(dev, mask);
453 	if (rc == 0)
454 		dma_set_coherent_mask(dev, mask);
455 	return rc;
456 }
457 
458 /*
459  * Similar to the above, except it deals with the case where the device
460  * does not have dev->dma_mask appropriately setup.
461  */
dma_coerce_mask_and_coherent(struct device * dev,u64 mask)462 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
463 {
464 	dev->dma_mask = &dev->coherent_dma_mask;
465 	return dma_set_mask_and_coherent(dev, mask);
466 }
467 
468 /**
469  * dma_addressing_limited - return if the device is addressing limited
470  * @dev:	device to check
471  *
472  * Return %true if the devices DMA mask is too small to address all memory in
473  * the system, else %false.  Lack of addressing bits is the prime reason for
474  * bounce buffering, but might not be the only one.
475  */
dma_addressing_limited(struct device * dev)476 static inline bool dma_addressing_limited(struct device *dev)
477 {
478 	return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) <
479 			    dma_get_required_mask(dev);
480 }
481 
dma_get_max_seg_size(struct device * dev)482 static inline unsigned int dma_get_max_seg_size(struct device *dev)
483 {
484 	if (dev->dma_parms && dev->dma_parms->max_segment_size)
485 		return dev->dma_parms->max_segment_size;
486 	return SZ_64K;
487 }
488 
dma_set_max_seg_size(struct device * dev,unsigned int size)489 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size)
490 {
491 	if (dev->dma_parms) {
492 		dev->dma_parms->max_segment_size = size;
493 		return 0;
494 	}
495 	return -EIO;
496 }
497 
dma_get_seg_boundary(struct device * dev)498 static inline unsigned long dma_get_seg_boundary(struct device *dev)
499 {
500 	if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
501 		return dev->dma_parms->segment_boundary_mask;
502 	return ULONG_MAX;
503 }
504 
505 /**
506  * dma_get_seg_boundary_nr_pages - return the segment boundary in "page" units
507  * @dev: device to guery the boundary for
508  * @page_shift: ilog() of the IOMMU page size
509  *
510  * Return the segment boundary in IOMMU page units (which may be different from
511  * the CPU page size) for the passed in device.
512  *
513  * If @dev is NULL a boundary of U32_MAX is assumed, this case is just for
514  * non-DMA API callers.
515  */
dma_get_seg_boundary_nr_pages(struct device * dev,unsigned int page_shift)516 static inline unsigned long dma_get_seg_boundary_nr_pages(struct device *dev,
517 		unsigned int page_shift)
518 {
519 	if (!dev)
520 		return (U32_MAX >> page_shift) + 1;
521 	return (dma_get_seg_boundary(dev) >> page_shift) + 1;
522 }
523 
dma_set_seg_boundary(struct device * dev,unsigned long mask)524 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
525 {
526 	if (dev->dma_parms) {
527 		dev->dma_parms->segment_boundary_mask = mask;
528 		return 0;
529 	}
530 	return -EIO;
531 }
532 
dma_get_min_align_mask(struct device * dev)533 static inline unsigned int dma_get_min_align_mask(struct device *dev)
534 {
535 	if (dev->dma_parms)
536 		return dev->dma_parms->min_align_mask;
537 	return 0;
538 }
539 
dma_set_min_align_mask(struct device * dev,unsigned int min_align_mask)540 static inline int dma_set_min_align_mask(struct device *dev,
541 		unsigned int min_align_mask)
542 {
543 	if (WARN_ON_ONCE(!dev->dma_parms))
544 		return -EIO;
545 	dev->dma_parms->min_align_mask = min_align_mask;
546 	return 0;
547 }
548 
549 #ifndef dma_get_cache_alignment
dma_get_cache_alignment(void)550 static inline int dma_get_cache_alignment(void)
551 {
552 #ifdef ARCH_HAS_DMA_MINALIGN
553 	return ARCH_DMA_MINALIGN;
554 #endif
555 	return 1;
556 }
557 #endif
558 
dmam_alloc_coherent(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t gfp)559 static inline void *dmam_alloc_coherent(struct device *dev, size_t size,
560 		dma_addr_t *dma_handle, gfp_t gfp)
561 {
562 	return dmam_alloc_attrs(dev, size, dma_handle, gfp,
563 			(gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0);
564 }
565 
dma_alloc_wc(struct device * dev,size_t size,dma_addr_t * dma_addr,gfp_t gfp)566 static inline void *dma_alloc_wc(struct device *dev, size_t size,
567 				 dma_addr_t *dma_addr, gfp_t gfp)
568 {
569 	unsigned long attrs = DMA_ATTR_WRITE_COMBINE;
570 
571 	if (gfp & __GFP_NOWARN)
572 		attrs |= DMA_ATTR_NO_WARN;
573 
574 	return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs);
575 }
576 
dma_free_wc(struct device * dev,size_t size,void * cpu_addr,dma_addr_t dma_addr)577 static inline void dma_free_wc(struct device *dev, size_t size,
578 			       void *cpu_addr, dma_addr_t dma_addr)
579 {
580 	return dma_free_attrs(dev, size, cpu_addr, dma_addr,
581 			      DMA_ATTR_WRITE_COMBINE);
582 }
583 
dma_mmap_wc(struct device * dev,struct vm_area_struct * vma,void * cpu_addr,dma_addr_t dma_addr,size_t size)584 static inline int dma_mmap_wc(struct device *dev,
585 			      struct vm_area_struct *vma,
586 			      void *cpu_addr, dma_addr_t dma_addr,
587 			      size_t size)
588 {
589 	return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
590 			      DMA_ATTR_WRITE_COMBINE);
591 }
592 
593 #ifdef CONFIG_NEED_DMA_MAP_STATE
594 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
595 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
596 #define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
597 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
598 #define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
599 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
600 #else
601 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
602 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
603 #define dma_unmap_addr(PTR, ADDR_NAME)           (0)
604 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  do { } while (0)
605 #define dma_unmap_len(PTR, LEN_NAME)             (0)
606 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    do { } while (0)
607 #endif
608 
609 #endif /* _LINUX_DMA_MAPPING_H */
610