1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * X-Gene SLIMpro I2C Driver
4  *
5  * Copyright (c) 2014, Applied Micro Circuits Corporation
6  * Author: Feng Kan <fkan@apm.com>
7  * Author: Hieu Le <hnle@apm.com>
8  *
9  * This driver provides support for X-Gene SLIMpro I2C device access
10  * using the APM X-Gene SLIMpro mailbox driver.
11  */
12 #include <acpi/pcc.h>
13 #include <linux/acpi.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/i2c.h>
16 #include <linux/interrupt.h>
17 #include <linux/io.h>
18 #include <linux/mailbox_client.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/platform_device.h>
22 
23 #define MAILBOX_OP_TIMEOUT		1000	/* Operation time out in ms */
24 #define MAILBOX_I2C_INDEX		0
25 #define SLIMPRO_IIC_BUS			1	/* Use I2C bus 1 only */
26 
27 #define SMBUS_CMD_LEN			1
28 #define BYTE_DATA			1
29 #define WORD_DATA			2
30 #define BLOCK_DATA			3
31 
32 #define SLIMPRO_IIC_I2C_PROTOCOL	0
33 #define SLIMPRO_IIC_SMB_PROTOCOL	1
34 
35 #define SLIMPRO_IIC_READ		0
36 #define SLIMPRO_IIC_WRITE		1
37 
38 #define IIC_SMB_WITHOUT_DATA_LEN	0
39 #define IIC_SMB_WITH_DATA_LEN		1
40 
41 #define SLIMPRO_DEBUG_MSG		0
42 #define SLIMPRO_MSG_TYPE_SHIFT		28
43 #define SLIMPRO_DBG_SUBTYPE_I2C1READ	4
44 #define SLIMPRO_DBGMSG_TYPE_SHIFT	24
45 #define SLIMPRO_DBGMSG_TYPE_MASK	0x0F000000U
46 #define SLIMPRO_IIC_DEV_SHIFT		23
47 #define SLIMPRO_IIC_DEV_MASK		0x00800000U
48 #define SLIMPRO_IIC_DEVID_SHIFT		13
49 #define SLIMPRO_IIC_DEVID_MASK		0x007FE000U
50 #define SLIMPRO_IIC_RW_SHIFT		12
51 #define SLIMPRO_IIC_RW_MASK		0x00001000U
52 #define SLIMPRO_IIC_PROTO_SHIFT		11
53 #define SLIMPRO_IIC_PROTO_MASK		0x00000800U
54 #define SLIMPRO_IIC_ADDRLEN_SHIFT	8
55 #define SLIMPRO_IIC_ADDRLEN_MASK	0x00000700U
56 #define SLIMPRO_IIC_DATALEN_SHIFT	0
57 #define SLIMPRO_IIC_DATALEN_MASK	0x000000FFU
58 
59 /*
60  * SLIMpro I2C message encode
61  *
62  * dev		- Controller number (0-based)
63  * chip		- I2C chip address
64  * op		- SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
65  * proto	- SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
66  * addrlen	- Length of the address field
67  * datalen	- Length of the data field
68  */
69 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
70 	((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \
71 	((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
72 	SLIMPRO_DBGMSG_TYPE_MASK) | \
73 	((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \
74 	((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \
75 	((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \
76 	((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \
77 	((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \
78 	((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))
79 
80 #define SLIMPRO_MSG_TYPE(v)             (((v) & 0xF0000000) >> 28)
81 
82 /*
83  * Encode for upper address for block data
84  */
85 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR			0x80000000
86 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a)	((u32) (((a) << 30) \
87 								& 0x40000000))
88 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a)		((u32) (((a) >> 12) \
89 								& 0x3FF00000))
90 #define SLIMPRO_IIC_ENCODE_ADDR(a)			((a) & 0x000FFFFF)
91 
92 #define SLIMPRO_IIC_MSG_DWORD_COUNT			3
93 
94 /* PCC related defines */
95 #define PCC_SIGNATURE			0x50424300
96 #define PCC_STS_CMD_COMPLETE		BIT(0)
97 #define PCC_STS_SCI_DOORBELL		BIT(1)
98 #define PCC_STS_ERR			BIT(2)
99 #define PCC_STS_PLAT_NOTIFY		BIT(3)
100 #define PCC_CMD_GENERATE_DB_INT		BIT(15)
101 
102 struct slimpro_i2c_dev {
103 	struct i2c_adapter adapter;
104 	struct device *dev;
105 	struct mbox_chan *mbox_chan;
106 	struct pcc_mbox_chan *pcc_chan;
107 	struct mbox_client mbox_client;
108 	int mbox_idx;
109 	struct completion rd_complete;
110 	u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
111 	u32 *resp_msg;
112 	phys_addr_t comm_base_addr;
113 	void *pcc_comm_addr;
114 };
115 
116 #define to_slimpro_i2c_dev(cl)	\
117 		container_of(cl, struct slimpro_i2c_dev, mbox_client)
118 
119 enum slimpro_i2c_version {
120 	XGENE_SLIMPRO_I2C_V1 = 0,
121 	XGENE_SLIMPRO_I2C_V2 = 1,
122 };
123 
124 /*
125  * This function tests and clears a bitmask then returns its old value
126  */
xgene_word_tst_and_clr(u16 * addr,u16 mask)127 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
128 {
129 	u16 ret, val;
130 
131 	val = le16_to_cpu(READ_ONCE(*addr));
132 	ret = val & mask;
133 	val &= ~mask;
134 	WRITE_ONCE(*addr, cpu_to_le16(val));
135 
136 	return ret;
137 }
138 
slimpro_i2c_rx_cb(struct mbox_client * cl,void * mssg)139 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg)
140 {
141 	struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
142 
143 	/*
144 	 * Response message format:
145 	 * mssg[0] is the return code of the operation
146 	 * mssg[1] is the first data word
147 	 * mssg[2] is NOT used
148 	 */
149 	if (ctx->resp_msg)
150 		*ctx->resp_msg = ((u32 *)mssg)[1];
151 
152 	if (ctx->mbox_client.tx_block)
153 		complete(&ctx->rd_complete);
154 }
155 
slimpro_i2c_pcc_rx_cb(struct mbox_client * cl,void * msg)156 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg)
157 {
158 	struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
159 	struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
160 
161 	/* Check if platform sends interrupt */
162 	if (!xgene_word_tst_and_clr(&generic_comm_base->status,
163 				    PCC_STS_SCI_DOORBELL))
164 		return;
165 
166 	if (xgene_word_tst_and_clr(&generic_comm_base->status,
167 				   PCC_STS_CMD_COMPLETE)) {
168 		msg = generic_comm_base + 1;
169 
170 		/* Response message msg[1] contains the return value. */
171 		if (ctx->resp_msg)
172 			*ctx->resp_msg = ((u32 *)msg)[1];
173 
174 		complete(&ctx->rd_complete);
175 	}
176 }
177 
slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev * ctx,u32 * msg)178 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg)
179 {
180 	struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
181 	u32 *ptr = (void *)(generic_comm_base + 1);
182 	u16 status;
183 	int i;
184 
185 	WRITE_ONCE(generic_comm_base->signature,
186 		   cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx));
187 
188 	WRITE_ONCE(generic_comm_base->command,
189 		   cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT));
190 
191 	status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
192 	status &= ~PCC_STS_CMD_COMPLETE;
193 	WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));
194 
195 	/* Copy the message to the PCC comm space */
196 	for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
197 		WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
198 }
199 
start_i2c_msg_xfer(struct slimpro_i2c_dev * ctx)200 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
201 {
202 	if (ctx->mbox_client.tx_block || !acpi_disabled) {
203 		if (!wait_for_completion_timeout(&ctx->rd_complete,
204 						 msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
205 			return -ETIMEDOUT;
206 	}
207 
208 	/* Check of invalid data or no device */
209 	if (*ctx->resp_msg == 0xffffffff)
210 		return -ENODEV;
211 
212 	return 0;
213 }
214 
slimpro_i2c_send_msg(struct slimpro_i2c_dev * ctx,u32 * msg,u32 * data)215 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
216 				u32 *msg,
217 				u32 *data)
218 {
219 	int rc;
220 
221 	ctx->resp_msg = data;
222 
223 	if (!acpi_disabled) {
224 		reinit_completion(&ctx->rd_complete);
225 		slimpro_i2c_pcc_tx_prepare(ctx, msg);
226 	}
227 
228 	rc = mbox_send_message(ctx->mbox_chan, msg);
229 	if (rc < 0)
230 		goto err;
231 
232 	rc = start_i2c_msg_xfer(ctx);
233 
234 err:
235 	if (!acpi_disabled)
236 		mbox_chan_txdone(ctx->mbox_chan, 0);
237 
238 	ctx->resp_msg = NULL;
239 
240 	return rc;
241 }
242 
slimpro_i2c_rd(struct slimpro_i2c_dev * ctx,u32 chip,u32 addr,u32 addrlen,u32 protocol,u32 readlen,u32 * data)243 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
244 			  u32 addr, u32 addrlen, u32 protocol,
245 			  u32 readlen, u32 *data)
246 {
247 	u32 msg[3];
248 
249 	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
250 					SLIMPRO_IIC_READ, protocol, addrlen, readlen);
251 	msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
252 	msg[2] = 0;
253 
254 	return slimpro_i2c_send_msg(ctx, msg, data);
255 }
256 
slimpro_i2c_wr(struct slimpro_i2c_dev * ctx,u32 chip,u32 addr,u32 addrlen,u32 protocol,u32 writelen,u32 data)257 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
258 			  u32 addr, u32 addrlen, u32 protocol, u32 writelen,
259 			  u32 data)
260 {
261 	u32 msg[3];
262 
263 	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
264 					SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
265 	msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
266 	msg[2] = data;
267 
268 	return slimpro_i2c_send_msg(ctx, msg, msg);
269 }
270 
slimpro_i2c_blkrd(struct slimpro_i2c_dev * ctx,u32 chip,u32 addr,u32 addrlen,u32 protocol,u32 readlen,u32 with_data_len,void * data)271 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
272 			     u32 addrlen, u32 protocol, u32 readlen,
273 			     u32 with_data_len, void *data)
274 {
275 	dma_addr_t paddr;
276 	u32 msg[3];
277 	int rc;
278 
279 	paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
280 	if (dma_mapping_error(ctx->dev, paddr)) {
281 		dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
282 			ctx->dma_buffer);
283 		return -ENOMEM;
284 	}
285 
286 	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
287 					protocol, addrlen, readlen);
288 	msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
289 		 SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) |
290 		 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
291 		 SLIMPRO_IIC_ENCODE_ADDR(addr);
292 	msg[2] = (u32)paddr;
293 
294 	rc = slimpro_i2c_send_msg(ctx, msg, msg);
295 
296 	/* Copy to destination */
297 	memcpy(data, ctx->dma_buffer, readlen);
298 
299 	dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
300 	return rc;
301 }
302 
slimpro_i2c_blkwr(struct slimpro_i2c_dev * ctx,u32 chip,u32 addr,u32 addrlen,u32 protocol,u32 writelen,void * data)303 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
304 			     u32 addr, u32 addrlen, u32 protocol, u32 writelen,
305 			     void *data)
306 {
307 	dma_addr_t paddr;
308 	u32 msg[3];
309 	int rc;
310 
311 	if (writelen > I2C_SMBUS_BLOCK_MAX)
312 		return -EINVAL;
313 
314 	memcpy(ctx->dma_buffer, data, writelen);
315 	paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
316 			       DMA_TO_DEVICE);
317 	if (dma_mapping_error(ctx->dev, paddr)) {
318 		dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
319 			ctx->dma_buffer);
320 		return -ENOMEM;
321 	}
322 
323 	msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
324 					protocol, addrlen, writelen);
325 	msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
326 		 SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
327 		 SLIMPRO_IIC_ENCODE_ADDR(addr);
328 	msg[2] = (u32)paddr;
329 
330 	if (ctx->mbox_client.tx_block)
331 		reinit_completion(&ctx->rd_complete);
332 
333 	rc = slimpro_i2c_send_msg(ctx, msg, msg);
334 
335 	dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
336 	return rc;
337 }
338 
xgene_slimpro_i2c_xfer(struct i2c_adapter * adap,u16 addr,unsigned short flags,char read_write,u8 command,int size,union i2c_smbus_data * data)339 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
340 				  unsigned short flags, char read_write,
341 				  u8 command, int size,
342 				  union i2c_smbus_data *data)
343 {
344 	struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
345 	int ret = -EOPNOTSUPP;
346 	u32 val;
347 
348 	switch (size) {
349 	case I2C_SMBUS_BYTE:
350 		if (read_write == I2C_SMBUS_READ) {
351 			ret = slimpro_i2c_rd(ctx, addr, 0, 0,
352 					     SLIMPRO_IIC_SMB_PROTOCOL,
353 					     BYTE_DATA, &val);
354 			data->byte = val;
355 		} else {
356 			ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
357 					     SLIMPRO_IIC_SMB_PROTOCOL,
358 					     0, 0);
359 		}
360 		break;
361 	case I2C_SMBUS_BYTE_DATA:
362 		if (read_write == I2C_SMBUS_READ) {
363 			ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
364 					     SLIMPRO_IIC_SMB_PROTOCOL,
365 					     BYTE_DATA, &val);
366 			data->byte = val;
367 		} else {
368 			val = data->byte;
369 			ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
370 					     SLIMPRO_IIC_SMB_PROTOCOL,
371 					     BYTE_DATA, val);
372 		}
373 		break;
374 	case I2C_SMBUS_WORD_DATA:
375 		if (read_write == I2C_SMBUS_READ) {
376 			ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
377 					     SLIMPRO_IIC_SMB_PROTOCOL,
378 					     WORD_DATA, &val);
379 			data->word = val;
380 		} else {
381 			val = data->word;
382 			ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
383 					     SLIMPRO_IIC_SMB_PROTOCOL,
384 					     WORD_DATA, val);
385 		}
386 		break;
387 	case I2C_SMBUS_BLOCK_DATA:
388 		if (read_write == I2C_SMBUS_READ) {
389 			ret = slimpro_i2c_blkrd(ctx, addr, command,
390 						SMBUS_CMD_LEN,
391 						SLIMPRO_IIC_SMB_PROTOCOL,
392 						I2C_SMBUS_BLOCK_MAX + 1,
393 						IIC_SMB_WITH_DATA_LEN,
394 						&data->block[0]);
395 
396 		} else {
397 			ret = slimpro_i2c_blkwr(ctx, addr, command,
398 						SMBUS_CMD_LEN,
399 						SLIMPRO_IIC_SMB_PROTOCOL,
400 						data->block[0] + 1,
401 						&data->block[0]);
402 		}
403 		break;
404 	case I2C_SMBUS_I2C_BLOCK_DATA:
405 		if (read_write == I2C_SMBUS_READ) {
406 			ret = slimpro_i2c_blkrd(ctx, addr,
407 						command,
408 						SMBUS_CMD_LEN,
409 						SLIMPRO_IIC_I2C_PROTOCOL,
410 						I2C_SMBUS_BLOCK_MAX,
411 						IIC_SMB_WITHOUT_DATA_LEN,
412 						&data->block[1]);
413 		} else {
414 			ret = slimpro_i2c_blkwr(ctx, addr, command,
415 						SMBUS_CMD_LEN,
416 						SLIMPRO_IIC_I2C_PROTOCOL,
417 						data->block[0],
418 						&data->block[1]);
419 		}
420 		break;
421 	default:
422 		break;
423 	}
424 	return ret;
425 }
426 
427 /*
428 * Return list of supported functionality.
429 */
xgene_slimpro_i2c_func(struct i2c_adapter * adapter)430 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
431 {
432 	return I2C_FUNC_SMBUS_BYTE |
433 		I2C_FUNC_SMBUS_BYTE_DATA |
434 		I2C_FUNC_SMBUS_WORD_DATA |
435 		I2C_FUNC_SMBUS_BLOCK_DATA |
436 		I2C_FUNC_SMBUS_I2C_BLOCK;
437 }
438 
439 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
440 	.smbus_xfer = xgene_slimpro_i2c_xfer,
441 	.functionality = xgene_slimpro_i2c_func,
442 };
443 
xgene_slimpro_i2c_probe(struct platform_device * pdev)444 static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
445 {
446 	struct slimpro_i2c_dev *ctx;
447 	struct i2c_adapter *adapter;
448 	struct mbox_client *cl;
449 	int rc;
450 
451 	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
452 	if (!ctx)
453 		return -ENOMEM;
454 
455 	ctx->dev = &pdev->dev;
456 	platform_set_drvdata(pdev, ctx);
457 	cl = &ctx->mbox_client;
458 
459 	/* Request mailbox channel */
460 	cl->dev = &pdev->dev;
461 	init_completion(&ctx->rd_complete);
462 	cl->tx_tout = MAILBOX_OP_TIMEOUT;
463 	cl->knows_txdone = false;
464 	if (acpi_disabled) {
465 		cl->tx_block = true;
466 		cl->rx_callback = slimpro_i2c_rx_cb;
467 		ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
468 		if (IS_ERR(ctx->mbox_chan)) {
469 			dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
470 			return PTR_ERR(ctx->mbox_chan);
471 		}
472 	} else {
473 		struct pcc_mbox_chan *pcc_chan;
474 		const struct acpi_device_id *acpi_id;
475 		int version = XGENE_SLIMPRO_I2C_V1;
476 
477 		acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
478 					    &pdev->dev);
479 		if (!acpi_id)
480 			return -EINVAL;
481 
482 		version = (int)acpi_id->driver_data;
483 
484 		if (device_property_read_u32(&pdev->dev, "pcc-channel",
485 					     &ctx->mbox_idx))
486 			ctx->mbox_idx = MAILBOX_I2C_INDEX;
487 
488 		cl->tx_block = false;
489 		cl->rx_callback = slimpro_i2c_pcc_rx_cb;
490 		pcc_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
491 		if (IS_ERR(pcc_chan)) {
492 			dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
493 			return PTR_ERR(pcc_chan);
494 		}
495 
496 		ctx->pcc_chan = pcc_chan;
497 		ctx->mbox_chan = pcc_chan->mchan;
498 
499 		if (!ctx->mbox_chan->mbox->txdone_irq) {
500 			dev_err(&pdev->dev, "PCC IRQ not supported\n");
501 			rc = -ENOENT;
502 			goto mbox_err;
503 		}
504 
505 		/*
506 		 * This is the shared communication region
507 		 * for the OS and Platform to communicate over.
508 		 */
509 		ctx->comm_base_addr = pcc_chan->shmem_base_addr;
510 		if (ctx->comm_base_addr) {
511 			if (version == XGENE_SLIMPRO_I2C_V2)
512 				ctx->pcc_comm_addr = memremap(
513 							ctx->comm_base_addr,
514 							pcc_chan->shmem_size,
515 							MEMREMAP_WT);
516 			else
517 				ctx->pcc_comm_addr = memremap(
518 							ctx->comm_base_addr,
519 							pcc_chan->shmem_size,
520 							MEMREMAP_WB);
521 		} else {
522 			dev_err(&pdev->dev, "Failed to get PCC comm region\n");
523 			rc = -ENOENT;
524 			goto mbox_err;
525 		}
526 
527 		if (!ctx->pcc_comm_addr) {
528 			dev_err(&pdev->dev,
529 				"Failed to ioremap PCC comm region\n");
530 			rc = -ENOMEM;
531 			goto mbox_err;
532 		}
533 	}
534 	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
535 	if (rc)
536 		dev_warn(&pdev->dev, "Unable to set dma mask\n");
537 
538 	/* Setup I2C adapter */
539 	adapter = &ctx->adapter;
540 	snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
541 	adapter->algo = &xgene_slimpro_i2c_algorithm;
542 	adapter->class = I2C_CLASS_HWMON;
543 	adapter->dev.parent = &pdev->dev;
544 	adapter->dev.of_node = pdev->dev.of_node;
545 	ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
546 	i2c_set_adapdata(adapter, ctx);
547 	rc = i2c_add_adapter(adapter);
548 	if (rc)
549 		goto mbox_err;
550 
551 	dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
552 	return 0;
553 
554 mbox_err:
555 	if (acpi_disabled)
556 		mbox_free_channel(ctx->mbox_chan);
557 	else
558 		pcc_mbox_free_channel(ctx->pcc_chan);
559 
560 	return rc;
561 }
562 
xgene_slimpro_i2c_remove(struct platform_device * pdev)563 static void xgene_slimpro_i2c_remove(struct platform_device *pdev)
564 {
565 	struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);
566 
567 	i2c_del_adapter(&ctx->adapter);
568 
569 	if (acpi_disabled)
570 		mbox_free_channel(ctx->mbox_chan);
571 	else
572 		pcc_mbox_free_channel(ctx->pcc_chan);
573 }
574 
575 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
576 	{.compatible = "apm,xgene-slimpro-i2c" },
577 	{},
578 };
579 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);
580 
581 #ifdef CONFIG_ACPI
582 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
583 	{"APMC0D40", XGENE_SLIMPRO_I2C_V1},
584 	{"APMC0D8B", XGENE_SLIMPRO_I2C_V2},
585 	{}
586 };
587 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
588 #endif
589 
590 static struct platform_driver xgene_slimpro_i2c_driver = {
591 	.probe	= xgene_slimpro_i2c_probe,
592 	.remove_new = xgene_slimpro_i2c_remove,
593 	.driver	= {
594 		.name	= "xgene-slimpro-i2c",
595 		.of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
596 		.acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
597 	},
598 };
599 
600 module_platform_driver(xgene_slimpro_i2c_driver);
601 
602 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
603 MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
604 MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
605 MODULE_LICENSE("GPL");
606