1 /*
2  * Copyright 2015 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "priv.h"
25 
26 static void
gf100_pci_msi_rearm(struct nvkm_pci * pci)27 gf100_pci_msi_rearm(struct nvkm_pci *pci)
28 {
29 	nvkm_pci_wr08(pci, 0x0704, 0xff);
30 }
31 
32 void
gf100_pcie_set_version(struct nvkm_pci * pci,u8 ver)33 gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver)
34 {
35 	struct nvkm_device *device = pci->subdev.device;
36 	nvkm_mask(device, 0x02241c, 0x1, ver > 1 ? 1 : 0);
37 }
38 
39 int
gf100_pcie_version(struct nvkm_pci * pci)40 gf100_pcie_version(struct nvkm_pci *pci)
41 {
42 	struct nvkm_device *device = pci->subdev.device;
43 	return (nvkm_rd32(device, 0x02241c) & 0x1) + 1;
44 }
45 
46 void
gf100_pcie_set_cap_speed(struct nvkm_pci * pci,bool full_speed)47 gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
48 {
49 	struct nvkm_device *device = pci->subdev.device;
50 	nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0);
51 }
52 
53 int
gf100_pcie_cap_speed(struct nvkm_pci * pci)54 gf100_pcie_cap_speed(struct nvkm_pci *pci)
55 {
56 	struct nvkm_device *device = pci->subdev.device;
57 	u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80;
58 	if (punits_pci_cap_speed == 0x80)
59 		return 1;
60 	return 0;
61 }
62 
63 int
gf100_pcie_init(struct nvkm_pci * pci)64 gf100_pcie_init(struct nvkm_pci *pci)
65 {
66 	bool full_speed = g84_pcie_cur_speed(pci) == NVKM_PCIE_SPEED_5_0;
67 	gf100_pcie_set_cap_speed(pci, full_speed);
68 	return 0;
69 }
70 
71 int
gf100_pcie_set_link(struct nvkm_pci * pci,enum nvkm_pcie_speed speed,u8 width)72 gf100_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width)
73 {
74 	gf100_pcie_set_cap_speed(pci, speed == NVKM_PCIE_SPEED_5_0);
75 	g84_pcie_set_link_speed(pci, speed);
76 	return 0;
77 }
78 
79 static const struct nvkm_pci_func
80 gf100_pci_func = {
81 	.init = g84_pci_init,
82 	.rd32 = nv40_pci_rd32,
83 	.wr08 = nv40_pci_wr08,
84 	.wr32 = nv40_pci_wr32,
85 	.msi_rearm = gf100_pci_msi_rearm,
86 
87 	.pcie.init = gf100_pcie_init,
88 	.pcie.set_link = gf100_pcie_set_link,
89 
90 	.pcie.max_speed = g84_pcie_max_speed,
91 	.pcie.cur_speed = g84_pcie_cur_speed,
92 
93 	.pcie.set_version = gf100_pcie_set_version,
94 	.pcie.version = gf100_pcie_version,
95 	.pcie.version_supported = g92_pcie_version_supported,
96 };
97 
98 int
gf100_pci_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_pci ** ppci)99 gf100_pci_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
100 	      struct nvkm_pci **ppci)
101 {
102 	return nvkm_pci_new_(&gf100_pci_func, device, type, inst, ppci);
103 }
104