1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2010-2012 Broadcom. All rights reserved.
4 * Copyright (c) 2013 Lubomir Rintel
5 */
6
7 #include <linux/hw_random.h>
8 #include <linux/io.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/of.h>
12 #include <linux/platform_device.h>
13 #include <linux/printk.h>
14 #include <linux/clk.h>
15 #include <linux/reset.h>
16
17 #define RNG_CTRL 0x0
18 #define RNG_STATUS 0x4
19 #define RNG_DATA 0x8
20 #define RNG_INT_MASK 0x10
21
22 /* enable rng */
23 #define RNG_RBGEN 0x1
24
25 /* the initial numbers generated are "less random" so will be discarded */
26 #define RNG_WARMUP_COUNT 0x40000
27
28 #define RNG_INT_OFF 0x1
29
30 struct bcm2835_rng_priv {
31 struct hwrng rng;
32 void __iomem *base;
33 bool mask_interrupts;
34 struct clk *clk;
35 struct reset_control *reset;
36 };
37
to_rng_priv(struct hwrng * rng)38 static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)
39 {
40 return container_of(rng, struct bcm2835_rng_priv, rng);
41 }
42
rng_readl(struct bcm2835_rng_priv * priv,u32 offset)43 static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset)
44 {
45 /* MIPS chips strapped for BE will automagically configure the
46 * peripheral registers for CPU-native byte order.
47 */
48 if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
49 return __raw_readl(priv->base + offset);
50 else
51 return readl(priv->base + offset);
52 }
53
rng_writel(struct bcm2835_rng_priv * priv,u32 val,u32 offset)54 static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val,
55 u32 offset)
56 {
57 if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
58 __raw_writel(val, priv->base + offset);
59 else
60 writel(val, priv->base + offset);
61 }
62
bcm2835_rng_read(struct hwrng * rng,void * buf,size_t max,bool wait)63 static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
64 bool wait)
65 {
66 struct bcm2835_rng_priv *priv = to_rng_priv(rng);
67 u32 max_words = max / sizeof(u32);
68 u32 num_words, count;
69
70 while ((rng_readl(priv, RNG_STATUS) >> 24) == 0) {
71 if (!wait)
72 return 0;
73 hwrng_yield(rng);
74 }
75
76 num_words = rng_readl(priv, RNG_STATUS) >> 24;
77 if (num_words > max_words)
78 num_words = max_words;
79
80 for (count = 0; count < num_words; count++)
81 ((u32 *)buf)[count] = rng_readl(priv, RNG_DATA);
82
83 return num_words * sizeof(u32);
84 }
85
bcm2835_rng_init(struct hwrng * rng)86 static int bcm2835_rng_init(struct hwrng *rng)
87 {
88 struct bcm2835_rng_priv *priv = to_rng_priv(rng);
89 int ret = 0;
90 u32 val;
91
92 ret = clk_prepare_enable(priv->clk);
93 if (ret)
94 return ret;
95
96 ret = reset_control_reset(priv->reset);
97 if (ret)
98 return ret;
99
100 if (priv->mask_interrupts) {
101 /* mask the interrupt */
102 val = rng_readl(priv, RNG_INT_MASK);
103 val |= RNG_INT_OFF;
104 rng_writel(priv, val, RNG_INT_MASK);
105 }
106
107 /* set warm-up count & enable */
108 rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS);
109 rng_writel(priv, RNG_RBGEN, RNG_CTRL);
110
111 return ret;
112 }
113
bcm2835_rng_cleanup(struct hwrng * rng)114 static void bcm2835_rng_cleanup(struct hwrng *rng)
115 {
116 struct bcm2835_rng_priv *priv = to_rng_priv(rng);
117
118 /* disable rng hardware */
119 rng_writel(priv, 0, RNG_CTRL);
120
121 clk_disable_unprepare(priv->clk);
122 }
123
124 struct bcm2835_rng_of_data {
125 bool mask_interrupts;
126 };
127
128 static const struct bcm2835_rng_of_data nsp_rng_of_data = {
129 .mask_interrupts = true,
130 };
131
132 static const struct of_device_id bcm2835_rng_of_match[] = {
133 { .compatible = "brcm,bcm2835-rng"},
134 { .compatible = "brcm,bcm-nsp-rng", .data = &nsp_rng_of_data },
135 { .compatible = "brcm,bcm5301x-rng", .data = &nsp_rng_of_data },
136 { .compatible = "brcm,bcm6368-rng"},
137 {},
138 };
139
bcm2835_rng_probe(struct platform_device * pdev)140 static int bcm2835_rng_probe(struct platform_device *pdev)
141 {
142 const struct bcm2835_rng_of_data *of_data;
143 struct device *dev = &pdev->dev;
144 const struct of_device_id *rng_id;
145 struct bcm2835_rng_priv *priv;
146 int err;
147
148 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
149 if (!priv)
150 return -ENOMEM;
151
152 platform_set_drvdata(pdev, priv);
153
154 /* map peripheral */
155 priv->base = devm_platform_ioremap_resource(pdev, 0);
156 if (IS_ERR(priv->base))
157 return PTR_ERR(priv->base);
158
159 /* Clock is optional on most platforms */
160 priv->clk = devm_clk_get_optional(dev, NULL);
161 if (IS_ERR(priv->clk))
162 return PTR_ERR(priv->clk);
163
164 priv->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
165 if (IS_ERR(priv->reset))
166 return PTR_ERR(priv->reset);
167
168 priv->rng.name = pdev->name;
169 priv->rng.init = bcm2835_rng_init;
170 priv->rng.read = bcm2835_rng_read;
171 priv->rng.cleanup = bcm2835_rng_cleanup;
172
173 if (dev_of_node(dev)) {
174 rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);
175 if (!rng_id)
176 return -EINVAL;
177
178 /* Check for rng init function, execute it */
179 of_data = rng_id->data;
180 if (of_data)
181 priv->mask_interrupts = of_data->mask_interrupts;
182 }
183
184 /* register driver */
185 err = devm_hwrng_register(dev, &priv->rng);
186 if (err)
187 dev_err(dev, "hwrng registration failed\n");
188 else
189 dev_info(dev, "hwrng registered\n");
190
191 return err;
192 }
193
194 MODULE_DEVICE_TABLE(of, bcm2835_rng_of_match);
195
196 static const struct platform_device_id bcm2835_rng_devtype[] = {
197 { .name = "bcm2835-rng" },
198 { .name = "bcm63xx-rng" },
199 { /* sentinel */ }
200 };
201 MODULE_DEVICE_TABLE(platform, bcm2835_rng_devtype);
202
203 static struct platform_driver bcm2835_rng_driver = {
204 .driver = {
205 .name = "bcm2835-rng",
206 .of_match_table = bcm2835_rng_of_match,
207 },
208 .probe = bcm2835_rng_probe,
209 .id_table = bcm2835_rng_devtype,
210 };
211 module_platform_driver(bcm2835_rng_driver);
212
213 MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
214 MODULE_DESCRIPTION("BCM2835 Random Number Generator (RNG) driver");
215 MODULE_LICENSE("GPL v2");
216