1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *
4 *  Copyright (C) 1991, 1992  Linus Torvalds
5 *
6 *  Enhanced CPU detection and feature setting code by Mike Jagdis
7 *  and Martin Mares, November 1997.
8 */
9
10.text
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/segment.h>
15#include <asm/page_types.h>
16#include <asm/pgtable_types.h>
17#include <asm/cache.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/setup.h>
21#include <asm/processor-flags.h>
22#include <asm/msr-index.h>
23#include <asm/cpufeatures.h>
24#include <asm/percpu.h>
25#include <asm/nops.h>
26#include <asm/nospec-branch.h>
27#include <asm/bootparam.h>
28#include <asm/export.h>
29#include <asm/pgtable_32.h>
30
31/* Physical address */
32#define pa(X) ((X) - __PAGE_OFFSET)
33
34/*
35 * References to members of the new_cpu_data structure.
36 */
37
38#define X86		new_cpu_data+CPUINFO_x86
39#define X86_VENDOR	new_cpu_data+CPUINFO_x86_vendor
40#define X86_MODEL	new_cpu_data+CPUINFO_x86_model
41#define X86_STEPPING	new_cpu_data+CPUINFO_x86_stepping
42#define X86_HARD_MATH	new_cpu_data+CPUINFO_hard_math
43#define X86_CPUID	new_cpu_data+CPUINFO_cpuid_level
44#define X86_CAPABILITY	new_cpu_data+CPUINFO_x86_capability
45#define X86_VENDOR_ID	new_cpu_data+CPUINFO_x86_vendor_id
46
47
48#define SIZEOF_PTREGS 17*4
49
50/*
51 * Worst-case size of the kernel mapping we need to make:
52 * a relocatable kernel can live anywhere in lowmem, so we need to be able
53 * to map all of lowmem.
54 */
55KERNEL_PAGES = LOWMEM_PAGES
56
57INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
58RESERVE_BRK(pagetables, INIT_MAP_SIZE)
59
60/*
61 * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
62 * %esi points to the real-mode code as a 32-bit pointer.
63 * CS and DS must be 4 GB flat segments, but we don't depend on
64 * any particular GDT layout, because we load our own as soon as we
65 * can.
66 */
67__HEAD
68SYM_CODE_START(startup_32)
69	movl pa(initial_stack),%ecx
70
71/*
72 * Set segments to known values.
73 */
74	lgdt pa(boot_gdt_descr)
75	movl $(__BOOT_DS),%eax
76	movl %eax,%ds
77	movl %eax,%es
78	movl %eax,%fs
79	movl %eax,%gs
80	movl %eax,%ss
81	leal -__PAGE_OFFSET(%ecx),%esp
82
83/*
84 * Clear BSS first so that there are no surprises...
85 */
86	cld
87	xorl %eax,%eax
88	movl $pa(__bss_start),%edi
89	movl $pa(__bss_stop),%ecx
90	subl %edi,%ecx
91	shrl $2,%ecx
92	rep ; stosl
93/*
94 * Copy bootup parameters out of the way.
95 * Note: %esi still has the pointer to the real-mode data.
96 * With the kexec as boot loader, parameter segment might be loaded beyond
97 * kernel image and might not even be addressable by early boot page tables.
98 * (kexec on panic case). Hence copy out the parameters before initializing
99 * page tables.
100 */
101	movl $pa(boot_params),%edi
102	movl $(PARAM_SIZE/4),%ecx
103	cld
104	rep
105	movsl
106	movl pa(boot_params) + NEW_CL_POINTER,%esi
107	andl %esi,%esi
108	jz 1f			# No command line
109	movl $pa(boot_command_line),%edi
110	movl $(COMMAND_LINE_SIZE/4),%ecx
111	rep
112	movsl
1131:
114
115#ifdef CONFIG_OLPC
116	/* save OFW's pgdir table for later use when calling into OFW */
117	movl %cr3, %eax
118	movl %eax, pa(olpc_ofw_pgd)
119#endif
120
121#ifdef CONFIG_MICROCODE
122	/* Early load ucode on BSP. */
123	call load_ucode_bsp
124#endif
125
126	/* Create early pagetables. */
127	call  mk_early_pgtbl_32
128
129	/* Do early initialization of the fixmap area */
130	movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
131#ifdef  CONFIG_X86_PAE
132#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
133	movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
134#else
135	movl %eax,pa(initial_page_table+0xffc)
136#endif
137
138	jmp .Ldefault_entry
139SYM_CODE_END(startup_32)
140
141/*
142 * Non-boot CPU entry point; entered from trampoline.S
143 * We can't lgdt here, because lgdt itself uses a data segment, but
144 * we know the trampoline has already loaded the boot_gdt for us.
145 *
146 * If cpu hotplug is not supported then this code can go in init section
147 * which will be freed later
148 */
149SYM_FUNC_START(startup_32_smp)
150	cld
151	movl $(__BOOT_DS),%eax
152	movl %eax,%ds
153	movl %eax,%es
154	movl %eax,%fs
155	movl %eax,%gs
156	movl pa(initial_stack),%ecx
157	movl %eax,%ss
158	leal -__PAGE_OFFSET(%ecx),%esp
159
160#ifdef CONFIG_MICROCODE
161	/* Early load ucode on AP. */
162	call load_ucode_ap
163#endif
164
165.Ldefault_entry:
166	movl $(CR0_STATE & ~X86_CR0_PG),%eax
167	movl %eax,%cr0
168
169/*
170 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
171 * bits like NT set. This would confuse the debugger if this code is traced. So
172 * initialize them properly now before switching to protected mode. That means
173 * DF in particular (even though we have cleared it earlier after copying the
174 * command line) because GCC expects it.
175 */
176	pushl $0
177	popfl
178
179/*
180 * New page tables may be in 4Mbyte page mode and may be using the global pages.
181 *
182 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
183 * if and only if CPUID exists and has flags other than the FPU flag set.
184 */
185	movl $-1,pa(X86_CPUID)		# preset CPUID level
186	movl $X86_EFLAGS_ID,%ecx
187	pushl %ecx
188	popfl				# set EFLAGS=ID
189	pushfl
190	popl %eax			# get EFLAGS
191	testl $X86_EFLAGS_ID,%eax	# did EFLAGS.ID remained set?
192	jz .Lenable_paging		# hw disallowed setting of ID bit
193					# which means no CPUID and no CR4
194
195	xorl %eax,%eax
196	cpuid
197	movl %eax,pa(X86_CPUID)		# save largest std CPUID function
198
199	movl $1,%eax
200	cpuid
201	andl $~1,%edx			# Ignore CPUID.FPU
202	jz .Lenable_paging		# No flags or only CPUID.FPU = no CR4
203
204	movl pa(mmu_cr4_features),%eax
205	movl %eax,%cr4
206
207	testb $X86_CR4_PAE, %al		# check if PAE is enabled
208	jz .Lenable_paging
209
210	/* Check if extended functions are implemented */
211	movl $0x80000000, %eax
212	cpuid
213	/* Value must be in the range 0x80000001 to 0x8000ffff */
214	subl $0x80000001, %eax
215	cmpl $(0x8000ffff-0x80000001), %eax
216	ja .Lenable_paging
217
218	/* Clear bogus XD_DISABLE bits */
219	call verify_cpu
220
221	mov $0x80000001, %eax
222	cpuid
223	/* Execute Disable bit supported? */
224	btl $(X86_FEATURE_NX & 31), %edx
225	jnc .Lenable_paging
226
227	/* Setup EFER (Extended Feature Enable Register) */
228	movl $MSR_EFER, %ecx
229	rdmsr
230
231	btsl $_EFER_NX, %eax
232	/* Make changes effective */
233	wrmsr
234
235.Lenable_paging:
236
237/*
238 * Enable paging
239 */
240	movl $pa(initial_page_table), %eax
241	movl %eax,%cr3		/* set the page table pointer.. */
242	movl $CR0_STATE,%eax
243	movl %eax,%cr0		/* ..and set paging (PG) bit */
244	ljmp $__BOOT_CS,$1f	/* Clear prefetch and normalize %eip */
2451:
246	/* Shift the stack pointer to a virtual address */
247	addl $__PAGE_OFFSET, %esp
248
249/*
250 * Check if it is 486
251 */
252	movb $4,X86			# at least 486
253	cmpl $-1,X86_CPUID
254	je .Lis486
255
256	/* get vendor info */
257	xorl %eax,%eax			# call CPUID with 0 -> return vendor ID
258	cpuid
259	movl %eax,X86_CPUID		# save CPUID level
260	movl %ebx,X86_VENDOR_ID		# lo 4 chars
261	movl %edx,X86_VENDOR_ID+4	# next 4 chars
262	movl %ecx,X86_VENDOR_ID+8	# last 4 chars
263
264	orl %eax,%eax			# do we have processor info as well?
265	je .Lis486
266
267	movl $1,%eax		# Use the CPUID instruction to get CPU type
268	cpuid
269	movb %al,%cl		# save reg for future use
270	andb $0x0f,%ah		# mask processor family
271	movb %ah,X86
272	andb $0xf0,%al		# mask model
273	shrb $4,%al
274	movb %al,X86_MODEL
275	andb $0x0f,%cl		# mask mask revision
276	movb %cl,X86_STEPPING
277	movl %edx,X86_CAPABILITY
278
279.Lis486:
280	movl $0x50022,%ecx	# set AM, WP, NE and MP
281	movl %cr0,%eax
282	andl $0x80000011,%eax	# Save PG,PE,ET
283	orl %ecx,%eax
284	movl %eax,%cr0
285
286	lgdt early_gdt_descr
287	ljmp $(__KERNEL_CS),$1f
2881:	movl $(__KERNEL_DS),%eax	# reload all the segment registers
289	movl %eax,%ss			# after changing gdt.
290
291	movl $(__USER_DS),%eax		# DS/ES contains default USER segment
292	movl %eax,%ds
293	movl %eax,%es
294
295	movl $(__KERNEL_PERCPU), %eax
296	movl %eax,%fs			# set this cpu's percpu
297
298	xorl %eax,%eax
299	movl %eax,%gs			# clear possible garbage in %gs
300
301	xorl %eax,%eax			# Clear LDT
302	lldt %ax
303
304	call *(initial_code)
3051:	jmp 1b
306SYM_FUNC_END(startup_32_smp)
307
308#include "verify_cpu.S"
309
310__INIT
311SYM_FUNC_START(early_idt_handler_array)
312	# 36(%esp) %eflags
313	# 32(%esp) %cs
314	# 28(%esp) %eip
315	# 24(%rsp) error code
316	i = 0
317	.rept NUM_EXCEPTION_VECTORS
318	.if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0
319	pushl $0		# Dummy error code, to make stack frame uniform
320	.endif
321	pushl $i		# 20(%esp) Vector number
322	jmp early_idt_handler_common
323	i = i + 1
324	.fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
325	.endr
326SYM_FUNC_END(early_idt_handler_array)
327
328SYM_CODE_START_LOCAL(early_idt_handler_common)
329	/*
330	 * The stack is the hardware frame, an error code or zero, and the
331	 * vector number.
332	 */
333	cld
334
335	incl %ss:early_recursion_flag
336
337	/* The vector number is in pt_regs->gs */
338
339	cld
340	pushl	%fs		/* pt_regs->fs (__fsh varies by model) */
341	pushl	%es		/* pt_regs->es (__esh varies by model) */
342	pushl	%ds		/* pt_regs->ds (__dsh varies by model) */
343	pushl	%eax		/* pt_regs->ax */
344	pushl	%ebp		/* pt_regs->bp */
345	pushl	%edi		/* pt_regs->di */
346	pushl	%esi		/* pt_regs->si */
347	pushl	%edx		/* pt_regs->dx */
348	pushl	%ecx		/* pt_regs->cx */
349	pushl	%ebx		/* pt_regs->bx */
350
351	/* Fix up DS and ES */
352	movl	$(__KERNEL_DS), %ecx
353	movl	%ecx, %ds
354	movl	%ecx, %es
355
356	/* Load the vector number into EDX */
357	movl	PT_GS(%esp), %edx
358
359	/* Load GS into pt_regs->gs (and maybe clobber __gsh) */
360	movw	%gs, PT_GS(%esp)
361
362	movl	%esp, %eax	/* args are pt_regs (EAX), trapnr (EDX) */
363	call	early_fixup_exception
364
365	popl	%ebx		/* pt_regs->bx */
366	popl	%ecx		/* pt_regs->cx */
367	popl	%edx		/* pt_regs->dx */
368	popl	%esi		/* pt_regs->si */
369	popl	%edi		/* pt_regs->di */
370	popl	%ebp		/* pt_regs->bp */
371	popl	%eax		/* pt_regs->ax */
372	popl	%ds		/* pt_regs->ds (always ignores __dsh) */
373	popl	%es		/* pt_regs->es (always ignores __esh) */
374	popl	%fs		/* pt_regs->fs (always ignores __fsh) */
375	popl	%gs		/* pt_regs->gs (always ignores __gsh) */
376	decl	%ss:early_recursion_flag
377	addl	$4, %esp	/* pop pt_regs->orig_ax */
378	iret
379SYM_CODE_END(early_idt_handler_common)
380
381/* This is the default interrupt "handler" :-) */
382SYM_FUNC_START(early_ignore_irq)
383	cld
384#ifdef CONFIG_PRINTK
385	pushl %eax
386	pushl %ecx
387	pushl %edx
388	pushl %es
389	pushl %ds
390	movl $(__KERNEL_DS),%eax
391	movl %eax,%ds
392	movl %eax,%es
393	cmpl $2,early_recursion_flag
394	je hlt_loop
395	incl early_recursion_flag
396	pushl 16(%esp)
397	pushl 24(%esp)
398	pushl 32(%esp)
399	pushl 40(%esp)
400	pushl $int_msg
401	call _printk
402
403	call dump_stack
404
405	addl $(5*4),%esp
406	popl %ds
407	popl %es
408	popl %edx
409	popl %ecx
410	popl %eax
411#endif
412	iret
413
414hlt_loop:
415	hlt
416	jmp hlt_loop
417SYM_FUNC_END(early_ignore_irq)
418
419__INITDATA
420	.align 4
421SYM_DATA(early_recursion_flag, .long 0)
422
423__REFDATA
424	.align 4
425SYM_DATA(initial_code,		.long i386_start_kernel)
426
427#ifdef CONFIG_PAGE_TABLE_ISOLATION
428#define	PGD_ALIGN	(2 * PAGE_SIZE)
429#define PTI_USER_PGD_FILL	1024
430#else
431#define	PGD_ALIGN	(PAGE_SIZE)
432#define PTI_USER_PGD_FILL	0
433#endif
434/*
435 * BSS section
436 */
437__PAGE_ALIGNED_BSS
438	.align PGD_ALIGN
439#ifdef CONFIG_X86_PAE
440.globl initial_pg_pmd
441initial_pg_pmd:
442	.fill 1024*KPMDS,4,0
443#else
444.globl initial_page_table
445initial_page_table:
446	.fill 1024,4,0
447#endif
448	.align PGD_ALIGN
449initial_pg_fixmap:
450	.fill 1024,4,0
451.globl swapper_pg_dir
452	.align PGD_ALIGN
453swapper_pg_dir:
454	.fill 1024,4,0
455	.fill PTI_USER_PGD_FILL,4,0
456.globl empty_zero_page
457empty_zero_page:
458	.fill 4096,1,0
459EXPORT_SYMBOL(empty_zero_page)
460
461/*
462 * This starts the data section.
463 */
464#ifdef CONFIG_X86_PAE
465__PAGE_ALIGNED_DATA
466	/* Page-aligned for the benefit of paravirt? */
467	.align PGD_ALIGN
468SYM_DATA_START(initial_page_table)
469	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0	/* low identity map */
470# if KPMDS == 3
471	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
472	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
473	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
474# elif KPMDS == 2
475	.long	0,0
476	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
477	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
478# elif KPMDS == 1
479	.long	0,0
480	.long	0,0
481	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
482# else
483#  error "Kernel PMDs should be 1, 2 or 3"
484# endif
485	.align PAGE_SIZE		/* needs to be page-sized too */
486
487#ifdef CONFIG_PAGE_TABLE_ISOLATION
488	/*
489	 * PTI needs another page so sync_initial_pagetable() works correctly
490	 * and does not scribble over the data which is placed behind the
491	 * actual initial_page_table. See clone_pgd_range().
492	 */
493	.fill 1024, 4, 0
494#endif
495
496SYM_DATA_END(initial_page_table)
497#endif
498
499.data
500.balign 4
501/*
502 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder
503 * reliably detect the end of the stack.
504 */
505SYM_DATA(initial_stack,
506		.long init_thread_union + THREAD_SIZE -
507		SIZEOF_PTREGS - TOP_OF_KERNEL_STACK_PADDING)
508
509__INITRODATA
510int_msg:
511	.asciz "Unknown interrupt or fault at: %p %p %p\n"
512
513#include "../../x86/xen/xen-head.S"
514
515/*
516 * The IDT and GDT 'descriptors' are a strange 48-bit object
517 * only used by the lidt and lgdt instructions. They are not
518 * like usual segment descriptors - they consist of a 16-bit
519 * segment size, and 32-bit linear address value:
520 */
521
522	.data
523	ALIGN
524# early boot GDT descriptor (must use 1:1 address mapping)
525	.word 0				# 32 bit align gdt_desc.address
526SYM_DATA_START_LOCAL(boot_gdt_descr)
527	.word __BOOT_DS+7
528	.long boot_gdt - __PAGE_OFFSET
529SYM_DATA_END(boot_gdt_descr)
530
531# boot GDT descriptor (later on used by CPU#0):
532	.word 0				# 32 bit align gdt_desc.address
533SYM_DATA_START(early_gdt_descr)
534	.word GDT_ENTRIES*8-1
535	.long gdt_page			/* Overwritten for secondary CPUs */
536SYM_DATA_END(early_gdt_descr)
537
538/*
539 * The boot_gdt must mirror the equivalent in setup.S and is
540 * used only for booting.
541 */
542	.align L1_CACHE_BYTES
543SYM_DATA_START(boot_gdt)
544	.fill GDT_ENTRY_BOOT_CS,8,0
545	.quad 0x00cf9a000000ffff	/* kernel 4GB code at 0x00000000 */
546	.quad 0x00cf92000000ffff	/* kernel 4GB data at 0x00000000 */
547SYM_DATA_END(boot_gdt)
548