1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * IO definitions for the Hexagon architecture
4  *
5  * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
6  */
7 
8 #ifndef _ASM_IO_H
9 #define _ASM_IO_H
10 
11 #ifdef __KERNEL__
12 
13 #include <linux/types.h>
14 #include <asm/iomap.h>
15 #include <asm/page.h>
16 #include <asm/cacheflush.h>
17 
18 /*
19  * We don't have PCI yet.
20  * _IO_BASE is pointing at what should be unused virtual space.
21  */
22 #define IO_SPACE_LIMIT 0xffff
23 #define _IO_BASE ((void __iomem *)0xfe000000)
24 
25 #define IOMEM(x)        ((void __force __iomem *)(x))
26 
27 extern int remap_area_pages(unsigned long start, unsigned long phys_addr,
28 				unsigned long end, unsigned long flags);
29 
30 /* Defined in lib/io.c, needed for smc91x driver. */
31 extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
32 extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
33 
34 extern void __raw_readsl(const void __iomem *addr, void *data, int wordlen);
35 extern void __raw_writesl(void __iomem *addr, const void *data, int wordlen);
36 
37 #define readsw(p, d, l)	__raw_readsw(p, d, l)
38 #define writesw(p, d, l) __raw_writesw(p, d, l)
39 
40 #define readsl(p, d, l)   __raw_readsl(p, d, l)
41 #define writesl(p, d, l)  __raw_writesl(p, d, l)
42 
43 /*
44  * virt_to_phys - map virtual address to physical
45  * @address:  address to map
46  */
virt_to_phys(volatile void * address)47 static inline unsigned long virt_to_phys(volatile void *address)
48 {
49 	return __pa(address);
50 }
51 
52 /*
53  * phys_to_virt - map physical address to virtual
54  * @address: address to map
55  */
phys_to_virt(unsigned long address)56 static inline void *phys_to_virt(unsigned long address)
57 {
58 	return __va(address);
59 }
60 
61 /*
62  * convert a physical pointer to a virtual kernel pointer for
63  * /dev/mem access.
64  */
65 #define xlate_dev_mem_ptr(p)    __va(p)
66 
67 /*
68  * IO port access primitives.  Hexagon doesn't have special IO access
69  * instructions; all I/O is memory mapped.
70  *
71  * in/out are used for "ports", but we don't have "port instructions",
72  * so these are really just memory mapped too.
73  */
74 
75 /*
76  * readb - read byte from memory mapped device
77  * @addr:  pointer to memory
78  *
79  * Operates on "I/O bus memory space"
80  */
readb(const volatile void __iomem * addr)81 static inline u8 readb(const volatile void __iomem *addr)
82 {
83 	u8 val;
84 	asm volatile(
85 		"%0 = memb(%1);"
86 		: "=&r" (val)
87 		: "r" (addr)
88 	);
89 	return val;
90 }
91 
readw(const volatile void __iomem * addr)92 static inline u16 readw(const volatile void __iomem *addr)
93 {
94 	u16 val;
95 	asm volatile(
96 		"%0 = memh(%1);"
97 		: "=&r" (val)
98 		: "r" (addr)
99 	);
100 	return val;
101 }
102 
readl(const volatile void __iomem * addr)103 static inline u32 readl(const volatile void __iomem *addr)
104 {
105 	u32 val;
106 	asm volatile(
107 		"%0 = memw(%1);"
108 		: "=&r" (val)
109 		: "r" (addr)
110 	);
111 	return val;
112 }
113 
114 /*
115  * writeb - write a byte to a memory location
116  * @data: data to write to
117  * @addr:  pointer to memory
118  *
119  */
writeb(u8 data,volatile void __iomem * addr)120 static inline void writeb(u8 data, volatile void __iomem *addr)
121 {
122 	asm volatile(
123 		"memb(%0) = %1;"
124 		:
125 		: "r" (addr), "r" (data)
126 		: "memory"
127 	);
128 }
129 
writew(u16 data,volatile void __iomem * addr)130 static inline void writew(u16 data, volatile void __iomem *addr)
131 {
132 	asm volatile(
133 		"memh(%0) = %1;"
134 		:
135 		: "r" (addr), "r" (data)
136 		: "memory"
137 	);
138 
139 }
140 
writel(u32 data,volatile void __iomem * addr)141 static inline void writel(u32 data, volatile void __iomem *addr)
142 {
143 	asm volatile(
144 		"memw(%0) = %1;"
145 		:
146 		: "r" (addr), "r" (data)
147 		: "memory"
148 	);
149 }
150 
151 #define __raw_writeb writeb
152 #define __raw_writew writew
153 #define __raw_writel writel
154 
155 #define __raw_readb readb
156 #define __raw_readw readw
157 #define __raw_readl readl
158 
159 /*
160  * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626
161  */
162 
163 #define readb_relaxed __raw_readb
164 #define readw_relaxed __raw_readw
165 #define readl_relaxed __raw_readl
166 
167 #define writeb_relaxed __raw_writeb
168 #define writew_relaxed __raw_writew
169 #define writel_relaxed __raw_writel
170 
171 /*
172  * I/O memory mapping functions.
173  */
174 #define _PAGE_IOREMAP (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
175 		       (__HEXAGON_C_DEV << 6))
176 
177 #define ioremap_uc(addr, size) ioremap((addr), (size))
178 
179 
180 #define __raw_writel writel
181 
memcpy_fromio(void * dst,const volatile void __iomem * src,int count)182 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
183 	int count)
184 {
185 	memcpy(dst, (void *) src, count);
186 }
187 
memcpy_toio(volatile void __iomem * dst,const void * src,int count)188 static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
189 	int count)
190 {
191 	memcpy((void *) dst, src, count);
192 }
193 
memset_io(volatile void __iomem * addr,int value,size_t size)194 static inline void memset_io(volatile void __iomem *addr, int value,
195 			     size_t size)
196 {
197 	memset((void __force *)addr, value, size);
198 }
199 
200 #define PCI_IO_ADDR	(volatile void __iomem *)
201 
202 /*
203  * inb - read byte from I/O port or something
204  * @port:  address in I/O space
205  *
206  * Operates on "I/O bus I/O space"
207  */
inb(unsigned long port)208 static inline u8 inb(unsigned long port)
209 {
210 	return readb(_IO_BASE + (port & IO_SPACE_LIMIT));
211 }
212 
inw(unsigned long port)213 static inline u16 inw(unsigned long port)
214 {
215 	return readw(_IO_BASE + (port & IO_SPACE_LIMIT));
216 }
217 
inl(unsigned long port)218 static inline u32 inl(unsigned long port)
219 {
220 	return readl(_IO_BASE + (port & IO_SPACE_LIMIT));
221 }
222 
223 /*
224  * outb - write a byte to a memory location
225  * @data: data to write to
226  * @addr:  address in I/O space
227  */
outb(u8 data,unsigned long port)228 static inline void outb(u8 data, unsigned long port)
229 {
230 	writeb(data, _IO_BASE + (port & IO_SPACE_LIMIT));
231 }
232 
outw(u16 data,unsigned long port)233 static inline void outw(u16 data, unsigned long port)
234 {
235 	writew(data, _IO_BASE + (port & IO_SPACE_LIMIT));
236 }
237 
outl(u32 data,unsigned long port)238 static inline void outl(u32 data, unsigned long port)
239 {
240 	writel(data, _IO_BASE + (port & IO_SPACE_LIMIT));
241 }
242 
243 #define outb_p outb
244 #define outw_p outw
245 #define outl_p outl
246 
247 #define inb_p inb
248 #define inw_p inw
249 #define inl_p inl
250 
insb(unsigned long port,void * buffer,int count)251 static inline void insb(unsigned long port, void *buffer, int count)
252 {
253 	if (count) {
254 		u8 *buf = buffer;
255 		do {
256 			u8 x = inb(port);
257 			*buf++ = x;
258 		} while (--count);
259 	}
260 }
261 
insw(unsigned long port,void * buffer,int count)262 static inline void insw(unsigned long port, void *buffer, int count)
263 {
264 	if (count) {
265 		u16 *buf = buffer;
266 		do {
267 			u16 x = inw(port);
268 			*buf++ = x;
269 		} while (--count);
270 	}
271 }
272 
insl(unsigned long port,void * buffer,int count)273 static inline void insl(unsigned long port, void *buffer, int count)
274 {
275 	if (count) {
276 		u32 *buf = buffer;
277 		do {
278 			u32 x = inw(port);
279 			*buf++ = x;
280 		} while (--count);
281 	}
282 }
283 
outsb(unsigned long port,const void * buffer,int count)284 static inline void outsb(unsigned long port, const void *buffer, int count)
285 {
286 	if (count) {
287 		const u8 *buf = buffer;
288 		do {
289 			outb(*buf++, port);
290 		} while (--count);
291 	}
292 }
293 
outsw(unsigned long port,const void * buffer,int count)294 static inline void outsw(unsigned long port, const void *buffer, int count)
295 {
296 	if (count) {
297 		const u16 *buf = buffer;
298 		do {
299 			outw(*buf++, port);
300 		} while (--count);
301 	}
302 }
303 
outsl(unsigned long port,const void * buffer,int count)304 static inline void outsl(unsigned long port, const void *buffer, int count)
305 {
306 	if (count) {
307 		const u32 *buf = buffer;
308 		do {
309 			outl(*buf++, port);
310 		} while (--count);
311 	}
312 }
313 
314 /*
315  * These defines are necessary to use the generic io.h for filling in
316  * the missing parts of the API contract. This is because the platform
317  * uses (inline) functions rather than defines and the generic helper
318  * fills in the undefined.
319  */
320 #define virt_to_phys virt_to_phys
321 #define phys_to_virt phys_to_virt
322 #define memset_io memset_io
323 #define memcpy_fromio memcpy_fromio
324 #define memcpy_toio memcpy_toio
325 #define readb readb
326 #define readw readw
327 #define readl readl
328 #define writeb writeb
329 #define writew writew
330 #define writel writel
331 #define insb insb
332 #define insw insw
333 #define insl insl
334 #define outsb outsb
335 #define outsw outsw
336 #define outsl outsl
337 #include <asm-generic/io.h>
338 
339 #endif /* __KERNEL__ */
340 
341 #endif
342