1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Device Tree Source for am3517 SoC 4 * 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8#include "omap3.dtsi" 9 10/* AM3517 doesn't appear to have the crypto engines defined in omap3.dtsi */ 11/delete-node/ &aes1_target; 12/delete-node/ &aes2_target; 13 14/ { 15 aliases { 16 serial3 = &uart4; 17 can = &hecc; 18 }; 19 20 cpus { 21 cpu: cpu@0 { 22 /* Based on OMAP3630 variants OPP50 and OPP100 */ 23 operating-points-v2 = <&cpu0_opp_table>; 24 25 clock-latency = <300000>; /* From legacy driver */ 26 }; 27 }; 28 29 cpu0_opp_table: opp-table { 30 compatible = "operating-points-v2-ti-cpu"; 31 syscon = <&scm_conf>; 32 /* 33 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx 34 * appear to operate at 300MHz as well. Since AM3517 only 35 * lists one operating voltage, it will remain fixed at 1.2V 36 */ 37 opp-50-300000000 { 38 /* OPP50 */ 39 opp-hz = /bits/ 64 <300000000>; 40 opp-microvolt = <1200000>; 41 opp-supported-hw = <0xffffffff 0xffffffff>; 42 opp-suspend; 43 }; 44 45 opp-100-600000000 { 46 /* OPP100 */ 47 opp-hz = /bits/ 64 <600000000>; 48 opp-microvolt = <1200000>; 49 opp-supported-hw = <0xffffffff 0xffffffff>; 50 }; 51 }; 52 53 ocp@68000000 { 54 target-module@5c040000 { 55 compatible = "ti,sysc-omap2", "ti,sysc"; 56 reg = <0x5c040400 0x4>, 57 <0x5c040404 0x4>, 58 <0x5c040408 0x4>; 59 reg-names = "rev", "sysc", "syss"; 60 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP | 61 SYSC_OMAP2_SOFTRESET | 62 SYSC_OMAP2_AUTOIDLE)>; 63 ti,sysc-midle = <SYSC_IDLE_FORCE>, 64 <SYSC_IDLE_NO>, 65 <SYSC_IDLE_SMART>; 66 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 67 <SYSC_IDLE_NO>, 68 <SYSC_IDLE_SMART>; 69 ti,syss-mask = <1>; 70 clocks = <&hsotgusb_ick_am35xx>; 71 clock-names = "fck"; 72 #address-cells = <1>; 73 #size-cells = <1>; 74 ranges = <0x0 0x5c040000 0x1000>; 75 76 am35x_otg_hs: am35x_otg_hs@0 { 77 compatible = "ti,omap3-musb"; 78 status = "disabled"; 79 reg = <0 0x1000>; 80 interrupts = <71>; 81 interrupt-names = "mc"; 82 }; 83 }; 84 85 davinci_emac: ethernet@5c000000 { 86 compatible = "ti,am3517-emac"; 87 ti,hwmods = "davinci_emac"; 88 status = "disabled"; 89 reg = <0x5c000000 0x30000>; 90 interrupts = <67 68 69 70>; 91 syscon = <&scm_conf>; 92 ti,davinci-ctrl-reg-offset = <0x10000>; 93 ti,davinci-ctrl-mod-reg-offset = <0>; 94 ti,davinci-ctrl-ram-offset = <0x20000>; 95 ti,davinci-ctrl-ram-size = <0x2000>; 96 ti,davinci-rmii-en = /bits/ 8 <1>; 97 local-mac-address = [ 00 00 00 00 00 00 ]; 98 clocks = <&emac_ick>; 99 clock-names = "ick"; 100 }; 101 102 davinci_mdio: mdio@5c030000 { 103 compatible = "ti,davinci_mdio"; 104 ti,hwmods = "davinci_mdio"; 105 status = "disabled"; 106 reg = <0x5c030000 0x1000>; 107 bus_freq = <1000000>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 clocks = <&emac_fck>; 111 clock-names = "fck"; 112 }; 113 114 uart4: serial@4809e000 { 115 compatible = "ti,omap3-uart"; 116 ti,hwmods = "uart4"; 117 status = "disabled"; 118 reg = <0x4809e000 0x400>; 119 interrupts = <84>; 120 dmas = <&sdma 55 &sdma 54>; 121 dma-names = "tx", "rx"; 122 clock-frequency = <48000000>; 123 }; 124 125 omap3_pmx_core2: pinmux@480025d8 { 126 compatible = "ti,omap3-padconf", "pinctrl-single"; 127 reg = <0x480025d8 0x24>; 128 #address-cells = <1>; 129 #size-cells = <0>; 130 #pinctrl-cells = <1>; 131 #interrupt-cells = <1>; 132 interrupt-controller; 133 pinctrl-single,register-width = <16>; 134 pinctrl-single,function-mask = <0xff1f>; 135 }; 136 137 hecc: can@5c050000 { 138 compatible = "ti,am3517-hecc"; 139 status = "disabled"; 140 reg = <0x5c050000 0x80>, 141 <0x5c053000 0x180>, 142 <0x5c052000 0x200>; 143 reg-names = "hecc", "hecc-ram", "mbx"; 144 interrupts = <24>; 145 clocks = <&hecc_ck>; 146 }; 147 148 /* 149 * On am3517 the OCP registers do not seem to be accessible 150 * similar to the omap34xx. Maybe SGX is permanently set to 151 * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is 152 * write-only at 0x50000e10. We detect SGX based on the SGX 153 * revision register instead of the unreadable OCP revision 154 * register. 155 */ 156 sgx_module: target-module@50000000 { 157 compatible = "ti,sysc-omap2", "ti,sysc"; 158 reg = <0x50000014 0x4>; 159 reg-names = "rev"; 160 clocks = <&sgx_fck>, <&sgx_ick>; 161 clock-names = "fck", "ick"; 162 #address-cells = <1>; 163 #size-cells = <1>; 164 ranges = <0 0x50000000 0x4000>; 165 166 /* 167 * Closed source PowerVR driver, no child device 168 * binding or driver in mainline 169 */ 170 }; 171 }; 172}; 173 174/* Not currently working, probably needs at least different clocks */ 175&rng_target { 176 status = "disabled"; 177 /delete-property/ clocks; 178}; 179 180/* Table Table 5-79 of the TRM shows 480ab000 is reserved */ 181&usb_otg_target { 182 status = "disabled"; 183}; 184 185&iva { 186 status = "disabled"; 187}; 188 189&mailbox { 190 status = "disabled"; 191}; 192 193&mmu_isp { 194 status = "disabled"; 195}; 196 197#include "am35xx-clocks.dtsi" 198#include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 199 200/* Preferred always-on timer for clocksource */ 201&timer1_target { 202 ti,no-reset-on-init; 203 ti,no-idle; 204 timer@0 { 205 assigned-clocks = <&gpt1_fck>; 206 assigned-clock-parents = <&sys_ck>; 207 }; 208}; 209 210/* Preferred timer for clockevent */ 211&timer2_target { 212 ti,no-reset-on-init; 213 ti,no-idle; 214 timer@0 { 215 assigned-clocks = <&gpt2_fck>; 216 assigned-clock-parents = <&sys_ck>; 217 }; 218}; 219