1 // SPDX-License-Identifier: GPL-2.0-only
2 #define _GNU_SOURCE /* for program_invocation_short_name */
3 #include <fcntl.h>
4 #include <stdio.h>
5 #include <stdlib.h>
6 #include <string.h>
7 #include <sys/ioctl.h>
8
9 #include "apic.h"
10 #include "kvm_util.h"
11 #include "processor.h"
12 #include "test_util.h"
13
14 struct xapic_vcpu {
15 struct kvm_vcpu *vcpu;
16 bool is_x2apic;
17 };
18
xapic_guest_code(void)19 static void xapic_guest_code(void)
20 {
21 asm volatile("cli");
22
23 xapic_enable();
24
25 while (1) {
26 uint64_t val = (u64)xapic_read_reg(APIC_IRR) |
27 (u64)xapic_read_reg(APIC_IRR + 0x10) << 32;
28
29 xapic_write_reg(APIC_ICR2, val >> 32);
30 xapic_write_reg(APIC_ICR, val);
31 GUEST_SYNC(val);
32 }
33 }
34
x2apic_guest_code(void)35 static void x2apic_guest_code(void)
36 {
37 asm volatile("cli");
38
39 x2apic_enable();
40
41 do {
42 uint64_t val = x2apic_read_reg(APIC_IRR) |
43 x2apic_read_reg(APIC_IRR + 0x10) << 32;
44
45 x2apic_write_reg(APIC_ICR, val);
46 GUEST_SYNC(val);
47 } while (1);
48 }
49
____test_icr(struct xapic_vcpu * x,uint64_t val)50 static void ____test_icr(struct xapic_vcpu *x, uint64_t val)
51 {
52 struct kvm_vcpu *vcpu = x->vcpu;
53 struct kvm_lapic_state xapic;
54 struct ucall uc;
55 uint64_t icr;
56
57 /*
58 * Tell the guest what ICR value to write. Use the IRR to pass info,
59 * all bits are valid and should not be modified by KVM (ignoring the
60 * fact that vectors 0-15 are technically illegal).
61 */
62 vcpu_ioctl(vcpu, KVM_GET_LAPIC, &xapic);
63 *((u32 *)&xapic.regs[APIC_IRR]) = val;
64 *((u32 *)&xapic.regs[APIC_IRR + 0x10]) = val >> 32;
65 vcpu_ioctl(vcpu, KVM_SET_LAPIC, &xapic);
66
67 vcpu_run(vcpu);
68 ASSERT_EQ(get_ucall(vcpu, &uc), UCALL_SYNC);
69 ASSERT_EQ(uc.args[1], val);
70
71 vcpu_ioctl(vcpu, KVM_GET_LAPIC, &xapic);
72 icr = (u64)(*((u32 *)&xapic.regs[APIC_ICR])) |
73 (u64)(*((u32 *)&xapic.regs[APIC_ICR2])) << 32;
74 if (!x->is_x2apic) {
75 val &= (-1u | (0xffull << (32 + 24)));
76 ASSERT_EQ(icr, val & ~APIC_ICR_BUSY);
77 } else {
78 ASSERT_EQ(icr & ~APIC_ICR_BUSY, val & ~APIC_ICR_BUSY);
79 }
80 }
81
82 #define X2APIC_RSVED_BITS_MASK (GENMASK_ULL(31,20) | \
83 GENMASK_ULL(17,16) | \
84 GENMASK_ULL(13,13))
85
__test_icr(struct xapic_vcpu * x,uint64_t val)86 static void __test_icr(struct xapic_vcpu *x, uint64_t val)
87 {
88 if (x->is_x2apic) {
89 /* Hardware writing vICR register requires reserved bits 31:20,
90 * 17:16 and 13 kept as zero to avoid #GP exception. Data value
91 * written to vICR should mask out those bits above.
92 */
93 val &= ~X2APIC_RSVED_BITS_MASK;
94 }
95 ____test_icr(x, val | APIC_ICR_BUSY);
96 ____test_icr(x, val & ~(u64)APIC_ICR_BUSY);
97 }
98
test_icr(struct xapic_vcpu * x)99 static void test_icr(struct xapic_vcpu *x)
100 {
101 struct kvm_vcpu *vcpu = x->vcpu;
102 uint64_t icr, i, j;
103
104 icr = APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_FIXED;
105 for (i = 0; i <= 0xff; i++)
106 __test_icr(x, icr | i);
107
108 icr = APIC_INT_ASSERT | APIC_DM_FIXED;
109 for (i = 0; i <= 0xff; i++)
110 __test_icr(x, icr | i);
111
112 /*
113 * Send all flavors of IPIs to non-existent vCPUs. TODO: use number of
114 * vCPUs, not vcpu.id + 1. Arbitrarily use vector 0xff.
115 */
116 icr = APIC_INT_ASSERT | 0xff;
117 for (i = vcpu->id + 1; i < 0xff; i++) {
118 for (j = 0; j < 8; j++)
119 __test_icr(x, i << (32 + 24) | icr | (j << 8));
120 }
121
122 /* And again with a shorthand destination for all types of IPIs. */
123 icr = APIC_DEST_ALLBUT | APIC_INT_ASSERT;
124 for (i = 0; i < 8; i++)
125 __test_icr(x, icr | (i << 8));
126
127 /* And a few garbage value, just make sure it's an IRQ (blocked). */
128 __test_icr(x, 0xa5a5a5a5a5a5a5a5 & ~APIC_DM_FIXED_MASK);
129 __test_icr(x, 0x5a5a5a5a5a5a5a5a & ~APIC_DM_FIXED_MASK);
130 __test_icr(x, -1ull & ~APIC_DM_FIXED_MASK);
131 }
132
main(int argc,char * argv[])133 int main(int argc, char *argv[])
134 {
135 struct xapic_vcpu x = {
136 .vcpu = NULL,
137 .is_x2apic = true,
138 };
139 struct kvm_vm *vm;
140
141 vm = vm_create_with_one_vcpu(&x.vcpu, x2apic_guest_code);
142 test_icr(&x);
143 kvm_vm_free(vm);
144
145 /*
146 * Use a second VM for the xAPIC test so that x2APIC can be hidden from
147 * the guest in order to test AVIC. KVM disallows changing CPUID after
148 * KVM_RUN and AVIC is disabled if _any_ vCPU is allowed to use x2APIC.
149 */
150 vm = vm_create_with_one_vcpu(&x.vcpu, xapic_guest_code);
151 x.is_x2apic = false;
152
153 vcpu_clear_cpuid_feature(x.vcpu, X86_FEATURE_X2APIC);
154
155 virt_pg_map(vm, APIC_DEFAULT_GPA, APIC_DEFAULT_GPA);
156 test_icr(&x);
157 kvm_vm_free(vm);
158 }
159