1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Test for VMX-pmu perf capability msr
4 *
5 * Copyright (C) 2021 Intel Corporation
6 *
7 * Test to check the effect of various CPUID settings on
8 * MSR_IA32_PERF_CAPABILITIES MSR, and check that what
9 * we write with KVM_SET_MSR is _not_ modified by the guest
10 * and check it can be retrieved with KVM_GET_MSR, also test
11 * the invalid LBR formats are rejected.
12 */
13
14 #define _GNU_SOURCE /* for program_invocation_short_name */
15 #include <sys/ioctl.h>
16
17 #include "kvm_util.h"
18 #include "vmx.h"
19
20 #define PMU_CAP_FW_WRITES (1ULL << 13)
21 #define PMU_CAP_LBR_FMT 0x3f
22
23 union cpuid10_eax {
24 struct {
25 unsigned int version_id:8;
26 unsigned int num_counters:8;
27 unsigned int bit_width:8;
28 unsigned int mask_length:8;
29 } split;
30 unsigned int full;
31 };
32
33 union perf_capabilities {
34 struct {
35 u64 lbr_format:6;
36 u64 pebs_trap:1;
37 u64 pebs_arch_reg:1;
38 u64 pebs_format:4;
39 u64 smm_freeze:1;
40 u64 full_width_write:1;
41 u64 pebs_baseline:1;
42 u64 perf_metrics:1;
43 u64 pebs_output_pt_available:1;
44 u64 anythread_deprecated:1;
45 };
46 u64 capabilities;
47 };
48
guest_code(void)49 static void guest_code(void)
50 {
51 wrmsr(MSR_IA32_PERF_CAPABILITIES, PMU_CAP_LBR_FMT);
52 }
53
main(int argc,char * argv[])54 int main(int argc, char *argv[])
55 {
56 const struct kvm_cpuid_entry2 *entry_a_0;
57 struct kvm_vm *vm;
58 struct kvm_vcpu *vcpu;
59 int ret;
60 union cpuid10_eax eax;
61 union perf_capabilities host_cap;
62 uint64_t val;
63
64 host_cap.capabilities = kvm_get_feature_msr(MSR_IA32_PERF_CAPABILITIES);
65 host_cap.capabilities &= (PMU_CAP_FW_WRITES | PMU_CAP_LBR_FMT);
66
67 /* Create VM */
68 vm = vm_create_with_one_vcpu(&vcpu, guest_code);
69
70 TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM));
71
72 TEST_REQUIRE(kvm_get_cpuid_max_basic() >= 0xa);
73 entry_a_0 = kvm_get_supported_cpuid_entry(0xa);
74
75 eax.full = entry_a_0->eax;
76 __TEST_REQUIRE(eax.split.version_id, "PMU is not supported by the vCPU");
77
78 /* testcase 1, set capabilities when we have PDCM bit */
79 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, PMU_CAP_FW_WRITES);
80
81 /* check capabilities can be retrieved with KVM_GET_MSR */
82 ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), PMU_CAP_FW_WRITES);
83
84 /* check whatever we write with KVM_SET_MSR is _not_ modified */
85 vcpu_run(vcpu);
86 ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), PMU_CAP_FW_WRITES);
87
88 /* testcase 2, check valid LBR formats are accepted */
89 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
90 ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), 0);
91
92 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.lbr_format);
93 ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES), (u64)host_cap.lbr_format);
94
95 /*
96 * Testcase 3, check that an "invalid" LBR format is rejected. Only an
97 * exact match of the host's format (and 0/disabled) is allowed.
98 */
99 for (val = 1; val <= PMU_CAP_LBR_FMT; val++) {
100 if (val == (host_cap.capabilities & PMU_CAP_LBR_FMT))
101 continue;
102
103 ret = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, val);
104 TEST_ASSERT(!ret, "Bad LBR FMT = 0x%lx didn't fail", val);
105 }
106
107 printf("Completed perf capability tests.\n");
108 kvm_vm_free(vm);
109 }
110