1[ 2 { 3 "BriefDescription": "X87 Floating point assists (Precise Event)", 4 "Counter": "0,1,2,3", 5 "EventCode": "0xF7", 6 "EventName": "FP_ASSIST.ALL", 7 "PEBS": "1", 8 "SampleAfterValue": "20000", 9 "UMask": "0x1" 10 }, 11 { 12 "BriefDescription": "X87 Floating poiint assists for invalid input value (Precise Event)", 13 "Counter": "0,1,2,3", 14 "EventCode": "0xF7", 15 "EventName": "FP_ASSIST.INPUT", 16 "PEBS": "1", 17 "SampleAfterValue": "20000", 18 "UMask": "0x4" 19 }, 20 { 21 "BriefDescription": "X87 Floating point assists for invalid output value (Precise Event)", 22 "Counter": "0,1,2,3", 23 "EventCode": "0xF7", 24 "EventName": "FP_ASSIST.OUTPUT", 25 "PEBS": "1", 26 "SampleAfterValue": "20000", 27 "UMask": "0x2" 28 }, 29 { 30 "BriefDescription": "MMX Uops", 31 "Counter": "0,1,2,3", 32 "EventCode": "0x10", 33 "EventName": "FP_COMP_OPS_EXE.MMX", 34 "SampleAfterValue": "2000000", 35 "UMask": "0x2" 36 }, 37 { 38 "BriefDescription": "SSE2 integer Uops", 39 "Counter": "0,1,2,3", 40 "EventCode": "0x10", 41 "EventName": "FP_COMP_OPS_EXE.SSE2_INTEGER", 42 "SampleAfterValue": "2000000", 43 "UMask": "0x8" 44 }, 45 { 46 "BriefDescription": "SSE* FP double precision Uops", 47 "Counter": "0,1,2,3", 48 "EventCode": "0x10", 49 "EventName": "FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", 50 "SampleAfterValue": "2000000", 51 "UMask": "0x80" 52 }, 53 { 54 "BriefDescription": "SSE and SSE2 FP Uops", 55 "Counter": "0,1,2,3", 56 "EventCode": "0x10", 57 "EventName": "FP_COMP_OPS_EXE.SSE_FP", 58 "SampleAfterValue": "2000000", 59 "UMask": "0x4" 60 }, 61 { 62 "BriefDescription": "SSE FP packed Uops", 63 "Counter": "0,1,2,3", 64 "EventCode": "0x10", 65 "EventName": "FP_COMP_OPS_EXE.SSE_FP_PACKED", 66 "SampleAfterValue": "2000000", 67 "UMask": "0x10" 68 }, 69 { 70 "BriefDescription": "SSE FP scalar Uops", 71 "Counter": "0,1,2,3", 72 "EventCode": "0x10", 73 "EventName": "FP_COMP_OPS_EXE.SSE_FP_SCALAR", 74 "SampleAfterValue": "2000000", 75 "UMask": "0x20" 76 }, 77 { 78 "BriefDescription": "SSE* FP single precision Uops", 79 "Counter": "0,1,2,3", 80 "EventCode": "0x10", 81 "EventName": "FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", 82 "SampleAfterValue": "2000000", 83 "UMask": "0x40" 84 }, 85 { 86 "BriefDescription": "Computational floating-point operations executed", 87 "Counter": "0,1,2,3", 88 "EventCode": "0x10", 89 "EventName": "FP_COMP_OPS_EXE.X87", 90 "SampleAfterValue": "2000000", 91 "UMask": "0x1" 92 }, 93 { 94 "BriefDescription": "All Floating Point to and from MMX transitions", 95 "Counter": "0,1,2,3", 96 "EventCode": "0xCC", 97 "EventName": "FP_MMX_TRANS.ANY", 98 "SampleAfterValue": "2000000", 99 "UMask": "0x3" 100 }, 101 { 102 "BriefDescription": "Transitions from MMX to Floating Point instructions", 103 "Counter": "0,1,2,3", 104 "EventCode": "0xCC", 105 "EventName": "FP_MMX_TRANS.TO_FP", 106 "SampleAfterValue": "2000000", 107 "UMask": "0x1" 108 }, 109 { 110 "BriefDescription": "Transitions from Floating Point to MMX instructions", 111 "Counter": "0,1,2,3", 112 "EventCode": "0xCC", 113 "EventName": "FP_MMX_TRANS.TO_MMX", 114 "SampleAfterValue": "2000000", 115 "UMask": "0x2" 116 }, 117 { 118 "BriefDescription": "128 bit SIMD integer pack operations", 119 "Counter": "0,1,2,3", 120 "EventCode": "0x12", 121 "EventName": "SIMD_INT_128.PACK", 122 "SampleAfterValue": "200000", 123 "UMask": "0x4" 124 }, 125 { 126 "BriefDescription": "128 bit SIMD integer arithmetic operations", 127 "Counter": "0,1,2,3", 128 "EventCode": "0x12", 129 "EventName": "SIMD_INT_128.PACKED_ARITH", 130 "SampleAfterValue": "200000", 131 "UMask": "0x20" 132 }, 133 { 134 "BriefDescription": "128 bit SIMD integer logical operations", 135 "Counter": "0,1,2,3", 136 "EventCode": "0x12", 137 "EventName": "SIMD_INT_128.PACKED_LOGICAL", 138 "SampleAfterValue": "200000", 139 "UMask": "0x10" 140 }, 141 { 142 "BriefDescription": "128 bit SIMD integer multiply operations", 143 "Counter": "0,1,2,3", 144 "EventCode": "0x12", 145 "EventName": "SIMD_INT_128.PACKED_MPY", 146 "SampleAfterValue": "200000", 147 "UMask": "0x1" 148 }, 149 { 150 "BriefDescription": "128 bit SIMD integer shift operations", 151 "Counter": "0,1,2,3", 152 "EventCode": "0x12", 153 "EventName": "SIMD_INT_128.PACKED_SHIFT", 154 "SampleAfterValue": "200000", 155 "UMask": "0x2" 156 }, 157 { 158 "BriefDescription": "128 bit SIMD integer shuffle/move operations", 159 "Counter": "0,1,2,3", 160 "EventCode": "0x12", 161 "EventName": "SIMD_INT_128.SHUFFLE_MOVE", 162 "SampleAfterValue": "200000", 163 "UMask": "0x40" 164 }, 165 { 166 "BriefDescription": "128 bit SIMD integer unpack operations", 167 "Counter": "0,1,2,3", 168 "EventCode": "0x12", 169 "EventName": "SIMD_INT_128.UNPACK", 170 "SampleAfterValue": "200000", 171 "UMask": "0x8" 172 }, 173 { 174 "BriefDescription": "SIMD integer 64 bit pack operations", 175 "Counter": "0,1,2,3", 176 "EventCode": "0xFD", 177 "EventName": "SIMD_INT_64.PACK", 178 "SampleAfterValue": "200000", 179 "UMask": "0x4" 180 }, 181 { 182 "BriefDescription": "SIMD integer 64 bit arithmetic operations", 183 "Counter": "0,1,2,3", 184 "EventCode": "0xFD", 185 "EventName": "SIMD_INT_64.PACKED_ARITH", 186 "SampleAfterValue": "200000", 187 "UMask": "0x20" 188 }, 189 { 190 "BriefDescription": "SIMD integer 64 bit logical operations", 191 "Counter": "0,1,2,3", 192 "EventCode": "0xFD", 193 "EventName": "SIMD_INT_64.PACKED_LOGICAL", 194 "SampleAfterValue": "200000", 195 "UMask": "0x10" 196 }, 197 { 198 "BriefDescription": "SIMD integer 64 bit packed multiply operations", 199 "Counter": "0,1,2,3", 200 "EventCode": "0xFD", 201 "EventName": "SIMD_INT_64.PACKED_MPY", 202 "SampleAfterValue": "200000", 203 "UMask": "0x1" 204 }, 205 { 206 "BriefDescription": "SIMD integer 64 bit shift operations", 207 "Counter": "0,1,2,3", 208 "EventCode": "0xFD", 209 "EventName": "SIMD_INT_64.PACKED_SHIFT", 210 "SampleAfterValue": "200000", 211 "UMask": "0x2" 212 }, 213 { 214 "BriefDescription": "SIMD integer 64 bit shuffle/move operations", 215 "Counter": "0,1,2,3", 216 "EventCode": "0xFD", 217 "EventName": "SIMD_INT_64.SHUFFLE_MOVE", 218 "SampleAfterValue": "200000", 219 "UMask": "0x40" 220 }, 221 { 222 "BriefDescription": "SIMD integer 64 bit unpack operations", 223 "Counter": "0,1,2,3", 224 "EventCode": "0xFD", 225 "EventName": "SIMD_INT_64.UNPACK", 226 "SampleAfterValue": "200000", 227 "UMask": "0x8" 228 } 229] 230