1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018-2021 Intel Corporation. All rights reserved.
7 //
8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //
10 
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <sound/soc-acpi.h>
14 #include <sound/soc-acpi-intel-match.h>
15 #include <sound/sof.h>
16 #include "../ops.h"
17 #include "../sof-pci-dev.h"
18 
19 /* platform specific devices */
20 #include "hda.h"
21 
22 static const struct sof_dev_desc tgl_desc = {
23 	.machines               = snd_soc_acpi_intel_tgl_machines,
24 	.alt_machines		= snd_soc_acpi_intel_tgl_sdw_machines,
25 	.use_acpi_target_states	= true,
26 	.resindex_lpe_base      = 0,
27 	.resindex_pcicfg_base   = -1,
28 	.resindex_imr_base      = -1,
29 	.irqindex_host_ipc      = -1,
30 	.chip_info = &tgl_chip_info,
31 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
32 	.ipc_default		= SOF_IPC,
33 	.default_fw_path = {
34 		[SOF_IPC] = "intel/sof",
35 		[SOF_INTEL_IPC4] = "intel/avs/tgl",
36 	},
37 	.default_tplg_path = {
38 		[SOF_IPC] = "intel/sof-tplg",
39 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
40 	},
41 	.default_fw_filename = {
42 		[SOF_IPC] = "sof-tgl.ri",
43 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
44 	},
45 	.nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
46 	.ops = &sof_tgl_ops,
47 	.ops_init = sof_tgl_ops_init,
48 };
49 
50 static const struct sof_dev_desc tglh_desc = {
51 	.machines               = snd_soc_acpi_intel_tgl_machines,
52 	.alt_machines		= snd_soc_acpi_intel_tgl_sdw_machines,
53 	.use_acpi_target_states	= true,
54 	.resindex_lpe_base      = 0,
55 	.resindex_pcicfg_base   = -1,
56 	.resindex_imr_base      = -1,
57 	.irqindex_host_ipc      = -1,
58 	.chip_info = &tglh_chip_info,
59 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
60 	.ipc_default		= SOF_IPC,
61 	.default_fw_path = {
62 		[SOF_IPC] = "intel/sof",
63 		[SOF_INTEL_IPC4] = "intel/avs/tgl-h",
64 	},
65 	.default_tplg_path = {
66 		[SOF_IPC] = "intel/sof-tplg",
67 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
68 	},
69 	.default_fw_filename = {
70 		[SOF_IPC] = "sof-tgl-h.ri",
71 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
72 	},
73 	.nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
74 	.ops = &sof_tgl_ops,
75 	.ops_init = sof_tgl_ops_init,
76 	.ops_free = hda_ops_free,
77 };
78 
79 static const struct sof_dev_desc ehl_desc = {
80 	.machines               = snd_soc_acpi_intel_ehl_machines,
81 	.use_acpi_target_states	= true,
82 	.resindex_lpe_base      = 0,
83 	.resindex_pcicfg_base   = -1,
84 	.resindex_imr_base      = -1,
85 	.irqindex_host_ipc      = -1,
86 	.chip_info = &ehl_chip_info,
87 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
88 	.ipc_default		= SOF_IPC,
89 	.default_fw_path = {
90 		[SOF_IPC] = "intel/sof",
91 		[SOF_INTEL_IPC4] = "intel/avs/ehl",
92 	},
93 	.default_tplg_path = {
94 		[SOF_IPC] = "intel/sof-tplg",
95 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
96 	},
97 	.default_fw_filename = {
98 		[SOF_IPC] = "sof-ehl.ri",
99 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
100 	},
101 	.nocodec_tplg_filename = "sof-ehl-nocodec.tplg",
102 	.ops = &sof_tgl_ops,
103 	.ops_init = sof_tgl_ops_init,
104 };
105 
106 static const struct sof_dev_desc adls_desc = {
107 	.machines               = snd_soc_acpi_intel_adl_machines,
108 	.alt_machines           = snd_soc_acpi_intel_adl_sdw_machines,
109 	.use_acpi_target_states	= true,
110 	.resindex_lpe_base      = 0,
111 	.resindex_pcicfg_base   = -1,
112 	.resindex_imr_base      = -1,
113 	.irqindex_host_ipc      = -1,
114 	.chip_info = &adls_chip_info,
115 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
116 	.ipc_default		= SOF_IPC,
117 	.default_fw_path = {
118 		[SOF_IPC] = "intel/sof",
119 		[SOF_INTEL_IPC4] = "intel/avs/adl-s",
120 	},
121 	.default_tplg_path = {
122 		[SOF_IPC] = "intel/sof-tplg",
123 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
124 	},
125 	.default_fw_filename = {
126 		[SOF_IPC] = "sof-adl-s.ri",
127 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
128 	},
129 	.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
130 	.ops = &sof_tgl_ops,
131 	.ops_init = sof_tgl_ops_init,
132 };
133 
134 static const struct sof_dev_desc adl_desc = {
135 	.machines               = snd_soc_acpi_intel_adl_machines,
136 	.alt_machines           = snd_soc_acpi_intel_adl_sdw_machines,
137 	.use_acpi_target_states = true,
138 	.resindex_lpe_base      = 0,
139 	.resindex_pcicfg_base   = -1,
140 	.resindex_imr_base      = -1,
141 	.irqindex_host_ipc      = -1,
142 	.chip_info = &tgl_chip_info,
143 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
144 	.ipc_default		= SOF_IPC,
145 	.default_fw_path = {
146 		[SOF_IPC] = "intel/sof",
147 		[SOF_INTEL_IPC4] = "intel/avs/adl",
148 	},
149 	.default_tplg_path = {
150 		[SOF_IPC] = "intel/sof-tplg",
151 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
152 	},
153 	.default_fw_filename = {
154 		[SOF_IPC] = "sof-adl.ri",
155 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
156 	},
157 	.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
158 	.ops = &sof_tgl_ops,
159 	.ops_init = sof_tgl_ops_init,
160 };
161 
162 static const struct sof_dev_desc adl_n_desc = {
163 	.machines               = snd_soc_acpi_intel_adl_machines,
164 	.alt_machines           = snd_soc_acpi_intel_adl_sdw_machines,
165 	.use_acpi_target_states = true,
166 	.resindex_lpe_base      = 0,
167 	.resindex_pcicfg_base   = -1,
168 	.resindex_imr_base      = -1,
169 	.irqindex_host_ipc      = -1,
170 	.chip_info = &tgl_chip_info,
171 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
172 	.ipc_default		= SOF_IPC,
173 	.default_fw_path = {
174 		[SOF_IPC] = "intel/sof",
175 		[SOF_INTEL_IPC4] = "intel/avs/adl-n",
176 	},
177 	.default_tplg_path = {
178 		[SOF_IPC] = "intel/sof-tplg",
179 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
180 	},
181 	.default_fw_filename = {
182 		[SOF_IPC] = "sof-adl-n.ri",
183 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
184 	},
185 	.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
186 	.ops = &sof_tgl_ops,
187 	.ops_init = sof_tgl_ops_init,
188 };
189 
190 static const struct sof_dev_desc rpls_desc = {
191 	.machines               = snd_soc_acpi_intel_rpl_machines,
192 	.alt_machines           = snd_soc_acpi_intel_rpl_sdw_machines,
193 	.use_acpi_target_states	= true,
194 	.resindex_lpe_base      = 0,
195 	.resindex_pcicfg_base   = -1,
196 	.resindex_imr_base      = -1,
197 	.irqindex_host_ipc      = -1,
198 	.chip_info = &adls_chip_info,
199 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
200 	.ipc_default		= SOF_IPC,
201 	.default_fw_path = {
202 		[SOF_IPC] = "intel/sof",
203 		[SOF_INTEL_IPC4] = "intel/avs/rpl-s",
204 	},
205 	.default_tplg_path = {
206 		[SOF_IPC] = "intel/sof-tplg",
207 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
208 	},
209 	.default_fw_filename = {
210 		[SOF_IPC] = "sof-rpl-s.ri",
211 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
212 	},
213 	.nocodec_tplg_filename = "sof-rpl-nocodec.tplg",
214 	.ops = &sof_tgl_ops,
215 	.ops_init = sof_tgl_ops_init,
216 };
217 
218 static const struct sof_dev_desc rpl_desc = {
219 	.machines               = snd_soc_acpi_intel_rpl_machines,
220 	.alt_machines           = snd_soc_acpi_intel_rpl_sdw_machines,
221 	.use_acpi_target_states = true,
222 	.resindex_lpe_base      = 0,
223 	.resindex_pcicfg_base   = -1,
224 	.resindex_imr_base      = -1,
225 	.irqindex_host_ipc      = -1,
226 	.chip_info = &tgl_chip_info,
227 	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
228 	.ipc_default		= SOF_IPC,
229 	.default_fw_path = {
230 		[SOF_IPC] = "intel/sof",
231 		[SOF_INTEL_IPC4] = "intel/avs/rpl",
232 	},
233 	.default_tplg_path = {
234 		[SOF_IPC] = "intel/sof-tplg",
235 		[SOF_INTEL_IPC4] = "intel/avs-tplg",
236 	},
237 	.default_fw_filename = {
238 		[SOF_IPC] = "sof-rpl.ri",
239 		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
240 	},
241 	.nocodec_tplg_filename = "sof-rpl-nocodec.tplg",
242 	.ops = &sof_tgl_ops,
243 	.ops_init = sof_tgl_ops_init,
244 };
245 
246 /* PCI IDs */
247 static const struct pci_device_id sof_pci_ids[] = {
248 	{ PCI_DEVICE(0x8086, 0xa0c8), /* TGL-LP */
249 		.driver_data = (unsigned long)&tgl_desc},
250 	{ PCI_DEVICE(0x8086, 0x43c8), /* TGL-H */
251 		.driver_data = (unsigned long)&tglh_desc},
252 	{ PCI_DEVICE(0x8086, 0x4b55), /* EHL */
253 		.driver_data = (unsigned long)&ehl_desc},
254 	{ PCI_DEVICE(0x8086, 0x4b58), /* EHL */
255 		.driver_data = (unsigned long)&ehl_desc},
256 	{ PCI_DEVICE(0x8086, 0x7ad0), /* ADL-S */
257 		.driver_data = (unsigned long)&adls_desc},
258 	{ PCI_DEVICE(0x8086, 0x7a50), /* RPL-S */
259 		.driver_data = (unsigned long)&rpls_desc},
260 	{ PCI_DEVICE(0x8086, 0x51c8), /* ADL-P */
261 		.driver_data = (unsigned long)&adl_desc},
262 	{ PCI_DEVICE(0x8086, 0x51c9), /* ADL-PS */
263 		.driver_data = (unsigned long)&adl_desc},
264 	{ PCI_DEVICE(0x8086, 0x51ca), /* RPL-P */
265 		.driver_data = (unsigned long)&rpl_desc},
266 	{ PCI_DEVICE(0x8086, 0x51cb), /* RPL-P */
267 		.driver_data = (unsigned long)&rpl_desc},
268 	{ PCI_DEVICE(0x8086, 0x51cc), /* ADL-M */
269 		.driver_data = (unsigned long)&adl_desc},
270 	{ PCI_DEVICE(0x8086, 0x51cd), /* ADL-P */
271 		.driver_data = (unsigned long)&adl_desc},
272 	{ PCI_DEVICE(0x8086, 0x51ce), /* RPL-M */
273 		.driver_data = (unsigned long)&rpl_desc},
274 	{ PCI_DEVICE(0x8086, 0x51cf), /* RPL-PX */
275 		.driver_data = (unsigned long)&rpl_desc},
276 	{ PCI_DEVICE(0x8086, 0x54c8), /* ADL-N */
277 		.driver_data = (unsigned long)&adl_n_desc},
278 	{ 0, }
279 };
280 MODULE_DEVICE_TABLE(pci, sof_pci_ids);
281 
282 /* pci_driver definition */
283 static struct pci_driver snd_sof_pci_intel_tgl_driver = {
284 	.name = "sof-audio-pci-intel-tgl",
285 	.id_table = sof_pci_ids,
286 	.probe = hda_pci_intel_probe,
287 	.remove = sof_pci_remove,
288 	.shutdown = sof_pci_shutdown,
289 	.driver = {
290 		.pm = &sof_pci_pm,
291 	},
292 };
293 module_pci_driver(snd_sof_pci_intel_tgl_driver);
294 
295 MODULE_LICENSE("Dual BSD/GPL");
296 MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_COMMON);
297 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
298