1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2020 MediaTek Inc.
4 *
5 * Author: ChiYuan Huang <cy_huang@richtek.com>
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/of.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/usb/tcpci.h>
15 #include <linux/usb/tcpm.h>
16
17 #define MT6360_REG_PHYCTRL1 0x80
18 #define MT6360_REG_PHYCTRL3 0x82
19 #define MT6360_REG_PHYCTRL7 0x86
20 #define MT6360_REG_VCONNCTRL1 0x8C
21 #define MT6360_REG_MODECTRL2 0x8F
22 #define MT6360_REG_SWRESET 0xA0
23 #define MT6360_REG_DEBCTRL1 0xA1
24 #define MT6360_REG_DRPCTRL1 0xA2
25 #define MT6360_REG_DRPCTRL2 0xA3
26 #define MT6360_REG_I2CTORST 0xBF
27 #define MT6360_REG_PHYCTRL11 0xCA
28 #define MT6360_REG_RXCTRL1 0xCE
29 #define MT6360_REG_RXCTRL2 0xCF
30 #define MT6360_REG_CTDCTRL2 0xEC
31
32 /* MT6360_REG_VCONNCTRL1 */
33 #define MT6360_VCONNCL_ENABLE BIT(0)
34 /* MT6360_REG_RXCTRL2 */
35 #define MT6360_OPEN40M_ENABLE BIT(7)
36 /* MT6360_REG_CTDCTRL2 */
37 #define MT6360_RPONESHOT_ENABLE BIT(6)
38
39 struct mt6360_tcpc_info {
40 struct tcpci_data tdata;
41 struct tcpci *tcpci;
42 struct device *dev;
43 int irq;
44 };
45
mt6360_tcpc_read16(struct regmap * regmap,unsigned int reg,u16 * val)46 static inline int mt6360_tcpc_read16(struct regmap *regmap,
47 unsigned int reg, u16 *val)
48 {
49 return regmap_raw_read(regmap, reg, val, sizeof(u16));
50 }
51
mt6360_tcpc_write16(struct regmap * regmap,unsigned int reg,u16 val)52 static inline int mt6360_tcpc_write16(struct regmap *regmap,
53 unsigned int reg, u16 val)
54 {
55 return regmap_raw_write(regmap, reg, &val, sizeof(u16));
56 }
57
mt6360_tcpc_init(struct tcpci * tcpci,struct tcpci_data * tdata)58 static int mt6360_tcpc_init(struct tcpci *tcpci, struct tcpci_data *tdata)
59 {
60 struct regmap *regmap = tdata->regmap;
61 int ret;
62
63 ret = regmap_write(regmap, MT6360_REG_SWRESET, 0x01);
64 if (ret)
65 return ret;
66
67 /* after reset command, wait 1~2ms to wait IC action */
68 usleep_range(1000, 2000);
69
70 /* write all alert to masked */
71 ret = mt6360_tcpc_write16(regmap, TCPC_ALERT_MASK, 0);
72 if (ret)
73 return ret;
74
75 /* config I2C timeout reset enable , and timeout to 200ms */
76 ret = regmap_write(regmap, MT6360_REG_I2CTORST, 0x8F);
77 if (ret)
78 return ret;
79
80 /* config CC Detect Debounce : 26.7*val us */
81 ret = regmap_write(regmap, MT6360_REG_DEBCTRL1, 0x10);
82 if (ret)
83 return ret;
84
85 /* DRP Toggle Cycle : 51.2 + 6.4*val ms */
86 ret = regmap_write(regmap, MT6360_REG_DRPCTRL1, 4);
87 if (ret)
88 return ret;
89
90 /* DRP Duyt Ctrl : dcSRC: /1024 */
91 ret = mt6360_tcpc_write16(regmap, MT6360_REG_DRPCTRL2, 330);
92 if (ret)
93 return ret;
94
95 /* Enable VCONN Current Limit function */
96 ret = regmap_update_bits(regmap, MT6360_REG_VCONNCTRL1, MT6360_VCONNCL_ENABLE,
97 MT6360_VCONNCL_ENABLE);
98 if (ret)
99 return ret;
100
101 /* Enable cc open 40ms when pmic send vsysuv signal */
102 ret = regmap_update_bits(regmap, MT6360_REG_RXCTRL2, MT6360_OPEN40M_ENABLE,
103 MT6360_OPEN40M_ENABLE);
104 if (ret)
105 return ret;
106
107 /* Enable Rpdet oneshot detection */
108 ret = regmap_update_bits(regmap, MT6360_REG_CTDCTRL2, MT6360_RPONESHOT_ENABLE,
109 MT6360_RPONESHOT_ENABLE);
110 if (ret)
111 return ret;
112
113 /* BMC PHY */
114 ret = mt6360_tcpc_write16(regmap, MT6360_REG_PHYCTRL1, 0x3A70);
115 if (ret)
116 return ret;
117
118 ret = regmap_write(regmap, MT6360_REG_PHYCTRL3, 0x82);
119 if (ret)
120 return ret;
121
122 ret = regmap_write(regmap, MT6360_REG_PHYCTRL7, 0x36);
123 if (ret)
124 return ret;
125
126 ret = mt6360_tcpc_write16(regmap, MT6360_REG_PHYCTRL11, 0x3C60);
127 if (ret)
128 return ret;
129
130 ret = regmap_write(regmap, MT6360_REG_RXCTRL1, 0xE8);
131 if (ret)
132 return ret;
133
134 /* Set shipping mode off, AUTOIDLE on */
135 return regmap_write(regmap, MT6360_REG_MODECTRL2, 0x7A);
136 }
137
mt6360_irq(int irq,void * dev_id)138 static irqreturn_t mt6360_irq(int irq, void *dev_id)
139 {
140 struct mt6360_tcpc_info *mti = dev_id;
141
142 return tcpci_irq(mti->tcpci);
143 }
144
mt6360_tcpc_probe(struct platform_device * pdev)145 static int mt6360_tcpc_probe(struct platform_device *pdev)
146 {
147 struct mt6360_tcpc_info *mti;
148 int ret;
149
150 mti = devm_kzalloc(&pdev->dev, sizeof(*mti), GFP_KERNEL);
151 if (!mti)
152 return -ENOMEM;
153
154 mti->dev = &pdev->dev;
155
156 mti->tdata.regmap = dev_get_regmap(pdev->dev.parent, NULL);
157 if (!mti->tdata.regmap) {
158 dev_err(&pdev->dev, "Failed to get parent regmap\n");
159 return -ENODEV;
160 }
161
162 mti->irq = platform_get_irq_byname(pdev, "PD_IRQB");
163 if (mti->irq < 0)
164 return mti->irq;
165
166 mti->tdata.init = mt6360_tcpc_init;
167 mti->tcpci = tcpci_register_port(&pdev->dev, &mti->tdata);
168 if (IS_ERR(mti->tcpci)) {
169 dev_err(&pdev->dev, "Failed to register tcpci port\n");
170 return PTR_ERR(mti->tcpci);
171 }
172
173 ret = devm_request_threaded_irq(mti->dev, mti->irq, NULL, mt6360_irq, IRQF_ONESHOT,
174 dev_name(&pdev->dev), mti);
175 if (ret) {
176 dev_err(mti->dev, "Failed to register irq\n");
177 tcpci_unregister_port(mti->tcpci);
178 return ret;
179 }
180
181 device_init_wakeup(&pdev->dev, true);
182 platform_set_drvdata(pdev, mti);
183
184 return 0;
185 }
186
mt6360_tcpc_remove(struct platform_device * pdev)187 static int mt6360_tcpc_remove(struct platform_device *pdev)
188 {
189 struct mt6360_tcpc_info *mti = platform_get_drvdata(pdev);
190
191 disable_irq(mti->irq);
192 tcpci_unregister_port(mti->tcpci);
193 return 0;
194 }
195
mt6360_tcpc_suspend(struct device * dev)196 static int __maybe_unused mt6360_tcpc_suspend(struct device *dev)
197 {
198 struct mt6360_tcpc_info *mti = dev_get_drvdata(dev);
199
200 if (device_may_wakeup(dev))
201 enable_irq_wake(mti->irq);
202
203 return 0;
204 }
205
mt6360_tcpc_resume(struct device * dev)206 static int __maybe_unused mt6360_tcpc_resume(struct device *dev)
207 {
208 struct mt6360_tcpc_info *mti = dev_get_drvdata(dev);
209
210 if (device_may_wakeup(dev))
211 disable_irq_wake(mti->irq);
212
213 return 0;
214 }
215
216 static SIMPLE_DEV_PM_OPS(mt6360_tcpc_pm_ops, mt6360_tcpc_suspend, mt6360_tcpc_resume);
217
218 static const struct of_device_id __maybe_unused mt6360_tcpc_of_id[] = {
219 { .compatible = "mediatek,mt6360-tcpc", },
220 {},
221 };
222 MODULE_DEVICE_TABLE(of, mt6360_tcpc_of_id);
223
224 static struct platform_driver mt6360_tcpc_driver = {
225 .driver = {
226 .name = "mt6360-tcpc",
227 .pm = &mt6360_tcpc_pm_ops,
228 .of_match_table = mt6360_tcpc_of_id,
229 },
230 .probe = mt6360_tcpc_probe,
231 .remove = mt6360_tcpc_remove,
232 };
233 module_platform_driver(mt6360_tcpc_driver);
234
235 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
236 MODULE_DESCRIPTION("MT6360 USB Type-C Port Controller Interface Driver");
237 MODULE_LICENSE("GPL v2");
238