1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * altera_uart.c -- Altera UART driver
4 *
5 * Based on mcf.c -- Freescale ColdFire UART driver
6 *
7 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
9 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/console.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/serial.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/io.h>
25 #include <linux/altera_uart.h>
26
27 #define DRV_NAME "altera_uart"
28 #define SERIAL_ALTERA_MAJOR 204
29 #define SERIAL_ALTERA_MINOR 213
30
31 /*
32 * Altera UART register definitions according to the Nios UART datasheet:
33 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
34 */
35
36 #define ALTERA_UART_SIZE 32
37
38 #define ALTERA_UART_RXDATA_REG 0
39 #define ALTERA_UART_TXDATA_REG 4
40 #define ALTERA_UART_STATUS_REG 8
41 #define ALTERA_UART_CONTROL_REG 12
42 #define ALTERA_UART_DIVISOR_REG 16
43 #define ALTERA_UART_EOP_REG 20
44
45 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
46 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
47 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
48 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
49 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
50 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
51 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
52 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
53 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
54 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
55 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
56 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
57
58 /* Enable interrupt on... */
59 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
60 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
61 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
62 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
63 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
64 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
65 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
66 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
67 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
68
69 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
70 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
71 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
72 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
73
74 /*
75 * Local per-uart structure.
76 */
77 struct altera_uart {
78 struct uart_port port;
79 struct timer_list tmr;
80 unsigned int sigs; /* Local copy of line sigs */
81 unsigned short imr; /* Local IMR mirror */
82 };
83
altera_uart_readl(struct uart_port * port,int reg)84 static u32 altera_uart_readl(struct uart_port *port, int reg)
85 {
86 return readl(port->membase + (reg << port->regshift));
87 }
88
altera_uart_writel(struct uart_port * port,u32 dat,int reg)89 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
90 {
91 writel(dat, port->membase + (reg << port->regshift));
92 }
93
altera_uart_tx_empty(struct uart_port * port)94 static unsigned int altera_uart_tx_empty(struct uart_port *port)
95 {
96 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
97 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
98 }
99
altera_uart_get_mctrl(struct uart_port * port)100 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
101 {
102 struct altera_uart *pp = container_of(port, struct altera_uart, port);
103 unsigned int sigs;
104
105 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
106 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
107 sigs |= (pp->sigs & TIOCM_RTS);
108
109 return sigs;
110 }
111
altera_uart_update_ctrl_reg(struct altera_uart * pp)112 static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
113 {
114 unsigned short imr = pp->imr;
115
116 /*
117 * If the device doesn't have an irq, ensure that the irq bits are
118 * masked out to keep the irq line inactive.
119 */
120 if (!pp->port.irq)
121 imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
122
123 altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
124 }
125
altera_uart_set_mctrl(struct uart_port * port,unsigned int sigs)126 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
127 {
128 struct altera_uart *pp = container_of(port, struct altera_uart, port);
129
130 pp->sigs = sigs;
131 if (sigs & TIOCM_RTS)
132 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
133 else
134 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
135 altera_uart_update_ctrl_reg(pp);
136 }
137
altera_uart_start_tx(struct uart_port * port)138 static void altera_uart_start_tx(struct uart_port *port)
139 {
140 struct altera_uart *pp = container_of(port, struct altera_uart, port);
141
142 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
143 altera_uart_update_ctrl_reg(pp);
144 }
145
altera_uart_stop_tx(struct uart_port * port)146 static void altera_uart_stop_tx(struct uart_port *port)
147 {
148 struct altera_uart *pp = container_of(port, struct altera_uart, port);
149
150 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
151 altera_uart_update_ctrl_reg(pp);
152 }
153
altera_uart_stop_rx(struct uart_port * port)154 static void altera_uart_stop_rx(struct uart_port *port)
155 {
156 struct altera_uart *pp = container_of(port, struct altera_uart, port);
157
158 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
159 altera_uart_update_ctrl_reg(pp);
160 }
161
altera_uart_break_ctl(struct uart_port * port,int break_state)162 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
163 {
164 struct altera_uart *pp = container_of(port, struct altera_uart, port);
165 unsigned long flags;
166
167 spin_lock_irqsave(&port->lock, flags);
168 if (break_state == -1)
169 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
170 else
171 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
172 altera_uart_update_ctrl_reg(pp);
173 spin_unlock_irqrestore(&port->lock, flags);
174 }
175
altera_uart_set_termios(struct uart_port * port,struct ktermios * termios,const struct ktermios * old)176 static void altera_uart_set_termios(struct uart_port *port,
177 struct ktermios *termios,
178 const struct ktermios *old)
179 {
180 unsigned long flags;
181 unsigned int baud, baudclk;
182
183 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
184 baudclk = port->uartclk / baud;
185
186 if (old)
187 tty_termios_copy_hw(termios, old);
188 tty_termios_encode_baud_rate(termios, baud, baud);
189
190 spin_lock_irqsave(&port->lock, flags);
191 uart_update_timeout(port, termios->c_cflag, baud);
192 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
193 spin_unlock_irqrestore(&port->lock, flags);
194
195 /*
196 * FIXME: port->read_status_mask and port->ignore_status_mask
197 * need to be initialized based on termios settings for
198 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
199 */
200 }
201
altera_uart_rx_chars(struct uart_port * port)202 static void altera_uart_rx_chars(struct uart_port *port)
203 {
204 unsigned char ch, flag;
205 unsigned short status;
206
207 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
208 ALTERA_UART_STATUS_RRDY_MSK) {
209 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
210 flag = TTY_NORMAL;
211 port->icount.rx++;
212
213 if (status & ALTERA_UART_STATUS_E_MSK) {
214 altera_uart_writel(port, status,
215 ALTERA_UART_STATUS_REG);
216
217 if (status & ALTERA_UART_STATUS_BRK_MSK) {
218 port->icount.brk++;
219 if (uart_handle_break(port))
220 continue;
221 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
222 port->icount.parity++;
223 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
224 port->icount.overrun++;
225 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
226 port->icount.frame++;
227 }
228
229 status &= port->read_status_mask;
230
231 if (status & ALTERA_UART_STATUS_BRK_MSK)
232 flag = TTY_BREAK;
233 else if (status & ALTERA_UART_STATUS_PE_MSK)
234 flag = TTY_PARITY;
235 else if (status & ALTERA_UART_STATUS_FE_MSK)
236 flag = TTY_FRAME;
237 }
238
239 if (uart_handle_sysrq_char(port, ch))
240 continue;
241 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
242 flag);
243 }
244
245 tty_flip_buffer_push(&port->state->port);
246 }
247
altera_uart_tx_chars(struct uart_port * port)248 static void altera_uart_tx_chars(struct uart_port *port)
249 {
250 struct circ_buf *xmit = &port->state->xmit;
251
252 if (port->x_char) {
253 /* Send special char - probably flow control */
254 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
255 port->x_char = 0;
256 port->icount.tx++;
257 return;
258 }
259
260 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
261 ALTERA_UART_STATUS_TRDY_MSK) {
262 if (xmit->head == xmit->tail)
263 break;
264 altera_uart_writel(port, xmit->buf[xmit->tail],
265 ALTERA_UART_TXDATA_REG);
266 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
267 port->icount.tx++;
268 }
269
270 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
271 uart_write_wakeup(port);
272
273 if (uart_circ_empty(xmit))
274 altera_uart_stop_tx(port);
275 }
276
altera_uart_interrupt(int irq,void * data)277 static irqreturn_t altera_uart_interrupt(int irq, void *data)
278 {
279 struct uart_port *port = data;
280 struct altera_uart *pp = container_of(port, struct altera_uart, port);
281 unsigned long flags;
282 unsigned int isr;
283
284 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
285
286 spin_lock_irqsave(&port->lock, flags);
287 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
288 altera_uart_rx_chars(port);
289 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
290 altera_uart_tx_chars(port);
291 spin_unlock_irqrestore(&port->lock, flags);
292
293 return IRQ_RETVAL(isr);
294 }
295
altera_uart_timer(struct timer_list * t)296 static void altera_uart_timer(struct timer_list *t)
297 {
298 struct altera_uart *pp = from_timer(pp, t, tmr);
299 struct uart_port *port = &pp->port;
300
301 altera_uart_interrupt(0, port);
302 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
303 }
304
altera_uart_config_port(struct uart_port * port,int flags)305 static void altera_uart_config_port(struct uart_port *port, int flags)
306 {
307 port->type = PORT_ALTERA_UART;
308
309 /* Clear mask, so no surprise interrupts. */
310 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
311 /* Clear status register */
312 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
313 }
314
altera_uart_startup(struct uart_port * port)315 static int altera_uart_startup(struct uart_port *port)
316 {
317 struct altera_uart *pp = container_of(port, struct altera_uart, port);
318 unsigned long flags;
319
320 if (!port->irq) {
321 timer_setup(&pp->tmr, altera_uart_timer, 0);
322 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
323 } else {
324 int ret;
325
326 ret = request_irq(port->irq, altera_uart_interrupt, 0,
327 DRV_NAME, port);
328 if (ret) {
329 pr_err(DRV_NAME ": unable to attach Altera UART %d "
330 "interrupt vector=%d\n", port->line, port->irq);
331 return ret;
332 }
333 }
334
335 spin_lock_irqsave(&port->lock, flags);
336
337 /* Enable RX interrupts now */
338 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
339 altera_uart_update_ctrl_reg(pp);
340
341 spin_unlock_irqrestore(&port->lock, flags);
342
343 return 0;
344 }
345
altera_uart_shutdown(struct uart_port * port)346 static void altera_uart_shutdown(struct uart_port *port)
347 {
348 struct altera_uart *pp = container_of(port, struct altera_uart, port);
349 unsigned long flags;
350
351 spin_lock_irqsave(&port->lock, flags);
352
353 /* Disable all interrupts now */
354 pp->imr = 0;
355 altera_uart_update_ctrl_reg(pp);
356
357 spin_unlock_irqrestore(&port->lock, flags);
358
359 if (port->irq)
360 free_irq(port->irq, port);
361 else
362 del_timer_sync(&pp->tmr);
363 }
364
altera_uart_type(struct uart_port * port)365 static const char *altera_uart_type(struct uart_port *port)
366 {
367 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
368 }
369
altera_uart_request_port(struct uart_port * port)370 static int altera_uart_request_port(struct uart_port *port)
371 {
372 /* UARTs always present */
373 return 0;
374 }
375
altera_uart_release_port(struct uart_port * port)376 static void altera_uart_release_port(struct uart_port *port)
377 {
378 /* Nothing to release... */
379 }
380
altera_uart_verify_port(struct uart_port * port,struct serial_struct * ser)381 static int altera_uart_verify_port(struct uart_port *port,
382 struct serial_struct *ser)
383 {
384 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
385 return -EINVAL;
386 return 0;
387 }
388
389 #ifdef CONFIG_CONSOLE_POLL
altera_uart_poll_get_char(struct uart_port * port)390 static int altera_uart_poll_get_char(struct uart_port *port)
391 {
392 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
393 ALTERA_UART_STATUS_RRDY_MSK))
394 cpu_relax();
395
396 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
397 }
398
altera_uart_poll_put_char(struct uart_port * port,unsigned char c)399 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
400 {
401 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
402 ALTERA_UART_STATUS_TRDY_MSK))
403 cpu_relax();
404
405 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
406 }
407 #endif
408
409 /*
410 * Define the basic serial functions we support.
411 */
412 static const struct uart_ops altera_uart_ops = {
413 .tx_empty = altera_uart_tx_empty,
414 .get_mctrl = altera_uart_get_mctrl,
415 .set_mctrl = altera_uart_set_mctrl,
416 .start_tx = altera_uart_start_tx,
417 .stop_tx = altera_uart_stop_tx,
418 .stop_rx = altera_uart_stop_rx,
419 .break_ctl = altera_uart_break_ctl,
420 .startup = altera_uart_startup,
421 .shutdown = altera_uart_shutdown,
422 .set_termios = altera_uart_set_termios,
423 .type = altera_uart_type,
424 .request_port = altera_uart_request_port,
425 .release_port = altera_uart_release_port,
426 .config_port = altera_uart_config_port,
427 .verify_port = altera_uart_verify_port,
428 #ifdef CONFIG_CONSOLE_POLL
429 .poll_get_char = altera_uart_poll_get_char,
430 .poll_put_char = altera_uart_poll_put_char,
431 #endif
432 };
433
434 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
435
436 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
437
altera_uart_console_putc(struct uart_port * port,unsigned char c)438 static void altera_uart_console_putc(struct uart_port *port, unsigned char c)
439 {
440 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
441 ALTERA_UART_STATUS_TRDY_MSK))
442 cpu_relax();
443
444 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
445 }
446
altera_uart_console_write(struct console * co,const char * s,unsigned int count)447 static void altera_uart_console_write(struct console *co, const char *s,
448 unsigned int count)
449 {
450 struct uart_port *port = &(altera_uart_ports + co->index)->port;
451
452 uart_console_write(port, s, count, altera_uart_console_putc);
453 }
454
altera_uart_console_setup(struct console * co,char * options)455 static int __init altera_uart_console_setup(struct console *co, char *options)
456 {
457 struct uart_port *port;
458 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
459 int bits = 8;
460 int parity = 'n';
461 int flow = 'n';
462
463 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
464 return -EINVAL;
465 port = &altera_uart_ports[co->index].port;
466 if (!port->membase)
467 return -ENODEV;
468
469 if (options)
470 uart_parse_options(options, &baud, &parity, &bits, &flow);
471
472 return uart_set_options(port, co, baud, parity, bits, flow);
473 }
474
475 static struct uart_driver altera_uart_driver;
476
477 static struct console altera_uart_console = {
478 .name = "ttyAL",
479 .write = altera_uart_console_write,
480 .device = uart_console_device,
481 .setup = altera_uart_console_setup,
482 .flags = CON_PRINTBUFFER,
483 .index = -1,
484 .data = &altera_uart_driver,
485 };
486
altera_uart_console_init(void)487 static int __init altera_uart_console_init(void)
488 {
489 register_console(&altera_uart_console);
490 return 0;
491 }
492
493 console_initcall(altera_uart_console_init);
494
495 #define ALTERA_UART_CONSOLE (&altera_uart_console)
496
altera_uart_earlycon_write(struct console * co,const char * s,unsigned int count)497 static void altera_uart_earlycon_write(struct console *co, const char *s,
498 unsigned int count)
499 {
500 struct earlycon_device *dev = co->data;
501
502 uart_console_write(&dev->port, s, count, altera_uart_console_putc);
503 }
504
altera_uart_earlycon_setup(struct earlycon_device * dev,const char * options)505 static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
506 const char *options)
507 {
508 struct uart_port *port = &dev->port;
509
510 if (!port->membase)
511 return -ENODEV;
512
513 /* Enable RX interrupts now */
514 altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
515 ALTERA_UART_CONTROL_REG);
516
517 if (dev->baud) {
518 unsigned int baudclk = port->uartclk / dev->baud;
519
520 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
521 }
522
523 dev->con->write = altera_uart_earlycon_write;
524 return 0;
525 }
526
527 OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
528
529 #else
530
531 #define ALTERA_UART_CONSOLE NULL
532
533 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
534
535 /*
536 * Define the altera_uart UART driver structure.
537 */
538 static struct uart_driver altera_uart_driver = {
539 .owner = THIS_MODULE,
540 .driver_name = DRV_NAME,
541 .dev_name = "ttyAL",
542 .major = SERIAL_ALTERA_MAJOR,
543 .minor = SERIAL_ALTERA_MINOR,
544 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
545 .cons = ALTERA_UART_CONSOLE,
546 };
547
altera_uart_probe(struct platform_device * pdev)548 static int altera_uart_probe(struct platform_device *pdev)
549 {
550 struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
551 struct uart_port *port;
552 struct resource *res_mem;
553 int i = pdev->id;
554 int ret;
555
556 /* if id is -1 scan for a free id and use that one */
557 if (i == -1) {
558 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
559 if (altera_uart_ports[i].port.mapbase == 0)
560 break;
561 }
562
563 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
564 return -EINVAL;
565
566 port = &altera_uart_ports[i].port;
567
568 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
569 if (res_mem)
570 port->mapbase = res_mem->start;
571 else if (platp)
572 port->mapbase = platp->mapbase;
573 else
574 return -EINVAL;
575
576 ret = platform_get_irq_optional(pdev, 0);
577 if (ret < 0 && ret != -ENXIO)
578 return ret;
579 if (ret > 0)
580 port->irq = ret;
581 else if (platp)
582 port->irq = platp->irq;
583
584 /* Check platform data first so we can override device node data */
585 if (platp)
586 port->uartclk = platp->uartclk;
587 else {
588 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
589 &port->uartclk);
590 if (ret)
591 return ret;
592 }
593
594 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
595 if (!port->membase)
596 return -ENOMEM;
597
598 if (platp)
599 port->regshift = platp->bus_shift;
600 else
601 port->regshift = 0;
602
603 port->line = i;
604 port->type = PORT_ALTERA_UART;
605 port->iotype = SERIAL_IO_MEM;
606 port->ops = &altera_uart_ops;
607 port->flags = UPF_BOOT_AUTOCONF;
608 port->dev = &pdev->dev;
609
610 platform_set_drvdata(pdev, port);
611
612 uart_add_one_port(&altera_uart_driver, port);
613
614 return 0;
615 }
616
altera_uart_remove(struct platform_device * pdev)617 static int altera_uart_remove(struct platform_device *pdev)
618 {
619 struct uart_port *port = platform_get_drvdata(pdev);
620
621 if (port) {
622 uart_remove_one_port(&altera_uart_driver, port);
623 port->mapbase = 0;
624 iounmap(port->membase);
625 }
626
627 return 0;
628 }
629
630 #ifdef CONFIG_OF
631 static const struct of_device_id altera_uart_match[] = {
632 { .compatible = "ALTR,uart-1.0", },
633 { .compatible = "altr,uart-1.0", },
634 {},
635 };
636 MODULE_DEVICE_TABLE(of, altera_uart_match);
637 #endif /* CONFIG_OF */
638
639 static struct platform_driver altera_uart_platform_driver = {
640 .probe = altera_uart_probe,
641 .remove = altera_uart_remove,
642 .driver = {
643 .name = DRV_NAME,
644 .of_match_table = of_match_ptr(altera_uart_match),
645 },
646 };
647
altera_uart_init(void)648 static int __init altera_uart_init(void)
649 {
650 int rc;
651
652 rc = uart_register_driver(&altera_uart_driver);
653 if (rc)
654 return rc;
655 rc = platform_driver_register(&altera_uart_platform_driver);
656 if (rc)
657 uart_unregister_driver(&altera_uart_driver);
658 return rc;
659 }
660
altera_uart_exit(void)661 static void __exit altera_uart_exit(void)
662 {
663 platform_driver_unregister(&altera_uart_platform_driver);
664 uart_unregister_driver(&altera_uart_driver);
665 }
666
667 module_init(altera_uart_init);
668 module_exit(altera_uart_exit);
669
670 MODULE_DESCRIPTION("Altera UART driver");
671 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
672 MODULE_LICENSE("GPL");
673 MODULE_ALIAS("platform:" DRV_NAME);
674 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
675