1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * FB driver for the SSD1289 LCD Controller
4  *
5  * Copyright (C) 2013 Noralf Tronnes
6  *
7  * Init sequence taken from ITDB02_Graph16.cpp - (C)2010-2011 Henning Karlsen
8  */
9 
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 
14 #include "fbtft.h"
15 
16 #define DRVNAME		"fb_ssd1289"
17 #define WIDTH		240
18 #define HEIGHT		320
19 #define DEFAULT_GAMMA	"02 03 2 5 7 7 4 2 4 2\n" \
20 			"02 03 2 5 7 5 4 2 4 2"
21 
22 static unsigned int reg11 = 0x6040;
23 module_param(reg11, uint, 0000);
24 MODULE_PARM_DESC(reg11, "Register 11h value");
25 
init_display(struct fbtft_par * par)26 static int init_display(struct fbtft_par *par)
27 {
28 	par->fbtftops.reset(par);
29 
30 	write_reg(par, 0x00, 0x0001);
31 	write_reg(par, 0x03, 0xA8A4);
32 	write_reg(par, 0x0C, 0x0000);
33 	write_reg(par, 0x0D, 0x080C);
34 	write_reg(par, 0x0E, 0x2B00);
35 	write_reg(par, 0x1E, 0x00B7);
36 	write_reg(par, 0x01,
37 		  BIT(13) | (par->bgr << 11) | BIT(9) | (HEIGHT - 1));
38 	write_reg(par, 0x02, 0x0600);
39 	write_reg(par, 0x10, 0x0000);
40 	write_reg(par, 0x05, 0x0000);
41 	write_reg(par, 0x06, 0x0000);
42 	write_reg(par, 0x16, 0xEF1C);
43 	write_reg(par, 0x17, 0x0003);
44 	write_reg(par, 0x07, 0x0233);
45 	write_reg(par, 0x0B, 0x0000);
46 	write_reg(par, 0x0F, 0x0000);
47 	write_reg(par, 0x41, 0x0000);
48 	write_reg(par, 0x42, 0x0000);
49 	write_reg(par, 0x48, 0x0000);
50 	write_reg(par, 0x49, 0x013F);
51 	write_reg(par, 0x4A, 0x0000);
52 	write_reg(par, 0x4B, 0x0000);
53 	write_reg(par, 0x44, 0xEF00);
54 	write_reg(par, 0x45, 0x0000);
55 	write_reg(par, 0x46, 0x013F);
56 	write_reg(par, 0x23, 0x0000);
57 	write_reg(par, 0x24, 0x0000);
58 	write_reg(par, 0x25, 0x8000);
59 	write_reg(par, 0x4f, 0x0000);
60 	write_reg(par, 0x4e, 0x0000);
61 	write_reg(par, 0x22);
62 	return 0;
63 }
64 
set_addr_win(struct fbtft_par * par,int xs,int ys,int xe,int ye)65 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
66 {
67 	switch (par->info->var.rotate) {
68 	/* R4Eh - Set GDDRAM X address counter */
69 	/* R4Fh - Set GDDRAM Y address counter */
70 	case 0:
71 		write_reg(par, 0x4e, xs);
72 		write_reg(par, 0x4f, ys);
73 		break;
74 	case 180:
75 		write_reg(par, 0x4e, par->info->var.xres - 1 - xs);
76 		write_reg(par, 0x4f, par->info->var.yres - 1 - ys);
77 		break;
78 	case 270:
79 		write_reg(par, 0x4e, par->info->var.yres - 1 - ys);
80 		write_reg(par, 0x4f, xs);
81 		break;
82 	case 90:
83 		write_reg(par, 0x4e, ys);
84 		write_reg(par, 0x4f, par->info->var.xres - 1 - xs);
85 		break;
86 	}
87 
88 	/* R22h - RAM data write */
89 	write_reg(par, 0x22);
90 }
91 
set_var(struct fbtft_par * par)92 static int set_var(struct fbtft_par *par)
93 {
94 	if (par->fbtftops.init_display != init_display) {
95 		/* don't risk messing up register 11h */
96 		fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
97 			      "%s: skipping since custom init_display() is used\n",
98 			      __func__);
99 		return 0;
100 	}
101 
102 	switch (par->info->var.rotate) {
103 	case 0:
104 		write_reg(par, 0x11, reg11 | 0x30);
105 		break;
106 	case 270:
107 		write_reg(par, 0x11, reg11 | 0x28);
108 		break;
109 	case 180:
110 		write_reg(par, 0x11, reg11 | 0x00);
111 		break;
112 	case 90:
113 		write_reg(par, 0x11, reg11 | 0x18);
114 		break;
115 	}
116 
117 	return 0;
118 }
119 
120 /*
121  * Gamma string format:
122  * VRP0 VRP1 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 PKP5
123  * VRN0 VRN1 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 PKN5
124  */
125 #define CURVE(num, idx)  curves[(num) * par->gamma.num_values + (idx)]
set_gamma(struct fbtft_par * par,u32 * curves)126 static int set_gamma(struct fbtft_par *par, u32 *curves)
127 {
128 	static const unsigned long mask[] = {
129 		0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
130 		0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
131 	};
132 	int i, j;
133 
134 	/* apply mask */
135 	for (i = 0; i < 2; i++)
136 		for (j = 0; j < 10; j++)
137 			CURVE(i, j) &= mask[i * par->gamma.num_values + j];
138 
139 	write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4));
140 	write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6));
141 	write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8));
142 	write_reg(par, 0x0033, CURVE(0, 3) << 8 | CURVE(0, 2));
143 	write_reg(par, 0x0034, CURVE(1, 5) << 8 | CURVE(1, 4));
144 	write_reg(par, 0x0035, CURVE(1, 7) << 8 | CURVE(1, 6));
145 	write_reg(par, 0x0036, CURVE(1, 9) << 8 | CURVE(1, 8));
146 	write_reg(par, 0x0037, CURVE(1, 3) << 8 | CURVE(1, 2));
147 	write_reg(par, 0x003A, CURVE(0, 1) << 8 | CURVE(0, 0));
148 	write_reg(par, 0x003B, CURVE(1, 1) << 8 | CURVE(1, 0));
149 
150 	return 0;
151 }
152 
153 #undef CURVE
154 
155 static struct fbtft_display display = {
156 	.regwidth = 16,
157 	.width = WIDTH,
158 	.height = HEIGHT,
159 	.gamma_num = 2,
160 	.gamma_len = 10,
161 	.gamma = DEFAULT_GAMMA,
162 	.fbtftops = {
163 		.init_display = init_display,
164 		.set_addr_win = set_addr_win,
165 		.set_var = set_var,
166 		.set_gamma = set_gamma,
167 	},
168 };
169 
170 FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1289", &display);
171 
172 MODULE_ALIAS("spi:" DRVNAME);
173 MODULE_ALIAS("platform:" DRVNAME);
174 MODULE_ALIAS("spi:ssd1289");
175 MODULE_ALIAS("platform:ssd1289");
176 
177 MODULE_DESCRIPTION("FB driver for the SSD1289 LCD Controller");
178 MODULE_AUTHOR("Noralf Tronnes");
179 MODULE_LICENSE("GPL");
180