1 /*
2 * Allwinner SoCs SRAM Controller Driver
3 *
4 * Copyright (C) 2015 Maxime Ripard
5 *
6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13 #include <linux/debugfs.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/regmap.h>
21
22 #include <linux/soc/sunxi/sunxi_sram.h>
23
24 struct sunxi_sram_func {
25 char *func;
26 u8 val;
27 u32 reg_val;
28 };
29
30 struct sunxi_sram_data {
31 char *name;
32 u8 reg;
33 u8 offset;
34 u8 width;
35 struct sunxi_sram_func *func;
36 struct list_head list;
37 };
38
39 struct sunxi_sram_desc {
40 struct sunxi_sram_data data;
41 bool claimed;
42 };
43
44 #define SUNXI_SRAM_MAP(_reg_val, _val, _func) \
45 { \
46 .func = _func, \
47 .val = _val, \
48 .reg_val = _reg_val, \
49 }
50
51 #define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...) \
52 { \
53 .name = _name, \
54 .reg = _reg, \
55 .offset = _off, \
56 .width = _width, \
57 .func = (struct sunxi_sram_func[]){ \
58 __VA_ARGS__, { } }, \
59 }
60
61 static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
62 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
63 SUNXI_SRAM_MAP(0, 0, "cpu"),
64 SUNXI_SRAM_MAP(1, 1, "emac")),
65 };
66
67 static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
68 .data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
69 SUNXI_SRAM_MAP(0, 0, "cpu"),
70 SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
71 };
72
73 static struct sunxi_sram_desc sun4i_a10_sram_d = {
74 .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
75 SUNXI_SRAM_MAP(0, 0, "cpu"),
76 SUNXI_SRAM_MAP(1, 1, "usb-otg")),
77 };
78
79 static struct sunxi_sram_desc sun50i_a64_sram_c = {
80 .data = SUNXI_SRAM_DATA("C", 0x4, 24, 1,
81 SUNXI_SRAM_MAP(1, 0, "cpu"),
82 SUNXI_SRAM_MAP(0, 1, "de2")),
83 };
84
85 static const struct of_device_id sunxi_sram_dt_ids[] = {
86 {
87 .compatible = "allwinner,sun4i-a10-sram-a3-a4",
88 .data = &sun4i_a10_sram_a3_a4.data,
89 },
90 {
91 .compatible = "allwinner,sun4i-a10-sram-c1",
92 .data = &sun4i_a10_sram_c1.data,
93 },
94 {
95 .compatible = "allwinner,sun4i-a10-sram-d",
96 .data = &sun4i_a10_sram_d.data,
97 },
98 {
99 .compatible = "allwinner,sun50i-a64-sram-c",
100 .data = &sun50i_a64_sram_c.data,
101 },
102 {}
103 };
104
105 static struct device *sram_dev;
106 static LIST_HEAD(claimed_sram);
107 static DEFINE_SPINLOCK(sram_lock);
108 static void __iomem *base;
109
sunxi_sram_show(struct seq_file * s,void * data)110 static int sunxi_sram_show(struct seq_file *s, void *data)
111 {
112 struct device_node *sram_node, *section_node;
113 const struct sunxi_sram_data *sram_data;
114 const struct of_device_id *match;
115 struct sunxi_sram_func *func;
116 const __be32 *sram_addr_p, *section_addr_p;
117 u32 val;
118
119 seq_puts(s, "Allwinner sunXi SRAM\n");
120 seq_puts(s, "--------------------\n\n");
121
122 for_each_child_of_node(sram_dev->of_node, sram_node) {
123 sram_addr_p = of_get_address(sram_node, 0, NULL, NULL);
124
125 seq_printf(s, "sram@%08x\n",
126 be32_to_cpu(*sram_addr_p));
127
128 for_each_child_of_node(sram_node, section_node) {
129 match = of_match_node(sunxi_sram_dt_ids, section_node);
130 if (!match)
131 continue;
132 sram_data = match->data;
133
134 section_addr_p = of_get_address(section_node, 0,
135 NULL, NULL);
136
137 seq_printf(s, "\tsection@%04x\t(%s)\n",
138 be32_to_cpu(*section_addr_p),
139 sram_data->name);
140
141 val = readl(base + sram_data->reg);
142 val >>= sram_data->offset;
143 val &= GENMASK(sram_data->width - 1, 0);
144
145 for (func = sram_data->func; func->func; func++) {
146 seq_printf(s, "\t\t%s%c\n", func->func,
147 func->reg_val == val ?
148 '*' : ' ');
149 }
150 }
151
152 seq_puts(s, "\n");
153 }
154
155 return 0;
156 }
157
158 DEFINE_SHOW_ATTRIBUTE(sunxi_sram);
159
to_sram_desc(const struct sunxi_sram_data * data)160 static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data)
161 {
162 return container_of(data, struct sunxi_sram_desc, data);
163 }
164
sunxi_sram_of_parse(struct device_node * node,unsigned int * reg_value)165 static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node,
166 unsigned int *reg_value)
167 {
168 const struct of_device_id *match;
169 const struct sunxi_sram_data *data;
170 struct sunxi_sram_func *func;
171 struct of_phandle_args args;
172 u8 val;
173 int ret;
174
175 ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0,
176 &args);
177 if (ret)
178 return ERR_PTR(ret);
179
180 if (!of_device_is_available(args.np)) {
181 ret = -EBUSY;
182 goto err;
183 }
184
185 val = args.args[0];
186
187 match = of_match_node(sunxi_sram_dt_ids, args.np);
188 if (!match) {
189 ret = -EINVAL;
190 goto err;
191 }
192
193 data = match->data;
194 if (!data) {
195 ret = -EINVAL;
196 goto err;
197 }
198
199 for (func = data->func; func->func; func++) {
200 if (val == func->val) {
201 if (reg_value)
202 *reg_value = func->reg_val;
203
204 break;
205 }
206 }
207
208 if (!func->func) {
209 ret = -EINVAL;
210 goto err;
211 }
212
213 of_node_put(args.np);
214 return match->data;
215
216 err:
217 of_node_put(args.np);
218 return ERR_PTR(ret);
219 }
220
sunxi_sram_claim(struct device * dev)221 int sunxi_sram_claim(struct device *dev)
222 {
223 const struct sunxi_sram_data *sram_data;
224 struct sunxi_sram_desc *sram_desc;
225 unsigned int device;
226 u32 val, mask;
227
228 if (IS_ERR(base))
229 return PTR_ERR(base);
230
231 if (!base)
232 return -EPROBE_DEFER;
233
234 if (!dev || !dev->of_node)
235 return -EINVAL;
236
237 sram_data = sunxi_sram_of_parse(dev->of_node, &device);
238 if (IS_ERR(sram_data))
239 return PTR_ERR(sram_data);
240
241 sram_desc = to_sram_desc(sram_data);
242
243 spin_lock(&sram_lock);
244
245 if (sram_desc->claimed) {
246 spin_unlock(&sram_lock);
247 return -EBUSY;
248 }
249
250 mask = GENMASK(sram_data->offset + sram_data->width - 1,
251 sram_data->offset);
252 val = readl(base + sram_data->reg);
253 val &= ~mask;
254 writel(val | ((device << sram_data->offset) & mask),
255 base + sram_data->reg);
256
257 sram_desc->claimed = true;
258 spin_unlock(&sram_lock);
259
260 return 0;
261 }
262 EXPORT_SYMBOL(sunxi_sram_claim);
263
sunxi_sram_release(struct device * dev)264 void sunxi_sram_release(struct device *dev)
265 {
266 const struct sunxi_sram_data *sram_data;
267 struct sunxi_sram_desc *sram_desc;
268
269 if (!dev || !dev->of_node)
270 return;
271
272 sram_data = sunxi_sram_of_parse(dev->of_node, NULL);
273 if (IS_ERR(sram_data))
274 return;
275
276 sram_desc = to_sram_desc(sram_data);
277
278 spin_lock(&sram_lock);
279 sram_desc->claimed = false;
280 spin_unlock(&sram_lock);
281 }
282 EXPORT_SYMBOL(sunxi_sram_release);
283
284 struct sunxi_sramc_variant {
285 int num_emac_clocks;
286 bool has_ldo_ctrl;
287 };
288
289 static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = {
290 /* Nothing special */
291 };
292
293 static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = {
294 .num_emac_clocks = 1,
295 };
296
297 static const struct sunxi_sramc_variant sun20i_d1_sramc_variant = {
298 .num_emac_clocks = 1,
299 .has_ldo_ctrl = true,
300 };
301
302 static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = {
303 .num_emac_clocks = 1,
304 };
305
306 static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = {
307 .num_emac_clocks = 2,
308 };
309
310 #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30
311 #define SUNXI_SYS_LDO_CTRL_REG 0x150
312
sunxi_sram_regmap_accessible_reg(struct device * dev,unsigned int reg)313 static bool sunxi_sram_regmap_accessible_reg(struct device *dev,
314 unsigned int reg)
315 {
316 const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev);
317
318 if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG &&
319 reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4)
320 return true;
321 if (reg == SUNXI_SYS_LDO_CTRL_REG && variant->has_ldo_ctrl)
322 return true;
323
324 return false;
325 }
326
327 static struct regmap_config sunxi_sram_regmap_config = {
328 .reg_bits = 32,
329 .val_bits = 32,
330 .reg_stride = 4,
331 /* last defined register */
332 .max_register = SUNXI_SYS_LDO_CTRL_REG,
333 /* other devices have no business accessing other registers */
334 .readable_reg = sunxi_sram_regmap_accessible_reg,
335 .writeable_reg = sunxi_sram_regmap_accessible_reg,
336 };
337
sunxi_sram_probe(struct platform_device * pdev)338 static int __init sunxi_sram_probe(struct platform_device *pdev)
339 {
340 const struct sunxi_sramc_variant *variant;
341 struct device *dev = &pdev->dev;
342 struct regmap *regmap;
343
344 sram_dev = &pdev->dev;
345
346 variant = of_device_get_match_data(&pdev->dev);
347 if (!variant)
348 return -EINVAL;
349
350 dev_set_drvdata(dev, (struct sunxi_sramc_variant *)variant);
351
352 base = devm_platform_ioremap_resource(pdev, 0);
353 if (IS_ERR(base))
354 return PTR_ERR(base);
355
356 if (variant->num_emac_clocks || variant->has_ldo_ctrl) {
357 regmap = devm_regmap_init_mmio(dev, base, &sunxi_sram_regmap_config);
358 if (IS_ERR(regmap))
359 return PTR_ERR(regmap);
360 }
361
362 of_platform_populate(dev->of_node, NULL, NULL, dev);
363
364 debugfs_create_file("sram", 0444, NULL, NULL, &sunxi_sram_fops);
365
366 return 0;
367 }
368
369 static const struct of_device_id sunxi_sram_dt_match[] = {
370 {
371 .compatible = "allwinner,sun4i-a10-sram-controller",
372 .data = &sun4i_a10_sramc_variant,
373 },
374 {
375 .compatible = "allwinner,sun4i-a10-system-control",
376 .data = &sun4i_a10_sramc_variant,
377 },
378 {
379 .compatible = "allwinner,sun5i-a13-system-control",
380 .data = &sun4i_a10_sramc_variant,
381 },
382 {
383 .compatible = "allwinner,sun8i-a23-system-control",
384 .data = &sun4i_a10_sramc_variant,
385 },
386 {
387 .compatible = "allwinner,sun8i-h3-system-control",
388 .data = &sun8i_h3_sramc_variant,
389 },
390 {
391 .compatible = "allwinner,sun20i-d1-system-control",
392 .data = &sun20i_d1_sramc_variant,
393 },
394 {
395 .compatible = "allwinner,sun50i-a64-sram-controller",
396 .data = &sun50i_a64_sramc_variant,
397 },
398 {
399 .compatible = "allwinner,sun50i-a64-system-control",
400 .data = &sun50i_a64_sramc_variant,
401 },
402 {
403 .compatible = "allwinner,sun50i-h5-system-control",
404 .data = &sun50i_a64_sramc_variant,
405 },
406 {
407 .compatible = "allwinner,sun50i-h616-system-control",
408 .data = &sun50i_h616_sramc_variant,
409 },
410 { },
411 };
412 MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
413
414 static struct platform_driver sunxi_sram_driver = {
415 .driver = {
416 .name = "sunxi-sram",
417 .of_match_table = sunxi_sram_dt_match,
418 },
419 };
420 builtin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe);
421
422 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
423 MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
424 MODULE_LICENSE("GPL");
425