1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * This file is part of wl1271
4  *
5  * Copyright (C) 2010 Nokia Corporation
6  *
7  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8  */
9 
10 #ifndef __INI_H__
11 #define __INI_H__
12 
13 #define GENERAL_SETTINGS_DRPW_LPD 0xc0
14 #define SCRATCH_ENABLE_LPD        BIT(25)
15 
16 #define WL1271_INI_MAX_SMART_REFLEX_PARAM 16
17 
18 struct wl1271_ini_general_params {
19 	u8 ref_clock;
20 	u8 settling_time;
21 	u8 clk_valid_on_wakeup;
22 	u8 dc2dc_mode;
23 	u8 dual_mode_select;
24 	u8 tx_bip_fem_auto_detect;
25 	u8 tx_bip_fem_manufacturer;
26 	u8 general_settings;
27 	u8 sr_state;
28 	u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
29 	u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
30 	u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
31 } __packed;
32 
33 #define WL128X_INI_MAX_SETTINGS_PARAM 4
34 
35 struct wl128x_ini_general_params {
36 	u8 ref_clock;
37 	u8 settling_time;
38 	u8 clk_valid_on_wakeup;
39 	u8 tcxo_ref_clock;
40 	u8 tcxo_settling_time;
41 	u8 tcxo_valid_on_wakeup;
42 	u8 tcxo_ldo_voltage;
43 	u8 xtal_itrim_val;
44 	u8 platform_conf;
45 	u8 dual_mode_select;
46 	u8 tx_bip_fem_auto_detect;
47 	u8 tx_bip_fem_manufacturer;
48 	u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
49 	u8 sr_state;
50 	u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
51 	u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
52 	u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
53 } __packed;
54 
55 #define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15
56 
57 struct wl1271_ini_band_params_2 {
58 	u8 rx_trace_insertion_loss;
59 	u8 tx_trace_loss;
60 	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
61 } __packed;
62 
63 #define WL1271_INI_CHANNEL_COUNT_2 14
64 
65 struct wl128x_ini_band_params_2 {
66 	u8 rx_trace_insertion_loss;
67 	u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
68 	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
69 } __packed;
70 
71 #define WL1271_INI_RATE_GROUP_COUNT 6
72 
73 struct wl1271_ini_fem_params_2 {
74 	__le16 tx_bip_ref_pd_voltage;
75 	u8 tx_bip_ref_power;
76 	u8 tx_bip_ref_offset;
77 	u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
78 	u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
79 	u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
80 	u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
81 	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
82 	u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
83 	u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
84 	u8 rx_fem_insertion_loss;
85 	u8 degraded_low_to_normal_thr;
86 	u8 normal_to_degraded_high_thr;
87 } __packed;
88 
89 #define WL128X_INI_RATE_GROUP_COUNT 7
90 /* low and high temperatures */
91 #define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2
92 
93 struct wl128x_ini_fem_params_2 {
94 	__le16 tx_bip_ref_pd_voltage;
95 	u8 tx_bip_ref_power;
96 	u8 tx_bip_ref_offset;
97 	u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
98 	u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
99 	u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
100 	u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
101 	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
102 	u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
103 	u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
104 	u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
105 	u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
106 	u8 rx_fem_insertion_loss;
107 	u8 degraded_low_to_normal_thr;
108 	u8 normal_to_degraded_high_thr;
109 } __packed;
110 
111 #define WL1271_INI_CHANNEL_COUNT_5 35
112 #define WL1271_INI_SUB_BAND_COUNT_5 7
113 
114 struct wl1271_ini_band_params_5 {
115 	u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
116 	u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
117 	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
118 } __packed;
119 
120 struct wl128x_ini_band_params_5 {
121 	u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
122 	u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
123 	u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
124 } __packed;
125 
126 struct wl1271_ini_fem_params_5 {
127 	__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
128 	u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
129 	u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
130 	u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
131 	u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
132 	u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
133 	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
134 	u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
135 	u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
136 	u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
137 	u8 degraded_low_to_normal_thr;
138 	u8 normal_to_degraded_high_thr;
139 } __packed;
140 
141 struct wl128x_ini_fem_params_5 {
142 	__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
143 	u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
144 	u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
145 	u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
146 	u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
147 	u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
148 	u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
149 	u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
150 	u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
151 	u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
152 	u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
153 		WL128X_INI_PD_VS_TEMPERATURE_RANGES];
154 	u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
155 	u8 degraded_low_to_normal_thr;
156 	u8 normal_to_degraded_high_thr;
157 } __packed;
158 
159 /* NVS data structure */
160 #define WL1271_INI_NVS_SECTION_SIZE		     468
161 
162 /* We have four FEM module types: 0-RFMD, 1-TQS, 2-SKW, 3-TQS_HP */
163 #define WL1271_INI_FEM_MODULE_COUNT                  4
164 
165 /*
166  * In NVS we only store two FEM module entries -
167  *	  FEM modules 0,2,3 are stored in entry 0
168  *	  FEM module 1 is stored in entry 1
169  */
170 #define WL12XX_NVS_FEM_MODULE_COUNT                  2
171 
172 #define WL12XX_FEM_TO_NVS_ENTRY(ini_fem_module)      \
173 	((ini_fem_module) == 1 ? 1 : 0)
174 
175 #define WL1271_INI_LEGACY_NVS_FILE_SIZE              800
176 
177 struct wl1271_nvs_file {
178 	/* NVS section - must be first! */
179 	u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
180 
181 	/* INI section */
182 	struct wl1271_ini_general_params general_params;
183 	u8 padding1;
184 	struct wl1271_ini_band_params_2 stat_radio_params_2;
185 	u8 padding2;
186 	struct {
187 		struct wl1271_ini_fem_params_2 params;
188 		u8 padding;
189 	} dyn_radio_params_2[WL12XX_NVS_FEM_MODULE_COUNT];
190 	struct wl1271_ini_band_params_5 stat_radio_params_5;
191 	u8 padding3;
192 	struct {
193 		struct wl1271_ini_fem_params_5 params;
194 		u8 padding;
195 	} dyn_radio_params_5[WL12XX_NVS_FEM_MODULE_COUNT];
196 } __packed;
197 
198 struct wl128x_nvs_file {
199 	/* NVS section - must be first! */
200 	u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
201 
202 	/* INI section */
203 	struct wl128x_ini_general_params general_params;
204 	u8 fem_vendor_and_options;
205 	struct wl128x_ini_band_params_2 stat_radio_params_2;
206 	u8 padding2;
207 	struct {
208 		struct wl128x_ini_fem_params_2 params;
209 		u8 padding;
210 	} dyn_radio_params_2[WL12XX_NVS_FEM_MODULE_COUNT];
211 	struct wl128x_ini_band_params_5 stat_radio_params_5;
212 	u8 padding3;
213 	struct {
214 		struct wl128x_ini_fem_params_5 params;
215 		u8 padding;
216 	} dyn_radio_params_5[WL12XX_NVS_FEM_MODULE_COUNT];
217 } __packed;
218 #endif
219