1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2022 Linaro Ltd.
5 */
6
7 #include <linux/types.h>
8 #include <linux/atomic.h>
9 #include <linux/bitfield.h>
10 #include <linux/device.h>
11 #include <linux/bug.h>
12 #include <linux/io.h>
13 #include <linux/firmware.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 #include <linux/of_device.h>
17 #include <linux/of_address.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/qcom_scm.h>
20 #include <linux/soc/qcom/mdt_loader.h>
21
22 #include "ipa.h"
23 #include "ipa_power.h"
24 #include "ipa_data.h"
25 #include "ipa_endpoint.h"
26 #include "ipa_resource.h"
27 #include "ipa_cmd.h"
28 #include "ipa_reg.h"
29 #include "ipa_mem.h"
30 #include "ipa_table.h"
31 #include "ipa_smp2p.h"
32 #include "ipa_modem.h"
33 #include "ipa_uc.h"
34 #include "ipa_interrupt.h"
35 #include "gsi_trans.h"
36 #include "ipa_sysfs.h"
37
38 /**
39 * DOC: The IP Accelerator
40 *
41 * This driver supports the Qualcomm IP Accelerator (IPA), which is a
42 * networking component found in many Qualcomm SoCs. The IPA is connected
43 * to the application processor (AP), but is also connected (and partially
44 * controlled by) other "execution environments" (EEs), such as a modem.
45 *
46 * The IPA is the conduit between the AP and the modem that carries network
47 * traffic. This driver presents a network interface representing the
48 * connection of the modem to external (e.g. LTE) networks.
49 *
50 * The IPA provides protocol checksum calculation, offloading this work
51 * from the AP. The IPA offers additional functionality, including routing,
52 * filtering, and NAT support, but that more advanced functionality is not
53 * currently supported. Despite that, some resources--including routing
54 * tables and filter tables--are defined in this driver because they must
55 * be initialized even when the advanced hardware features are not used.
56 *
57 * There are two distinct layers that implement the IPA hardware, and this
58 * is reflected in the organization of the driver. The generic software
59 * interface (GSI) is an integral component of the IPA, providing a
60 * well-defined communication layer between the AP subsystem and the IPA
61 * core. The GSI implements a set of "channels" used for communication
62 * between the AP and the IPA.
63 *
64 * The IPA layer uses GSI channels to implement its "endpoints". And while
65 * a GSI channel carries data between the AP and the IPA, a pair of IPA
66 * endpoints is used to carry traffic between two EEs. Specifically, the main
67 * modem network interface is implemented by two pairs of endpoints: a TX
68 * endpoint on the AP coupled with an RX endpoint on the modem; and another
69 * RX endpoint on the AP receiving data from a TX endpoint on the modem.
70 */
71
72 /* The name of the GSI firmware file relative to /lib/firmware */
73 #define IPA_FW_PATH_DEFAULT "ipa_fws.mdt"
74 #define IPA_PAS_ID 15
75
76 /* Shift of 19.2 MHz timestamp to achieve lower resolution timestamps */
77 #define DPL_TIMESTAMP_SHIFT 14 /* ~1.172 kHz, ~853 usec per tick */
78 #define TAG_TIMESTAMP_SHIFT 14
79 #define NAT_TIMESTAMP_SHIFT 24 /* ~1.144 Hz, ~874 msec per tick */
80
81 /* Divider for 19.2 MHz crystal oscillator clock to get common timer clock */
82 #define IPA_XO_CLOCK_DIVIDER 192 /* 1 is subtracted where used */
83
84 /**
85 * ipa_setup() - Set up IPA hardware
86 * @ipa: IPA pointer
87 *
88 * Perform initialization that requires issuing immediate commands on
89 * the command TX endpoint. If the modem is doing GSI firmware load
90 * and initialization, this function will be called when an SMP2P
91 * interrupt has been signaled by the modem. Otherwise it will be
92 * called from ipa_probe() after GSI firmware has been successfully
93 * loaded, authenticated, and started by Trust Zone.
94 */
ipa_setup(struct ipa * ipa)95 int ipa_setup(struct ipa *ipa)
96 {
97 struct ipa_endpoint *exception_endpoint;
98 struct ipa_endpoint *command_endpoint;
99 struct device *dev = &ipa->pdev->dev;
100 int ret;
101
102 ret = gsi_setup(&ipa->gsi);
103 if (ret)
104 return ret;
105
106 ret = ipa_power_setup(ipa);
107 if (ret)
108 goto err_gsi_teardown;
109
110 ipa_endpoint_setup(ipa);
111
112 /* We need to use the AP command TX endpoint to perform other
113 * initialization, so we enable first.
114 */
115 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];
116 ret = ipa_endpoint_enable_one(command_endpoint);
117 if (ret)
118 goto err_endpoint_teardown;
119
120 ret = ipa_mem_setup(ipa); /* No matching teardown required */
121 if (ret)
122 goto err_command_disable;
123
124 ret = ipa_table_setup(ipa); /* No matching teardown required */
125 if (ret)
126 goto err_command_disable;
127
128 /* Enable the exception handling endpoint, and tell the hardware
129 * to use it by default.
130 */
131 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];
132 ret = ipa_endpoint_enable_one(exception_endpoint);
133 if (ret)
134 goto err_command_disable;
135
136 ipa_endpoint_default_route_set(ipa, exception_endpoint->endpoint_id);
137
138 /* We're all set. Now prepare for communication with the modem */
139 ret = ipa_qmi_setup(ipa);
140 if (ret)
141 goto err_default_route_clear;
142
143 ipa->setup_complete = true;
144
145 dev_info(dev, "IPA driver setup completed successfully\n");
146
147 return 0;
148
149 err_default_route_clear:
150 ipa_endpoint_default_route_clear(ipa);
151 ipa_endpoint_disable_one(exception_endpoint);
152 err_command_disable:
153 ipa_endpoint_disable_one(command_endpoint);
154 err_endpoint_teardown:
155 ipa_endpoint_teardown(ipa);
156 ipa_power_teardown(ipa);
157 err_gsi_teardown:
158 gsi_teardown(&ipa->gsi);
159
160 return ret;
161 }
162
163 /**
164 * ipa_teardown() - Inverse of ipa_setup()
165 * @ipa: IPA pointer
166 */
ipa_teardown(struct ipa * ipa)167 static void ipa_teardown(struct ipa *ipa)
168 {
169 struct ipa_endpoint *exception_endpoint;
170 struct ipa_endpoint *command_endpoint;
171
172 /* We're going to tear everything down, as if setup never completed */
173 ipa->setup_complete = false;
174
175 ipa_qmi_teardown(ipa);
176 ipa_endpoint_default_route_clear(ipa);
177 exception_endpoint = ipa->name_map[IPA_ENDPOINT_AP_LAN_RX];
178 ipa_endpoint_disable_one(exception_endpoint);
179 command_endpoint = ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX];
180 ipa_endpoint_disable_one(command_endpoint);
181 ipa_endpoint_teardown(ipa);
182 ipa_power_teardown(ipa);
183 gsi_teardown(&ipa->gsi);
184 }
185
186 static void
ipa_hardware_config_bcr(struct ipa * ipa,const struct ipa_data * data)187 ipa_hardware_config_bcr(struct ipa *ipa, const struct ipa_data *data)
188 {
189 const struct ipa_reg *reg;
190 u32 val;
191
192 /* IPA v4.5+ has no backward compatibility register */
193 if (ipa->version >= IPA_VERSION_4_5)
194 return;
195
196 reg = ipa_reg(ipa, IPA_BCR);
197 val = data->backward_compat;
198 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
199 }
200
ipa_hardware_config_tx(struct ipa * ipa)201 static void ipa_hardware_config_tx(struct ipa *ipa)
202 {
203 enum ipa_version version = ipa->version;
204 const struct ipa_reg *reg;
205 u32 offset;
206 u32 val;
207
208 if (version <= IPA_VERSION_4_0 || version >= IPA_VERSION_4_5)
209 return;
210
211 /* Disable PA mask to allow HOLB drop */
212 reg = ipa_reg(ipa, IPA_TX_CFG);
213 offset = ipa_reg_offset(reg);
214
215 val = ioread32(ipa->reg_virt + offset);
216
217 val &= ~ipa_reg_bit(reg, PA_MASK_EN);
218
219 iowrite32(val, ipa->reg_virt + offset);
220 }
221
ipa_hardware_config_clkon(struct ipa * ipa)222 static void ipa_hardware_config_clkon(struct ipa *ipa)
223 {
224 enum ipa_version version = ipa->version;
225 const struct ipa_reg *reg;
226 u32 val;
227
228 if (version >= IPA_VERSION_4_5)
229 return;
230
231 if (version < IPA_VERSION_4_0 && version != IPA_VERSION_3_1)
232 return;
233
234 /* Implement some hardware workarounds */
235 reg = ipa_reg(ipa, CLKON_CFG);
236 if (version == IPA_VERSION_3_1) {
237 /* Disable MISC clock gating */
238 val = ipa_reg_bit(reg, CLKON_MISC);
239 } else { /* IPA v4.0+ */
240 /* Enable open global clocks in the CLKON configuration */
241 val = ipa_reg_bit(reg, CLKON_GLOBAL);
242 val |= ipa_reg_bit(reg, GLOBAL_2X_CLK);
243 }
244
245 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
246 }
247
248 /* Configure bus access behavior for IPA components */
ipa_hardware_config_comp(struct ipa * ipa)249 static void ipa_hardware_config_comp(struct ipa *ipa)
250 {
251 const struct ipa_reg *reg;
252 u32 offset;
253 u32 val;
254
255 /* Nothing to configure prior to IPA v4.0 */
256 if (ipa->version < IPA_VERSION_4_0)
257 return;
258
259 reg = ipa_reg(ipa, COMP_CFG);
260 offset = ipa_reg_offset(reg);
261 val = ioread32(ipa->reg_virt + offset);
262
263 if (ipa->version == IPA_VERSION_4_0) {
264 val &= ~ipa_reg_bit(reg, IPA_QMB_SELECT_CONS_EN);
265 val &= ~ipa_reg_bit(reg, IPA_QMB_SELECT_PROD_EN);
266 val &= ~ipa_reg_bit(reg, IPA_QMB_SELECT_GLOBAL_EN);
267 } else if (ipa->version < IPA_VERSION_4_5) {
268 val |= ipa_reg_bit(reg, GSI_MULTI_AXI_MASTERS_DIS);
269 } else {
270 /* For IPA v4.5 FULL_FLUSH_WAIT_RS_CLOSURE_EN is 0 */
271 }
272
273 val |= ipa_reg_bit(reg, GSI_MULTI_INORDER_RD_DIS);
274 val |= ipa_reg_bit(reg, GSI_MULTI_INORDER_WR_DIS);
275
276 iowrite32(val, ipa->reg_virt + offset);
277 }
278
279 /* Configure DDR and (possibly) PCIe max read/write QSB values */
280 static void
ipa_hardware_config_qsb(struct ipa * ipa,const struct ipa_data * data)281 ipa_hardware_config_qsb(struct ipa *ipa, const struct ipa_data *data)
282 {
283 const struct ipa_qsb_data *data0;
284 const struct ipa_qsb_data *data1;
285 const struct ipa_reg *reg;
286 u32 val;
287
288 /* QMB 0 represents DDR; QMB 1 (if present) represents PCIe */
289 data0 = &data->qsb_data[IPA_QSB_MASTER_DDR];
290 if (data->qsb_count > 1)
291 data1 = &data->qsb_data[IPA_QSB_MASTER_PCIE];
292
293 /* Max outstanding write accesses for QSB masters */
294 reg = ipa_reg(ipa, QSB_MAX_WRITES);
295
296 val = ipa_reg_encode(reg, GEN_QMB_0_MAX_WRITES, data0->max_writes);
297 if (data->qsb_count > 1)
298 val |= ipa_reg_encode(reg, GEN_QMB_1_MAX_WRITES,
299 data1->max_writes);
300
301 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
302
303 /* Max outstanding read accesses for QSB masters */
304 reg = ipa_reg(ipa, QSB_MAX_READS);
305
306 val = ipa_reg_encode(reg, GEN_QMB_0_MAX_READS, data0->max_reads);
307 if (ipa->version >= IPA_VERSION_4_0)
308 val |= ipa_reg_encode(reg, GEN_QMB_0_MAX_READS_BEATS,
309 data0->max_reads_beats);
310 if (data->qsb_count > 1) {
311 val = ipa_reg_encode(reg, GEN_QMB_1_MAX_READS,
312 data1->max_reads);
313 if (ipa->version >= IPA_VERSION_4_0)
314 val |= ipa_reg_encode(reg, GEN_QMB_1_MAX_READS_BEATS,
315 data1->max_reads_beats);
316 }
317
318 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
319 }
320
321 /* The internal inactivity timer clock is used for the aggregation timer */
322 #define TIMER_FREQUENCY 32000 /* 32 KHz inactivity timer clock */
323
324 /* Compute the value to use in the COUNTER_CFG register AGGR_GRANULARITY
325 * field to represent the given number of microseconds. The value is one
326 * less than the number of timer ticks in the requested period. 0 is not
327 * a valid granularity value (so for example @usec must be at least 16 for
328 * a TIMER_FREQUENCY of 32000).
329 */
ipa_aggr_granularity_val(u32 usec)330 static __always_inline u32 ipa_aggr_granularity_val(u32 usec)
331 {
332 return DIV_ROUND_CLOSEST(usec * TIMER_FREQUENCY, USEC_PER_SEC) - 1;
333 }
334
335 /* IPA uses unified Qtime starting at IPA v4.5, implementing various
336 * timestamps and timers independent of the IPA core clock rate. The
337 * Qtimer is based on a 56-bit timestamp incremented at each tick of
338 * a 19.2 MHz SoC crystal oscillator (XO clock).
339 *
340 * For IPA timestamps (tag, NAT, data path logging) a lower resolution
341 * timestamp is achieved by shifting the Qtimer timestamp value right
342 * some number of bits to produce the low-order bits of the coarser
343 * granularity timestamp.
344 *
345 * For timers, a common timer clock is derived from the XO clock using
346 * a divider (we use 192, to produce a 100kHz timer clock). From
347 * this common clock, three "pulse generators" are used to produce
348 * timer ticks at a configurable frequency. IPA timers (such as
349 * those used for aggregation or head-of-line block handling) now
350 * define their period based on one of these pulse generators.
351 */
ipa_qtime_config(struct ipa * ipa)352 static void ipa_qtime_config(struct ipa *ipa)
353 {
354 const struct ipa_reg *reg;
355 u32 offset;
356 u32 val;
357
358 /* Timer clock divider must be disabled when we change the rate */
359 reg = ipa_reg(ipa, TIMERS_XO_CLK_DIV_CFG);
360 iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg));
361
362 reg = ipa_reg(ipa, QTIME_TIMESTAMP_CFG);
363 /* Set DPL time stamp resolution to use Qtime (instead of 1 msec) */
364 val = ipa_reg_encode(reg, DPL_TIMESTAMP_LSB, DPL_TIMESTAMP_SHIFT);
365 val |= ipa_reg_bit(reg, DPL_TIMESTAMP_SEL);
366 /* Configure tag and NAT Qtime timestamp resolution as well */
367 val = ipa_reg_encode(reg, TAG_TIMESTAMP_LSB, TAG_TIMESTAMP_SHIFT);
368 val = ipa_reg_encode(reg, NAT_TIMESTAMP_LSB, NAT_TIMESTAMP_SHIFT);
369
370 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
371
372 /* Set granularity of pulse generators used for other timers */
373 reg = ipa_reg(ipa, TIMERS_PULSE_GRAN_CFG);
374 val = ipa_reg_encode(reg, PULSE_GRAN_0, IPA_GRAN_100_US);
375 val |= ipa_reg_encode(reg, PULSE_GRAN_1, IPA_GRAN_1_MS);
376 val |= ipa_reg_encode(reg, PULSE_GRAN_2, IPA_GRAN_1_MS);
377
378 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
379
380 /* Actual divider is 1 more than value supplied here */
381 reg = ipa_reg(ipa, TIMERS_XO_CLK_DIV_CFG);
382 offset = ipa_reg_offset(reg);
383 val = ipa_reg_encode(reg, DIV_VALUE, IPA_XO_CLOCK_DIVIDER - 1);
384
385 iowrite32(val, ipa->reg_virt + offset);
386
387 /* Divider value is set; re-enable the common timer clock divider */
388 val |= ipa_reg_bit(reg, DIV_ENABLE);
389
390 iowrite32(val, ipa->reg_virt + offset);
391 }
392
393 /* Before IPA v4.5 timing is controlled by a counter register */
ipa_hardware_config_counter(struct ipa * ipa)394 static void ipa_hardware_config_counter(struct ipa *ipa)
395 {
396 u32 granularity = ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY);
397 const struct ipa_reg *reg;
398 u32 val;
399
400 reg = ipa_reg(ipa, COUNTER_CFG);
401 /* If defined, EOT_COAL_GRANULARITY is 0 */
402 val = ipa_reg_encode(reg, AGGR_GRANULARITY, granularity);
403 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
404 }
405
ipa_hardware_config_timing(struct ipa * ipa)406 static void ipa_hardware_config_timing(struct ipa *ipa)
407 {
408 if (ipa->version < IPA_VERSION_4_5)
409 ipa_hardware_config_counter(ipa);
410 else
411 ipa_qtime_config(ipa);
412 }
413
ipa_hardware_config_hashing(struct ipa * ipa)414 static void ipa_hardware_config_hashing(struct ipa *ipa)
415 {
416 const struct ipa_reg *reg;
417
418 if (ipa->version != IPA_VERSION_4_2)
419 return;
420
421 /* IPA v4.2 does not support hashed tables, so disable them */
422 reg = ipa_reg(ipa, FILT_ROUT_HASH_EN);
423
424 /* IPV6_ROUTER_HASH, IPV6_FILTER_HASH, IPV4_ROUTER_HASH,
425 * IPV4_FILTER_HASH are all zero.
426 */
427 iowrite32(0, ipa->reg_virt + ipa_reg_offset(reg));
428 }
429
ipa_idle_indication_cfg(struct ipa * ipa,u32 enter_idle_debounce_thresh,bool const_non_idle_enable)430 static void ipa_idle_indication_cfg(struct ipa *ipa,
431 u32 enter_idle_debounce_thresh,
432 bool const_non_idle_enable)
433 {
434 const struct ipa_reg *reg;
435 u32 val;
436
437 if (ipa->version < IPA_VERSION_3_5_1)
438 return;
439
440 reg = ipa_reg(ipa, IDLE_INDICATION_CFG);
441 val = ipa_reg_encode(reg, ENTER_IDLE_DEBOUNCE_THRESH,
442 enter_idle_debounce_thresh);
443 if (const_non_idle_enable)
444 val |= ipa_reg_bit(reg, CONST_NON_IDLE_ENABLE);
445
446 iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg));
447 }
448
449 /**
450 * ipa_hardware_dcd_config() - Enable dynamic clock division on IPA
451 * @ipa: IPA pointer
452 *
453 * Configures when the IPA signals it is idle to the global clock
454 * controller, which can respond by scaling down the clock to save
455 * power.
456 */
ipa_hardware_dcd_config(struct ipa * ipa)457 static void ipa_hardware_dcd_config(struct ipa *ipa)
458 {
459 /* Recommended values for IPA 3.5 and later according to IPA HPG */
460 ipa_idle_indication_cfg(ipa, 256, false);
461 }
462
ipa_hardware_dcd_deconfig(struct ipa * ipa)463 static void ipa_hardware_dcd_deconfig(struct ipa *ipa)
464 {
465 /* Power-on reset values */
466 ipa_idle_indication_cfg(ipa, 0, true);
467 }
468
469 /**
470 * ipa_hardware_config() - Primitive hardware initialization
471 * @ipa: IPA pointer
472 * @data: IPA configuration data
473 */
ipa_hardware_config(struct ipa * ipa,const struct ipa_data * data)474 static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data)
475 {
476 ipa_hardware_config_bcr(ipa, data);
477 ipa_hardware_config_tx(ipa);
478 ipa_hardware_config_clkon(ipa);
479 ipa_hardware_config_comp(ipa);
480 ipa_hardware_config_qsb(ipa, data);
481 ipa_hardware_config_timing(ipa);
482 ipa_hardware_config_hashing(ipa);
483 ipa_hardware_dcd_config(ipa);
484 }
485
486 /**
487 * ipa_hardware_deconfig() - Inverse of ipa_hardware_config()
488 * @ipa: IPA pointer
489 *
490 * This restores the power-on reset values (even if they aren't different)
491 */
ipa_hardware_deconfig(struct ipa * ipa)492 static void ipa_hardware_deconfig(struct ipa *ipa)
493 {
494 /* Mostly we just leave things as we set them. */
495 ipa_hardware_dcd_deconfig(ipa);
496 }
497
498 /**
499 * ipa_config() - Configure IPA hardware
500 * @ipa: IPA pointer
501 * @data: IPA configuration data
502 *
503 * Perform initialization requiring IPA power to be enabled.
504 */
ipa_config(struct ipa * ipa,const struct ipa_data * data)505 static int ipa_config(struct ipa *ipa, const struct ipa_data *data)
506 {
507 int ret;
508
509 ipa_hardware_config(ipa, data);
510
511 ret = ipa_mem_config(ipa);
512 if (ret)
513 goto err_hardware_deconfig;
514
515 ipa->interrupt = ipa_interrupt_config(ipa);
516 if (IS_ERR(ipa->interrupt)) {
517 ret = PTR_ERR(ipa->interrupt);
518 ipa->interrupt = NULL;
519 goto err_mem_deconfig;
520 }
521
522 ipa_uc_config(ipa);
523
524 ret = ipa_endpoint_config(ipa);
525 if (ret)
526 goto err_uc_deconfig;
527
528 ipa_table_config(ipa); /* No deconfig required */
529
530 /* Assign resource limitation to each group; no deconfig required */
531 ret = ipa_resource_config(ipa, data->resource_data);
532 if (ret)
533 goto err_endpoint_deconfig;
534
535 ret = ipa_modem_config(ipa);
536 if (ret)
537 goto err_endpoint_deconfig;
538
539 return 0;
540
541 err_endpoint_deconfig:
542 ipa_endpoint_deconfig(ipa);
543 err_uc_deconfig:
544 ipa_uc_deconfig(ipa);
545 ipa_interrupt_deconfig(ipa->interrupt);
546 ipa->interrupt = NULL;
547 err_mem_deconfig:
548 ipa_mem_deconfig(ipa);
549 err_hardware_deconfig:
550 ipa_hardware_deconfig(ipa);
551
552 return ret;
553 }
554
555 /**
556 * ipa_deconfig() - Inverse of ipa_config()
557 * @ipa: IPA pointer
558 */
ipa_deconfig(struct ipa * ipa)559 static void ipa_deconfig(struct ipa *ipa)
560 {
561 ipa_modem_deconfig(ipa);
562 ipa_endpoint_deconfig(ipa);
563 ipa_uc_deconfig(ipa);
564 ipa_interrupt_deconfig(ipa->interrupt);
565 ipa->interrupt = NULL;
566 ipa_mem_deconfig(ipa);
567 ipa_hardware_deconfig(ipa);
568 }
569
ipa_firmware_load(struct device * dev)570 static int ipa_firmware_load(struct device *dev)
571 {
572 const struct firmware *fw;
573 struct device_node *node;
574 struct resource res;
575 phys_addr_t phys;
576 const char *path;
577 ssize_t size;
578 void *virt;
579 int ret;
580
581 node = of_parse_phandle(dev->of_node, "memory-region", 0);
582 if (!node) {
583 dev_err(dev, "DT error getting \"memory-region\" property\n");
584 return -EINVAL;
585 }
586
587 ret = of_address_to_resource(node, 0, &res);
588 of_node_put(node);
589 if (ret) {
590 dev_err(dev, "error %d getting \"memory-region\" resource\n",
591 ret);
592 return ret;
593 }
594
595 /* Use name from DTB if specified; use default for *any* error */
596 ret = of_property_read_string(dev->of_node, "firmware-name", &path);
597 if (ret) {
598 dev_dbg(dev, "error %d getting \"firmware-name\" resource\n",
599 ret);
600 path = IPA_FW_PATH_DEFAULT;
601 }
602
603 ret = request_firmware(&fw, path, dev);
604 if (ret) {
605 dev_err(dev, "error %d requesting \"%s\"\n", ret, path);
606 return ret;
607 }
608
609 phys = res.start;
610 size = (size_t)resource_size(&res);
611 virt = memremap(phys, size, MEMREMAP_WC);
612 if (!virt) {
613 dev_err(dev, "unable to remap firmware memory\n");
614 ret = -ENOMEM;
615 goto out_release_firmware;
616 }
617
618 ret = qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL);
619 if (ret)
620 dev_err(dev, "error %d loading \"%s\"\n", ret, path);
621 else if ((ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID)))
622 dev_err(dev, "error %d authenticating \"%s\"\n", ret, path);
623
624 memunmap(virt);
625 out_release_firmware:
626 release_firmware(fw);
627
628 return ret;
629 }
630
631 static const struct of_device_id ipa_match[] = {
632 {
633 .compatible = "qcom,msm8998-ipa",
634 .data = &ipa_data_v3_1,
635 },
636 {
637 .compatible = "qcom,sdm845-ipa",
638 .data = &ipa_data_v3_5_1,
639 },
640 {
641 .compatible = "qcom,sc7180-ipa",
642 .data = &ipa_data_v4_2,
643 },
644 {
645 .compatible = "qcom,sdx55-ipa",
646 .data = &ipa_data_v4_5,
647 },
648 {
649 .compatible = "qcom,sm8350-ipa",
650 .data = &ipa_data_v4_9,
651 },
652 {
653 .compatible = "qcom,sc7280-ipa",
654 .data = &ipa_data_v4_11,
655 },
656 { },
657 };
658 MODULE_DEVICE_TABLE(of, ipa_match);
659
660 /* Check things that can be validated at build time. This just
661 * groups these things BUILD_BUG_ON() calls don't clutter the rest
662 * of the code.
663 * */
ipa_validate_build(void)664 static void ipa_validate_build(void)
665 {
666 /* At one time we assumed a 64-bit build, allowing some do_div()
667 * calls to be replaced by simple division or modulo operations.
668 * We currently only perform divide and modulo operations on u32,
669 * u16, or size_t objects, and of those only size_t has any chance
670 * of being a 64-bit value. (It should be guaranteed 32 bits wide
671 * on a 32-bit build, but there is no harm in verifying that.)
672 */
673 BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT) && sizeof(size_t) != 4);
674
675 /* Code assumes the EE ID for the AP is 0 (zeroed structure field) */
676 BUILD_BUG_ON(GSI_EE_AP != 0);
677
678 /* There's no point if we have no channels or event rings */
679 BUILD_BUG_ON(!GSI_CHANNEL_COUNT_MAX);
680 BUILD_BUG_ON(!GSI_EVT_RING_COUNT_MAX);
681
682 /* GSI hardware design limits */
683 BUILD_BUG_ON(GSI_CHANNEL_COUNT_MAX > 32);
684 BUILD_BUG_ON(GSI_EVT_RING_COUNT_MAX > 31);
685
686 /* The number of TREs in a transaction is limited by the channel's
687 * TLV FIFO size. A transaction structure uses 8-bit fields
688 * to represents the number of TREs it has allocated and used.
689 */
690 BUILD_BUG_ON(GSI_TLV_MAX > U8_MAX);
691
692 /* This is used as a divisor */
693 BUILD_BUG_ON(!IPA_AGGR_GRANULARITY);
694
695 /* Aggregation granularity value can't be 0, and must fit */
696 BUILD_BUG_ON(!ipa_aggr_granularity_val(IPA_AGGR_GRANULARITY));
697 }
698
699 /**
700 * ipa_probe() - IPA platform driver probe function
701 * @pdev: Platform device pointer
702 *
703 * Return: 0 if successful, or a negative error code (possibly
704 * EPROBE_DEFER)
705 *
706 * This is the main entry point for the IPA driver. Initialization proceeds
707 * in several stages:
708 * - The "init" stage involves activities that can be initialized without
709 * access to the IPA hardware.
710 * - The "config" stage requires IPA power to be active so IPA registers
711 * can be accessed, but does not require the use of IPA immediate commands.
712 * - The "setup" stage uses IPA immediate commands, and so requires the GSI
713 * layer to be initialized.
714 *
715 * A Boolean Device Tree "modem-init" property determines whether GSI
716 * initialization will be performed by the AP (Trust Zone) or the modem.
717 * If the AP does GSI initialization, the setup phase is entered after
718 * this has completed successfully. Otherwise the modem initializes
719 * the GSI layer and signals it has finished by sending an SMP2P interrupt
720 * to the AP; this triggers the start if IPA setup.
721 */
ipa_probe(struct platform_device * pdev)722 static int ipa_probe(struct platform_device *pdev)
723 {
724 struct device *dev = &pdev->dev;
725 const struct ipa_data *data;
726 struct ipa_power *power;
727 bool modem_init;
728 struct ipa *ipa;
729 int ret;
730
731 ipa_validate_build();
732
733 /* Get configuration data early; needed for power initialization */
734 data = of_device_get_match_data(dev);
735 if (!data) {
736 dev_err(dev, "matched hardware not supported\n");
737 return -ENODEV;
738 }
739
740 if (!ipa_version_supported(data->version)) {
741 dev_err(dev, "unsupported IPA version %u\n", data->version);
742 return -EINVAL;
743 }
744
745 /* If we need Trust Zone, make sure it's available */
746 modem_init = of_property_read_bool(dev->of_node, "modem-init");
747 if (!modem_init)
748 if (!qcom_scm_is_available())
749 return -EPROBE_DEFER;
750
751 /* The clock and interconnects might not be ready when we're
752 * probed, so might return -EPROBE_DEFER.
753 */
754 power = ipa_power_init(dev, data->power_data);
755 if (IS_ERR(power))
756 return PTR_ERR(power);
757
758 /* No more EPROBE_DEFER. Allocate and initialize the IPA structure */
759 ipa = kzalloc(sizeof(*ipa), GFP_KERNEL);
760 if (!ipa) {
761 ret = -ENOMEM;
762 goto err_power_exit;
763 }
764
765 ipa->pdev = pdev;
766 dev_set_drvdata(dev, ipa);
767 ipa->power = power;
768 ipa->version = data->version;
769 init_completion(&ipa->completion);
770
771 ret = ipa_reg_init(ipa);
772 if (ret)
773 goto err_kfree_ipa;
774
775 ret = ipa_mem_init(ipa, data->mem_data);
776 if (ret)
777 goto err_reg_exit;
778
779 ret = gsi_init(&ipa->gsi, pdev, ipa->version, data->endpoint_count,
780 data->endpoint_data);
781 if (ret)
782 goto err_mem_exit;
783
784 /* Result is a non-zero mask of endpoints that support filtering */
785 ipa->filter_map = ipa_endpoint_init(ipa, data->endpoint_count,
786 data->endpoint_data);
787 if (!ipa->filter_map) {
788 ret = -EINVAL;
789 goto err_gsi_exit;
790 }
791
792 ret = ipa_table_init(ipa);
793 if (ret)
794 goto err_endpoint_exit;
795
796 ret = ipa_smp2p_init(ipa, modem_init);
797 if (ret)
798 goto err_table_exit;
799
800 /* Power needs to be active for config and setup */
801 ret = pm_runtime_get_sync(dev);
802 if (WARN_ON(ret < 0))
803 goto err_power_put;
804
805 ret = ipa_config(ipa, data);
806 if (ret)
807 goto err_power_put;
808
809 dev_info(dev, "IPA driver initialized");
810
811 /* If the modem is doing early initialization, it will trigger a
812 * call to ipa_setup() when it has finished. In that case we're
813 * done here.
814 */
815 if (modem_init)
816 goto done;
817
818 /* Otherwise we need to load the firmware and have Trust Zone validate
819 * and install it. If that succeeds we can proceed with setup.
820 */
821 ret = ipa_firmware_load(dev);
822 if (ret)
823 goto err_deconfig;
824
825 ret = ipa_setup(ipa);
826 if (ret)
827 goto err_deconfig;
828 done:
829 pm_runtime_mark_last_busy(dev);
830 (void)pm_runtime_put_autosuspend(dev);
831
832 return 0;
833
834 err_deconfig:
835 ipa_deconfig(ipa);
836 err_power_put:
837 pm_runtime_put_noidle(dev);
838 ipa_smp2p_exit(ipa);
839 err_table_exit:
840 ipa_table_exit(ipa);
841 err_endpoint_exit:
842 ipa_endpoint_exit(ipa);
843 err_gsi_exit:
844 gsi_exit(&ipa->gsi);
845 err_mem_exit:
846 ipa_mem_exit(ipa);
847 err_reg_exit:
848 ipa_reg_exit(ipa);
849 err_kfree_ipa:
850 kfree(ipa);
851 err_power_exit:
852 ipa_power_exit(power);
853
854 return ret;
855 }
856
ipa_remove(struct platform_device * pdev)857 static int ipa_remove(struct platform_device *pdev)
858 {
859 struct ipa *ipa = dev_get_drvdata(&pdev->dev);
860 struct ipa_power *power = ipa->power;
861 struct device *dev = &pdev->dev;
862 int ret;
863
864 /* Prevent the modem from triggering a call to ipa_setup(). This
865 * also ensures a modem-initiated setup that's underway completes.
866 */
867 ipa_smp2p_irq_disable_setup(ipa);
868
869 ret = pm_runtime_get_sync(dev);
870 if (WARN_ON(ret < 0))
871 goto out_power_put;
872
873 if (ipa->setup_complete) {
874 ret = ipa_modem_stop(ipa);
875 /* If starting or stopping is in progress, try once more */
876 if (ret == -EBUSY) {
877 usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);
878 ret = ipa_modem_stop(ipa);
879 }
880 if (ret)
881 return ret;
882
883 ipa_teardown(ipa);
884 }
885
886 ipa_deconfig(ipa);
887 out_power_put:
888 pm_runtime_put_noidle(dev);
889 ipa_smp2p_exit(ipa);
890 ipa_table_exit(ipa);
891 ipa_endpoint_exit(ipa);
892 gsi_exit(&ipa->gsi);
893 ipa_mem_exit(ipa);
894 ipa_reg_exit(ipa);
895 kfree(ipa);
896 ipa_power_exit(power);
897
898 dev_info(dev, "IPA driver removed");
899
900 return 0;
901 }
902
ipa_shutdown(struct platform_device * pdev)903 static void ipa_shutdown(struct platform_device *pdev)
904 {
905 int ret;
906
907 ret = ipa_remove(pdev);
908 if (ret)
909 dev_err(&pdev->dev, "shutdown: remove returned %d\n", ret);
910 }
911
912 static const struct attribute_group *ipa_attribute_groups[] = {
913 &ipa_attribute_group,
914 &ipa_feature_attribute_group,
915 &ipa_endpoint_id_attribute_group,
916 &ipa_modem_attribute_group,
917 NULL,
918 };
919
920 static struct platform_driver ipa_driver = {
921 .probe = ipa_probe,
922 .remove = ipa_remove,
923 .shutdown = ipa_shutdown,
924 .driver = {
925 .name = "ipa",
926 .pm = &ipa_pm_ops,
927 .of_match_table = ipa_match,
928 .dev_groups = ipa_attribute_groups,
929 },
930 };
931
932 module_platform_driver(ipa_driver);
933
934 MODULE_LICENSE("GPL v2");
935 MODULE_DESCRIPTION("Qualcomm IP Accelerator device driver");
936