1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2017-2022 Linaro Ltd
4 * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
5 */
6 #include <linux/bits.h>
7 #include <linux/bitfield.h>
8 #include <linux/led-class-multicolor.h>
9 #include <linux/module.h>
10 #include <linux/of.h>
11 #include <linux/of_device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pwm.h>
14 #include <linux/regmap.h>
15 #include <linux/slab.h>
16
17 #define LPG_SUBTYPE_REG 0x05
18 #define LPG_SUBTYPE_LPG 0x2
19 #define LPG_SUBTYPE_PWM 0xb
20 #define LPG_SUBTYPE_LPG_LITE 0x11
21 #define LPG_PATTERN_CONFIG_REG 0x40
22 #define LPG_SIZE_CLK_REG 0x41
23 #define PWM_CLK_SELECT_MASK GENMASK(1, 0)
24 #define LPG_PREDIV_CLK_REG 0x42
25 #define PWM_FREQ_PRE_DIV_MASK GENMASK(6, 5)
26 #define PWM_FREQ_EXP_MASK GENMASK(2, 0)
27 #define PWM_TYPE_CONFIG_REG 0x43
28 #define PWM_VALUE_REG 0x44
29 #define PWM_ENABLE_CONTROL_REG 0x46
30 #define PWM_SYNC_REG 0x47
31 #define LPG_RAMP_DURATION_REG 0x50
32 #define LPG_HI_PAUSE_REG 0x52
33 #define LPG_LO_PAUSE_REG 0x54
34 #define LPG_HI_IDX_REG 0x56
35 #define LPG_LO_IDX_REG 0x57
36 #define PWM_SEC_ACCESS_REG 0xd0
37 #define PWM_DTEST_REG(x) (0xe2 + (x) - 1)
38
39 #define TRI_LED_SRC_SEL 0x45
40 #define TRI_LED_EN_CTL 0x46
41 #define TRI_LED_ATC_CTL 0x47
42
43 #define LPG_LUT_REG(x) (0x40 + (x) * 2)
44 #define RAMP_CONTROL_REG 0xc8
45
46 #define LPG_RESOLUTION 512
47 #define LPG_MAX_M 7
48
49 struct lpg_channel;
50 struct lpg_data;
51
52 /**
53 * struct lpg - LPG device context
54 * @dev: pointer to LPG device
55 * @map: regmap for register access
56 * @lock: used to synchronize LED and pwm callback requests
57 * @pwm: PWM-chip object, if operating in PWM mode
58 * @data: reference to version specific data
59 * @lut_base: base address of the LUT block (optional)
60 * @lut_size: number of entries in the LUT block
61 * @lut_bitmap: allocation bitmap for LUT entries
62 * @triled_base: base address of the TRILED block (optional)
63 * @triled_src: power-source for the TRILED
64 * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
65 * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
66 * @channels: list of PWM channels
67 * @num_channels: number of @channels
68 */
69 struct lpg {
70 struct device *dev;
71 struct regmap *map;
72
73 struct mutex lock;
74
75 struct pwm_chip pwm;
76
77 const struct lpg_data *data;
78
79 u32 lut_base;
80 u32 lut_size;
81 unsigned long *lut_bitmap;
82
83 u32 triled_base;
84 u32 triled_src;
85 bool triled_has_atc_ctl;
86 bool triled_has_src_sel;
87
88 struct lpg_channel *channels;
89 unsigned int num_channels;
90 };
91
92 /**
93 * struct lpg_channel - per channel data
94 * @lpg: reference to parent lpg
95 * @base: base address of the PWM channel
96 * @triled_mask: mask in TRILED to enable this channel
97 * @lut_mask: mask in LUT to start pattern generator for this channel
98 * @subtype: PMIC hardware block subtype
99 * @in_use: channel is exposed to LED framework
100 * @color: color of the LED attached to this channel
101 * @dtest_line: DTEST line for output, or 0 if disabled
102 * @dtest_value: DTEST line configuration
103 * @pwm_value: duty (in microseconds) of the generated pulses, overridden by LUT
104 * @enabled: output enabled?
105 * @period: period (in nanoseconds) of the generated pulses
106 * @clk_sel: reference clock frequency selector
107 * @pre_div_sel: divider selector of the reference clock
108 * @pre_div_exp: exponential divider of the reference clock
109 * @ramp_enabled: duty cycle is driven by iterating over lookup table
110 * @ramp_ping_pong: reverse through pattern, rather than wrapping to start
111 * @ramp_oneshot: perform only a single pass over the pattern
112 * @ramp_reverse: iterate over pattern backwards
113 * @ramp_tick_ms: length (in milliseconds) of one step in the pattern
114 * @ramp_lo_pause_ms: pause (in milliseconds) before iterating over pattern
115 * @ramp_hi_pause_ms: pause (in milliseconds) after iterating over pattern
116 * @pattern_lo_idx: start index of associated pattern
117 * @pattern_hi_idx: last index of associated pattern
118 */
119 struct lpg_channel {
120 struct lpg *lpg;
121
122 u32 base;
123 unsigned int triled_mask;
124 unsigned int lut_mask;
125 unsigned int subtype;
126
127 bool in_use;
128
129 int color;
130
131 u32 dtest_line;
132 u32 dtest_value;
133
134 u16 pwm_value;
135 bool enabled;
136
137 u64 period;
138 unsigned int clk_sel;
139 unsigned int pre_div_sel;
140 unsigned int pre_div_exp;
141
142 bool ramp_enabled;
143 bool ramp_ping_pong;
144 bool ramp_oneshot;
145 bool ramp_reverse;
146 unsigned short ramp_tick_ms;
147 unsigned long ramp_lo_pause_ms;
148 unsigned long ramp_hi_pause_ms;
149
150 unsigned int pattern_lo_idx;
151 unsigned int pattern_hi_idx;
152 };
153
154 /**
155 * struct lpg_led - logical LED object
156 * @lpg: lpg context reference
157 * @cdev: LED class device
158 * @mcdev: Multicolor LED class device
159 * @num_channels: number of @channels
160 * @channels: list of channels associated with the LED
161 */
162 struct lpg_led {
163 struct lpg *lpg;
164
165 struct led_classdev cdev;
166 struct led_classdev_mc mcdev;
167
168 unsigned int num_channels;
169 struct lpg_channel *channels[];
170 };
171
172 /**
173 * struct lpg_channel_data - per channel initialization data
174 * @base: base address for PWM channel registers
175 * @triled_mask: bitmask for controlling this channel in TRILED
176 */
177 struct lpg_channel_data {
178 unsigned int base;
179 u8 triled_mask;
180 };
181
182 /**
183 * struct lpg_data - initialization data
184 * @lut_base: base address of LUT block
185 * @lut_size: number of entries in LUT
186 * @triled_base: base address of TRILED
187 * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
188 * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
189 * @num_channels: number of channels in LPG
190 * @channels: list of channel initialization data
191 */
192 struct lpg_data {
193 unsigned int lut_base;
194 unsigned int lut_size;
195 unsigned int triled_base;
196 bool triled_has_atc_ctl;
197 bool triled_has_src_sel;
198 int num_channels;
199 const struct lpg_channel_data *channels;
200 };
201
triled_set(struct lpg * lpg,unsigned int mask,unsigned int enable)202 static int triled_set(struct lpg *lpg, unsigned int mask, unsigned int enable)
203 {
204 /* Skip if we don't have a triled block */
205 if (!lpg->triled_base)
206 return 0;
207
208 return regmap_update_bits(lpg->map, lpg->triled_base + TRI_LED_EN_CTL,
209 mask, enable);
210 }
211
lpg_lut_store(struct lpg * lpg,struct led_pattern * pattern,size_t len,unsigned int * lo_idx,unsigned int * hi_idx)212 static int lpg_lut_store(struct lpg *lpg, struct led_pattern *pattern,
213 size_t len, unsigned int *lo_idx, unsigned int *hi_idx)
214 {
215 unsigned int idx;
216 u16 val;
217 int i;
218
219 idx = bitmap_find_next_zero_area(lpg->lut_bitmap, lpg->lut_size,
220 0, len, 0);
221 if (idx >= lpg->lut_size)
222 return -ENOMEM;
223
224 for (i = 0; i < len; i++) {
225 val = pattern[i].brightness;
226
227 regmap_bulk_write(lpg->map, lpg->lut_base + LPG_LUT_REG(idx + i),
228 &val, sizeof(val));
229 }
230
231 bitmap_set(lpg->lut_bitmap, idx, len);
232
233 *lo_idx = idx;
234 *hi_idx = idx + len - 1;
235
236 return 0;
237 }
238
lpg_lut_free(struct lpg * lpg,unsigned int lo_idx,unsigned int hi_idx)239 static void lpg_lut_free(struct lpg *lpg, unsigned int lo_idx, unsigned int hi_idx)
240 {
241 int len;
242
243 len = hi_idx - lo_idx + 1;
244 if (len == 1)
245 return;
246
247 bitmap_clear(lpg->lut_bitmap, lo_idx, len);
248 }
249
lpg_lut_sync(struct lpg * lpg,unsigned int mask)250 static int lpg_lut_sync(struct lpg *lpg, unsigned int mask)
251 {
252 return regmap_write(lpg->map, lpg->lut_base + RAMP_CONTROL_REG, mask);
253 }
254
255 static const unsigned int lpg_clk_rates[] = {0, 1024, 32768, 19200000};
256 static const unsigned int lpg_pre_divs[] = {1, 3, 5, 6};
257
lpg_calc_freq(struct lpg_channel * chan,uint64_t period)258 static int lpg_calc_freq(struct lpg_channel *chan, uint64_t period)
259 {
260 unsigned int clk_sel, best_clk = 0;
261 unsigned int div, best_div = 0;
262 unsigned int m, best_m = 0;
263 unsigned int error;
264 unsigned int best_err = UINT_MAX;
265 u64 best_period = 0;
266 u64 max_period;
267
268 /*
269 * The PWM period is determined by:
270 *
271 * resolution * pre_div * 2^M
272 * period = --------------------------
273 * refclk
274 *
275 * With resolution fixed at 2^9 bits, pre_div = {1, 3, 5, 6} and
276 * M = [0..7].
277 *
278 * This allows for periods between 27uS and 384s, as the PWM framework
279 * wants a period of equal or lower length than requested, reject
280 * anything below 27uS.
281 */
282 if (period <= (u64)NSEC_PER_SEC * LPG_RESOLUTION / 19200000)
283 return -EINVAL;
284
285 /* Limit period to largest possible value, to avoid overflows */
286 max_period = (u64)NSEC_PER_SEC * LPG_RESOLUTION * 6 * (1 << LPG_MAX_M) / 1024;
287 if (period > max_period)
288 period = max_period;
289
290 /*
291 * Search for the pre_div, refclk and M by solving the rewritten formula
292 * for each refclk and pre_div value:
293 *
294 * period * refclk
295 * M = log2 -------------------------------------
296 * NSEC_PER_SEC * pre_div * resolution
297 */
298 for (clk_sel = 1; clk_sel < ARRAY_SIZE(lpg_clk_rates); clk_sel++) {
299 u64 numerator = period * lpg_clk_rates[clk_sel];
300
301 for (div = 0; div < ARRAY_SIZE(lpg_pre_divs); div++) {
302 u64 denominator = (u64)NSEC_PER_SEC * lpg_pre_divs[div] * LPG_RESOLUTION;
303 u64 actual;
304 u64 ratio;
305
306 if (numerator < denominator)
307 continue;
308
309 ratio = div64_u64(numerator, denominator);
310 m = ilog2(ratio);
311 if (m > LPG_MAX_M)
312 m = LPG_MAX_M;
313
314 actual = DIV_ROUND_UP_ULL(denominator * (1 << m), lpg_clk_rates[clk_sel]);
315
316 error = period - actual;
317 if (error < best_err) {
318 best_err = error;
319
320 best_div = div;
321 best_m = m;
322 best_clk = clk_sel;
323 best_period = actual;
324 }
325 }
326 }
327
328 chan->clk_sel = best_clk;
329 chan->pre_div_sel = best_div;
330 chan->pre_div_exp = best_m;
331 chan->period = best_period;
332
333 return 0;
334 }
335
lpg_calc_duty(struct lpg_channel * chan,uint64_t duty)336 static void lpg_calc_duty(struct lpg_channel *chan, uint64_t duty)
337 {
338 unsigned int max = LPG_RESOLUTION - 1;
339 unsigned int val;
340
341 val = div64_u64(duty * lpg_clk_rates[chan->clk_sel],
342 (u64)NSEC_PER_SEC * lpg_pre_divs[chan->pre_div_sel] * (1 << chan->pre_div_exp));
343
344 chan->pwm_value = min(val, max);
345 }
346
lpg_apply_freq(struct lpg_channel * chan)347 static void lpg_apply_freq(struct lpg_channel *chan)
348 {
349 unsigned long val;
350 struct lpg *lpg = chan->lpg;
351
352 if (!chan->enabled)
353 return;
354
355 val = chan->clk_sel;
356
357 /* Specify 9bit resolution, based on the subtype of the channel */
358 switch (chan->subtype) {
359 case LPG_SUBTYPE_LPG:
360 val |= GENMASK(5, 4);
361 break;
362 case LPG_SUBTYPE_PWM:
363 val |= BIT(2);
364 break;
365 case LPG_SUBTYPE_LPG_LITE:
366 default:
367 val |= BIT(4);
368 break;
369 }
370
371 regmap_write(lpg->map, chan->base + LPG_SIZE_CLK_REG, val);
372
373 val = FIELD_PREP(PWM_FREQ_PRE_DIV_MASK, chan->pre_div_sel) |
374 FIELD_PREP(PWM_FREQ_EXP_MASK, chan->pre_div_exp);
375 regmap_write(lpg->map, chan->base + LPG_PREDIV_CLK_REG, val);
376 }
377
378 #define LPG_ENABLE_GLITCH_REMOVAL BIT(5)
379
lpg_enable_glitch(struct lpg_channel * chan)380 static void lpg_enable_glitch(struct lpg_channel *chan)
381 {
382 struct lpg *lpg = chan->lpg;
383
384 regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
385 LPG_ENABLE_GLITCH_REMOVAL, 0);
386 }
387
lpg_disable_glitch(struct lpg_channel * chan)388 static void lpg_disable_glitch(struct lpg_channel *chan)
389 {
390 struct lpg *lpg = chan->lpg;
391
392 regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
393 LPG_ENABLE_GLITCH_REMOVAL,
394 LPG_ENABLE_GLITCH_REMOVAL);
395 }
396
lpg_apply_pwm_value(struct lpg_channel * chan)397 static void lpg_apply_pwm_value(struct lpg_channel *chan)
398 {
399 struct lpg *lpg = chan->lpg;
400 u16 val = chan->pwm_value;
401
402 if (!chan->enabled)
403 return;
404
405 regmap_bulk_write(lpg->map, chan->base + PWM_VALUE_REG, &val, sizeof(val));
406 }
407
408 #define LPG_PATTERN_CONFIG_LO_TO_HI BIT(4)
409 #define LPG_PATTERN_CONFIG_REPEAT BIT(3)
410 #define LPG_PATTERN_CONFIG_TOGGLE BIT(2)
411 #define LPG_PATTERN_CONFIG_PAUSE_HI BIT(1)
412 #define LPG_PATTERN_CONFIG_PAUSE_LO BIT(0)
413
lpg_apply_lut_control(struct lpg_channel * chan)414 static void lpg_apply_lut_control(struct lpg_channel *chan)
415 {
416 struct lpg *lpg = chan->lpg;
417 unsigned int hi_pause;
418 unsigned int lo_pause;
419 unsigned int conf = 0;
420 unsigned int lo_idx = chan->pattern_lo_idx;
421 unsigned int hi_idx = chan->pattern_hi_idx;
422 u16 step = chan->ramp_tick_ms;
423
424 if (!chan->ramp_enabled || chan->pattern_lo_idx == chan->pattern_hi_idx)
425 return;
426
427 hi_pause = DIV_ROUND_UP(chan->ramp_hi_pause_ms, step);
428 lo_pause = DIV_ROUND_UP(chan->ramp_lo_pause_ms, step);
429
430 if (!chan->ramp_reverse)
431 conf |= LPG_PATTERN_CONFIG_LO_TO_HI;
432 if (!chan->ramp_oneshot)
433 conf |= LPG_PATTERN_CONFIG_REPEAT;
434 if (chan->ramp_ping_pong)
435 conf |= LPG_PATTERN_CONFIG_TOGGLE;
436 if (chan->ramp_hi_pause_ms)
437 conf |= LPG_PATTERN_CONFIG_PAUSE_HI;
438 if (chan->ramp_lo_pause_ms)
439 conf |= LPG_PATTERN_CONFIG_PAUSE_LO;
440
441 regmap_write(lpg->map, chan->base + LPG_PATTERN_CONFIG_REG, conf);
442 regmap_write(lpg->map, chan->base + LPG_HI_IDX_REG, hi_idx);
443 regmap_write(lpg->map, chan->base + LPG_LO_IDX_REG, lo_idx);
444
445 regmap_bulk_write(lpg->map, chan->base + LPG_RAMP_DURATION_REG, &step, sizeof(step));
446 regmap_write(lpg->map, chan->base + LPG_HI_PAUSE_REG, hi_pause);
447 regmap_write(lpg->map, chan->base + LPG_LO_PAUSE_REG, lo_pause);
448 }
449
450 #define LPG_ENABLE_CONTROL_OUTPUT BIT(7)
451 #define LPG_ENABLE_CONTROL_BUFFER_TRISTATE BIT(5)
452 #define LPG_ENABLE_CONTROL_SRC_PWM BIT(2)
453 #define LPG_ENABLE_CONTROL_RAMP_GEN BIT(1)
454
lpg_apply_control(struct lpg_channel * chan)455 static void lpg_apply_control(struct lpg_channel *chan)
456 {
457 unsigned int ctrl;
458 struct lpg *lpg = chan->lpg;
459
460 ctrl = LPG_ENABLE_CONTROL_BUFFER_TRISTATE;
461
462 if (chan->enabled)
463 ctrl |= LPG_ENABLE_CONTROL_OUTPUT;
464
465 if (chan->pattern_lo_idx != chan->pattern_hi_idx)
466 ctrl |= LPG_ENABLE_CONTROL_RAMP_GEN;
467 else
468 ctrl |= LPG_ENABLE_CONTROL_SRC_PWM;
469
470 regmap_write(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, ctrl);
471
472 /*
473 * Due to LPG hardware bug, in the PWM mode, having enabled PWM,
474 * We have to write PWM values one more time.
475 */
476 if (chan->enabled)
477 lpg_apply_pwm_value(chan);
478 }
479
480 #define LPG_SYNC_PWM BIT(0)
481
lpg_apply_sync(struct lpg_channel * chan)482 static void lpg_apply_sync(struct lpg_channel *chan)
483 {
484 struct lpg *lpg = chan->lpg;
485
486 regmap_write(lpg->map, chan->base + PWM_SYNC_REG, LPG_SYNC_PWM);
487 }
488
lpg_parse_dtest(struct lpg * lpg)489 static int lpg_parse_dtest(struct lpg *lpg)
490 {
491 struct lpg_channel *chan;
492 struct device_node *np = lpg->dev->of_node;
493 int count;
494 int ret;
495 int i;
496
497 count = of_property_count_u32_elems(np, "qcom,dtest");
498 if (count == -EINVAL) {
499 return 0;
500 } else if (count < 0) {
501 ret = count;
502 goto err_malformed;
503 } else if (count != lpg->data->num_channels * 2) {
504 dev_err(lpg->dev, "qcom,dtest needs to be %d items\n",
505 lpg->data->num_channels * 2);
506 return -EINVAL;
507 }
508
509 for (i = 0; i < lpg->data->num_channels; i++) {
510 chan = &lpg->channels[i];
511
512 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2,
513 &chan->dtest_line);
514 if (ret)
515 goto err_malformed;
516
517 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2 + 1,
518 &chan->dtest_value);
519 if (ret)
520 goto err_malformed;
521 }
522
523 return 0;
524
525 err_malformed:
526 dev_err(lpg->dev, "malformed qcom,dtest\n");
527 return ret;
528 }
529
lpg_apply_dtest(struct lpg_channel * chan)530 static void lpg_apply_dtest(struct lpg_channel *chan)
531 {
532 struct lpg *lpg = chan->lpg;
533
534 if (!chan->dtest_line)
535 return;
536
537 regmap_write(lpg->map, chan->base + PWM_SEC_ACCESS_REG, 0xa5);
538 regmap_write(lpg->map, chan->base + PWM_DTEST_REG(chan->dtest_line),
539 chan->dtest_value);
540 }
541
lpg_apply(struct lpg_channel * chan)542 static void lpg_apply(struct lpg_channel *chan)
543 {
544 lpg_disable_glitch(chan);
545 lpg_apply_freq(chan);
546 lpg_apply_pwm_value(chan);
547 lpg_apply_control(chan);
548 lpg_apply_sync(chan);
549 lpg_apply_lut_control(chan);
550 lpg_enable_glitch(chan);
551 }
552
lpg_brightness_set(struct lpg_led * led,struct led_classdev * cdev,struct mc_subled * subleds)553 static void lpg_brightness_set(struct lpg_led *led, struct led_classdev *cdev,
554 struct mc_subled *subleds)
555 {
556 enum led_brightness brightness;
557 struct lpg_channel *chan;
558 unsigned int triled_enabled = 0;
559 unsigned int triled_mask = 0;
560 unsigned int lut_mask = 0;
561 unsigned int duty;
562 struct lpg *lpg = led->lpg;
563 int i;
564
565 for (i = 0; i < led->num_channels; i++) {
566 chan = led->channels[i];
567 brightness = subleds[i].brightness;
568
569 if (brightness == LED_OFF) {
570 chan->enabled = false;
571 chan->ramp_enabled = false;
572 } else if (chan->pattern_lo_idx != chan->pattern_hi_idx) {
573 lpg_calc_freq(chan, NSEC_PER_MSEC);
574
575 chan->enabled = true;
576 chan->ramp_enabled = true;
577
578 lut_mask |= chan->lut_mask;
579 triled_enabled |= chan->triled_mask;
580 } else {
581 lpg_calc_freq(chan, NSEC_PER_MSEC);
582
583 duty = div_u64(brightness * chan->period, cdev->max_brightness);
584 lpg_calc_duty(chan, duty);
585 chan->enabled = true;
586 chan->ramp_enabled = false;
587
588 triled_enabled |= chan->triled_mask;
589 }
590
591 triled_mask |= chan->triled_mask;
592
593 lpg_apply(chan);
594 }
595
596 /* Toggle triled lines */
597 if (triled_mask)
598 triled_set(lpg, triled_mask, triled_enabled);
599
600 /* Trigger start of ramp generator(s) */
601 if (lut_mask)
602 lpg_lut_sync(lpg, lut_mask);
603 }
604
lpg_brightness_single_set(struct led_classdev * cdev,enum led_brightness value)605 static int lpg_brightness_single_set(struct led_classdev *cdev,
606 enum led_brightness value)
607 {
608 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
609 struct mc_subled info;
610
611 mutex_lock(&led->lpg->lock);
612
613 info.brightness = value;
614 lpg_brightness_set(led, cdev, &info);
615
616 mutex_unlock(&led->lpg->lock);
617
618 return 0;
619 }
620
lpg_brightness_mc_set(struct led_classdev * cdev,enum led_brightness value)621 static int lpg_brightness_mc_set(struct led_classdev *cdev,
622 enum led_brightness value)
623 {
624 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
625 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
626
627 mutex_lock(&led->lpg->lock);
628
629 led_mc_calc_color_components(mc, value);
630 lpg_brightness_set(led, cdev, mc->subled_info);
631
632 mutex_unlock(&led->lpg->lock);
633
634 return 0;
635 }
636
lpg_blink_set(struct lpg_led * led,unsigned long * delay_on,unsigned long * delay_off)637 static int lpg_blink_set(struct lpg_led *led,
638 unsigned long *delay_on, unsigned long *delay_off)
639 {
640 struct lpg_channel *chan;
641 unsigned int period;
642 unsigned int triled_mask = 0;
643 struct lpg *lpg = led->lpg;
644 u64 duty;
645 int i;
646
647 if (!*delay_on && !*delay_off) {
648 *delay_on = 500;
649 *delay_off = 500;
650 }
651
652 duty = *delay_on * NSEC_PER_MSEC;
653 period = (*delay_on + *delay_off) * NSEC_PER_MSEC;
654
655 for (i = 0; i < led->num_channels; i++) {
656 chan = led->channels[i];
657
658 lpg_calc_freq(chan, period);
659 lpg_calc_duty(chan, duty);
660
661 chan->enabled = true;
662 chan->ramp_enabled = false;
663
664 triled_mask |= chan->triled_mask;
665
666 lpg_apply(chan);
667 }
668
669 /* Enable triled lines */
670 triled_set(lpg, triled_mask, triled_mask);
671
672 chan = led->channels[0];
673 duty = div_u64(chan->pwm_value * chan->period, LPG_RESOLUTION);
674 *delay_on = div_u64(duty, NSEC_PER_MSEC);
675 *delay_off = div_u64(chan->period - duty, NSEC_PER_MSEC);
676
677 return 0;
678 }
679
lpg_blink_single_set(struct led_classdev * cdev,unsigned long * delay_on,unsigned long * delay_off)680 static int lpg_blink_single_set(struct led_classdev *cdev,
681 unsigned long *delay_on, unsigned long *delay_off)
682 {
683 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
684 int ret;
685
686 mutex_lock(&led->lpg->lock);
687
688 ret = lpg_blink_set(led, delay_on, delay_off);
689
690 mutex_unlock(&led->lpg->lock);
691
692 return ret;
693 }
694
lpg_blink_mc_set(struct led_classdev * cdev,unsigned long * delay_on,unsigned long * delay_off)695 static int lpg_blink_mc_set(struct led_classdev *cdev,
696 unsigned long *delay_on, unsigned long *delay_off)
697 {
698 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
699 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
700 int ret;
701
702 mutex_lock(&led->lpg->lock);
703
704 ret = lpg_blink_set(led, delay_on, delay_off);
705
706 mutex_unlock(&led->lpg->lock);
707
708 return ret;
709 }
710
lpg_pattern_set(struct lpg_led * led,struct led_pattern * led_pattern,u32 len,int repeat)711 static int lpg_pattern_set(struct lpg_led *led, struct led_pattern *led_pattern,
712 u32 len, int repeat)
713 {
714 struct lpg_channel *chan;
715 struct lpg *lpg = led->lpg;
716 struct led_pattern *pattern;
717 unsigned int brightness_a;
718 unsigned int brightness_b;
719 unsigned int actual_len;
720 unsigned int hi_pause;
721 unsigned int lo_pause;
722 unsigned int delta_t;
723 unsigned int lo_idx;
724 unsigned int hi_idx;
725 unsigned int i;
726 bool ping_pong = true;
727 int ret = -EINVAL;
728
729 /* Hardware only support oneshot or indefinite loops */
730 if (repeat != -1 && repeat != 1)
731 return -EINVAL;
732
733 /*
734 * The standardized leds-trigger-pattern format defines that the
735 * brightness of the LED follows a linear transition from one entry
736 * in the pattern to the next, over the given delta_t time. It
737 * describes that the way to perform instant transitions a zero-length
738 * entry should be added following a pattern entry.
739 *
740 * The LPG hardware is only able to perform the latter (no linear
741 * transitions), so require each entry in the pattern to be followed by
742 * a zero-length transition.
743 */
744 if (len % 2)
745 return -EINVAL;
746
747 pattern = kcalloc(len / 2, sizeof(*pattern), GFP_KERNEL);
748 if (!pattern)
749 return -ENOMEM;
750
751 for (i = 0; i < len; i += 2) {
752 if (led_pattern[i].brightness != led_pattern[i + 1].brightness)
753 goto out_free_pattern;
754 if (led_pattern[i + 1].delta_t != 0)
755 goto out_free_pattern;
756
757 pattern[i / 2].brightness = led_pattern[i].brightness;
758 pattern[i / 2].delta_t = led_pattern[i].delta_t;
759 }
760
761 len /= 2;
762
763 /*
764 * Specifying a pattern of length 1 causes the hardware to iterate
765 * through the entire LUT, so prohibit this.
766 */
767 if (len < 2)
768 goto out_free_pattern;
769
770 /*
771 * The LPG plays patterns with at a fixed pace, a "low pause" can be
772 * used to stretch the first delay of the pattern and a "high pause"
773 * the last one.
774 *
775 * In order to save space the pattern can be played in "ping pong"
776 * mode, in which the pattern is first played forward, then "high
777 * pause" is applied, then the pattern is played backwards and finally
778 * the "low pause" is applied.
779 *
780 * The middle elements of the pattern are used to determine delta_t and
781 * the "low pause" and "high pause" multipliers are derrived from this.
782 *
783 * The first element in the pattern is used to determine "low pause".
784 *
785 * If the specified pattern is a palindrome the ping pong mode is
786 * enabled. In this scenario the delta_t of the middle entry (i.e. the
787 * last in the programmed pattern) determines the "high pause".
788 */
789
790 /* Detect palindromes and use "ping pong" to reduce LUT usage */
791 for (i = 0; i < len / 2; i++) {
792 brightness_a = pattern[i].brightness;
793 brightness_b = pattern[len - i - 1].brightness;
794
795 if (brightness_a != brightness_b) {
796 ping_pong = false;
797 break;
798 }
799 }
800
801 /* The pattern length to be written to the LUT */
802 if (ping_pong)
803 actual_len = (len + 1) / 2;
804 else
805 actual_len = len;
806
807 /*
808 * Validate that all delta_t in the pattern are the same, with the
809 * exception of the middle element in case of ping_pong.
810 */
811 delta_t = pattern[1].delta_t;
812 for (i = 2; i < len; i++) {
813 if (pattern[i].delta_t != delta_t) {
814 /*
815 * Allow last entry in the full or shortened pattern to
816 * specify hi pause. Reject other variations.
817 */
818 if (i != actual_len - 1)
819 goto out_free_pattern;
820 }
821 }
822
823 /* LPG_RAMP_DURATION_REG is a 9bit */
824 if (delta_t >= BIT(9))
825 goto out_free_pattern;
826
827 /* Find "low pause" and "high pause" in the pattern */
828 lo_pause = pattern[0].delta_t;
829 hi_pause = pattern[actual_len - 1].delta_t;
830
831 mutex_lock(&lpg->lock);
832 ret = lpg_lut_store(lpg, pattern, actual_len, &lo_idx, &hi_idx);
833 if (ret < 0)
834 goto out_unlock;
835
836 for (i = 0; i < led->num_channels; i++) {
837 chan = led->channels[i];
838
839 chan->ramp_tick_ms = delta_t;
840 chan->ramp_ping_pong = ping_pong;
841 chan->ramp_oneshot = repeat != -1;
842
843 chan->ramp_lo_pause_ms = lo_pause;
844 chan->ramp_hi_pause_ms = hi_pause;
845
846 chan->pattern_lo_idx = lo_idx;
847 chan->pattern_hi_idx = hi_idx;
848 }
849
850 out_unlock:
851 mutex_unlock(&lpg->lock);
852 out_free_pattern:
853 kfree(pattern);
854
855 return ret;
856 }
857
lpg_pattern_single_set(struct led_classdev * cdev,struct led_pattern * pattern,u32 len,int repeat)858 static int lpg_pattern_single_set(struct led_classdev *cdev,
859 struct led_pattern *pattern, u32 len,
860 int repeat)
861 {
862 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
863 int ret;
864
865 ret = lpg_pattern_set(led, pattern, len, repeat);
866 if (ret < 0)
867 return ret;
868
869 lpg_brightness_single_set(cdev, LED_FULL);
870
871 return 0;
872 }
873
lpg_pattern_mc_set(struct led_classdev * cdev,struct led_pattern * pattern,u32 len,int repeat)874 static int lpg_pattern_mc_set(struct led_classdev *cdev,
875 struct led_pattern *pattern, u32 len,
876 int repeat)
877 {
878 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
879 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
880 int ret;
881
882 ret = lpg_pattern_set(led, pattern, len, repeat);
883 if (ret < 0)
884 return ret;
885
886 led_mc_calc_color_components(mc, LED_FULL);
887 lpg_brightness_set(led, cdev, mc->subled_info);
888
889 return 0;
890 }
891
lpg_pattern_clear(struct lpg_led * led)892 static int lpg_pattern_clear(struct lpg_led *led)
893 {
894 struct lpg_channel *chan;
895 struct lpg *lpg = led->lpg;
896 int i;
897
898 mutex_lock(&lpg->lock);
899
900 chan = led->channels[0];
901 lpg_lut_free(lpg, chan->pattern_lo_idx, chan->pattern_hi_idx);
902
903 for (i = 0; i < led->num_channels; i++) {
904 chan = led->channels[i];
905 chan->pattern_lo_idx = 0;
906 chan->pattern_hi_idx = 0;
907 }
908
909 mutex_unlock(&lpg->lock);
910
911 return 0;
912 }
913
lpg_pattern_single_clear(struct led_classdev * cdev)914 static int lpg_pattern_single_clear(struct led_classdev *cdev)
915 {
916 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
917
918 return lpg_pattern_clear(led);
919 }
920
lpg_pattern_mc_clear(struct led_classdev * cdev)921 static int lpg_pattern_mc_clear(struct led_classdev *cdev)
922 {
923 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
924 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
925
926 return lpg_pattern_clear(led);
927 }
928
lpg_pwm_request(struct pwm_chip * chip,struct pwm_device * pwm)929 static int lpg_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
930 {
931 struct lpg *lpg = container_of(chip, struct lpg, pwm);
932 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
933
934 return chan->in_use ? -EBUSY : 0;
935 }
936
937 /*
938 * Limitations:
939 * - Updating both duty and period is not done atomically, so the output signal
940 * will momentarily be a mix of the settings.
941 * - Changed parameters takes effect immediately.
942 * - A disabled channel outputs a logical 0.
943 */
lpg_pwm_apply(struct pwm_chip * chip,struct pwm_device * pwm,const struct pwm_state * state)944 static int lpg_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
945 const struct pwm_state *state)
946 {
947 struct lpg *lpg = container_of(chip, struct lpg, pwm);
948 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
949 int ret = 0;
950
951 if (state->polarity != PWM_POLARITY_NORMAL)
952 return -EINVAL;
953
954 mutex_lock(&lpg->lock);
955
956 if (state->enabled) {
957 ret = lpg_calc_freq(chan, state->period);
958 if (ret < 0)
959 goto out_unlock;
960
961 lpg_calc_duty(chan, state->duty_cycle);
962 }
963 chan->enabled = state->enabled;
964
965 lpg_apply(chan);
966
967 triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0);
968
969 out_unlock:
970 mutex_unlock(&lpg->lock);
971
972 return ret;
973 }
974
lpg_pwm_get_state(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_state * state)975 static void lpg_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
976 struct pwm_state *state)
977 {
978 struct lpg *lpg = container_of(chip, struct lpg, pwm);
979 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
980 unsigned int pre_div;
981 unsigned int refclk;
982 unsigned int val;
983 unsigned int m;
984 u16 pwm_value;
985 int ret;
986
987 ret = regmap_read(lpg->map, chan->base + LPG_SIZE_CLK_REG, &val);
988 if (ret)
989 return;
990
991 refclk = lpg_clk_rates[val & PWM_CLK_SELECT_MASK];
992 if (refclk) {
993 ret = regmap_read(lpg->map, chan->base + LPG_PREDIV_CLK_REG, &val);
994 if (ret)
995 return;
996
997 pre_div = lpg_pre_divs[FIELD_GET(PWM_FREQ_PRE_DIV_MASK, val)];
998 m = FIELD_GET(PWM_FREQ_EXP_MASK, val);
999
1000 ret = regmap_bulk_read(lpg->map, chan->base + PWM_VALUE_REG, &pwm_value, sizeof(pwm_value));
1001 if (ret)
1002 return;
1003
1004 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * LPG_RESOLUTION * pre_div * (1 << m), refclk);
1005 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk);
1006 } else {
1007 state->period = 0;
1008 state->duty_cycle = 0;
1009 }
1010
1011 ret = regmap_read(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, &val);
1012 if (ret)
1013 return;
1014
1015 state->enabled = FIELD_GET(LPG_ENABLE_CONTROL_OUTPUT, val);
1016 state->polarity = PWM_POLARITY_NORMAL;
1017
1018 if (state->duty_cycle > state->period)
1019 state->duty_cycle = state->period;
1020 }
1021
1022 static const struct pwm_ops lpg_pwm_ops = {
1023 .request = lpg_pwm_request,
1024 .apply = lpg_pwm_apply,
1025 .get_state = lpg_pwm_get_state,
1026 .owner = THIS_MODULE,
1027 };
1028
lpg_add_pwm(struct lpg * lpg)1029 static int lpg_add_pwm(struct lpg *lpg)
1030 {
1031 int ret;
1032
1033 lpg->pwm.base = -1;
1034 lpg->pwm.dev = lpg->dev;
1035 lpg->pwm.npwm = lpg->num_channels;
1036 lpg->pwm.ops = &lpg_pwm_ops;
1037
1038 ret = pwmchip_add(&lpg->pwm);
1039 if (ret)
1040 dev_err(lpg->dev, "failed to add PWM chip: ret %d\n", ret);
1041
1042 return ret;
1043 }
1044
lpg_parse_channel(struct lpg * lpg,struct device_node * np,struct lpg_channel ** channel)1045 static int lpg_parse_channel(struct lpg *lpg, struct device_node *np,
1046 struct lpg_channel **channel)
1047 {
1048 struct lpg_channel *chan;
1049 u32 color = LED_COLOR_ID_GREEN;
1050 u32 reg;
1051 int ret;
1052
1053 ret = of_property_read_u32(np, "reg", ®);
1054 if (ret || !reg || reg > lpg->num_channels) {
1055 dev_err(lpg->dev, "invalid \"reg\" of %pOFn\n", np);
1056 return -EINVAL;
1057 }
1058
1059 chan = &lpg->channels[reg - 1];
1060 chan->in_use = true;
1061
1062 ret = of_property_read_u32(np, "color", &color);
1063 if (ret < 0 && ret != -EINVAL) {
1064 dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np);
1065 return ret;
1066 }
1067
1068 chan->color = color;
1069
1070 *channel = chan;
1071
1072 return 0;
1073 }
1074
lpg_add_led(struct lpg * lpg,struct device_node * np)1075 static int lpg_add_led(struct lpg *lpg, struct device_node *np)
1076 {
1077 struct led_init_data init_data = {};
1078 struct led_classdev *cdev;
1079 struct device_node *child;
1080 struct mc_subled *info;
1081 struct lpg_led *led;
1082 const char *state;
1083 int num_channels;
1084 u32 color = 0;
1085 int ret;
1086 int i;
1087
1088 ret = of_property_read_u32(np, "color", &color);
1089 if (ret < 0 && ret != -EINVAL) {
1090 dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np);
1091 return ret;
1092 }
1093
1094 if (color == LED_COLOR_ID_RGB)
1095 num_channels = of_get_available_child_count(np);
1096 else
1097 num_channels = 1;
1098
1099 led = devm_kzalloc(lpg->dev, struct_size(led, channels, num_channels), GFP_KERNEL);
1100 if (!led)
1101 return -ENOMEM;
1102
1103 led->lpg = lpg;
1104 led->num_channels = num_channels;
1105
1106 if (color == LED_COLOR_ID_RGB) {
1107 info = devm_kcalloc(lpg->dev, num_channels, sizeof(*info), GFP_KERNEL);
1108 if (!info)
1109 return -ENOMEM;
1110 i = 0;
1111 for_each_available_child_of_node(np, child) {
1112 ret = lpg_parse_channel(lpg, child, &led->channels[i]);
1113 if (ret < 0)
1114 return ret;
1115
1116 info[i].color_index = led->channels[i]->color;
1117 info[i].intensity = 0;
1118 i++;
1119 }
1120
1121 led->mcdev.subled_info = info;
1122 led->mcdev.num_colors = num_channels;
1123
1124 cdev = &led->mcdev.led_cdev;
1125 cdev->brightness_set_blocking = lpg_brightness_mc_set;
1126 cdev->blink_set = lpg_blink_mc_set;
1127
1128 /* Register pattern accessors only if we have a LUT block */
1129 if (lpg->lut_base) {
1130 cdev->pattern_set = lpg_pattern_mc_set;
1131 cdev->pattern_clear = lpg_pattern_mc_clear;
1132 }
1133 } else {
1134 ret = lpg_parse_channel(lpg, np, &led->channels[0]);
1135 if (ret < 0)
1136 return ret;
1137
1138 cdev = &led->cdev;
1139 cdev->brightness_set_blocking = lpg_brightness_single_set;
1140 cdev->blink_set = lpg_blink_single_set;
1141
1142 /* Register pattern accessors only if we have a LUT block */
1143 if (lpg->lut_base) {
1144 cdev->pattern_set = lpg_pattern_single_set;
1145 cdev->pattern_clear = lpg_pattern_single_clear;
1146 }
1147 }
1148
1149 cdev->default_trigger = of_get_property(np, "linux,default-trigger", NULL);
1150 cdev->max_brightness = LPG_RESOLUTION - 1;
1151
1152 if (!of_property_read_string(np, "default-state", &state) &&
1153 !strcmp(state, "on"))
1154 cdev->brightness = cdev->max_brightness;
1155 else
1156 cdev->brightness = LED_OFF;
1157
1158 cdev->brightness_set_blocking(cdev, cdev->brightness);
1159
1160 init_data.fwnode = of_fwnode_handle(np);
1161
1162 if (color == LED_COLOR_ID_RGB)
1163 ret = devm_led_classdev_multicolor_register_ext(lpg->dev, &led->mcdev, &init_data);
1164 else
1165 ret = devm_led_classdev_register_ext(lpg->dev, &led->cdev, &init_data);
1166 if (ret)
1167 dev_err(lpg->dev, "unable to register %s\n", cdev->name);
1168
1169 return ret;
1170 }
1171
lpg_init_channels(struct lpg * lpg)1172 static int lpg_init_channels(struct lpg *lpg)
1173 {
1174 const struct lpg_data *data = lpg->data;
1175 struct lpg_channel *chan;
1176 int i;
1177
1178 lpg->num_channels = data->num_channels;
1179 lpg->channels = devm_kcalloc(lpg->dev, data->num_channels,
1180 sizeof(struct lpg_channel), GFP_KERNEL);
1181 if (!lpg->channels)
1182 return -ENOMEM;
1183
1184 for (i = 0; i < data->num_channels; i++) {
1185 chan = &lpg->channels[i];
1186
1187 chan->lpg = lpg;
1188 chan->base = data->channels[i].base;
1189 chan->triled_mask = data->channels[i].triled_mask;
1190 chan->lut_mask = BIT(i);
1191
1192 regmap_read(lpg->map, chan->base + LPG_SUBTYPE_REG, &chan->subtype);
1193 }
1194
1195 return 0;
1196 }
1197
lpg_init_triled(struct lpg * lpg)1198 static int lpg_init_triled(struct lpg *lpg)
1199 {
1200 struct device_node *np = lpg->dev->of_node;
1201 int ret;
1202
1203 /* Skip initialization if we don't have a triled block */
1204 if (!lpg->data->triled_base)
1205 return 0;
1206
1207 lpg->triled_base = lpg->data->triled_base;
1208 lpg->triled_has_atc_ctl = lpg->data->triled_has_atc_ctl;
1209 lpg->triled_has_src_sel = lpg->data->triled_has_src_sel;
1210
1211 if (lpg->triled_has_src_sel) {
1212 ret = of_property_read_u32(np, "qcom,power-source", &lpg->triled_src);
1213 if (ret || lpg->triled_src == 2 || lpg->triled_src > 3) {
1214 dev_err(lpg->dev, "invalid power source\n");
1215 return -EINVAL;
1216 }
1217 }
1218
1219 /* Disable automatic trickle charge LED */
1220 if (lpg->triled_has_atc_ctl)
1221 regmap_write(lpg->map, lpg->triled_base + TRI_LED_ATC_CTL, 0);
1222
1223 /* Configure power source */
1224 if (lpg->triled_has_src_sel)
1225 regmap_write(lpg->map, lpg->triled_base + TRI_LED_SRC_SEL, lpg->triled_src);
1226
1227 /* Default all outputs to off */
1228 regmap_write(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 0);
1229
1230 return 0;
1231 }
1232
lpg_init_lut(struct lpg * lpg)1233 static int lpg_init_lut(struct lpg *lpg)
1234 {
1235 const struct lpg_data *data = lpg->data;
1236
1237 if (!data->lut_base)
1238 return 0;
1239
1240 lpg->lut_base = data->lut_base;
1241 lpg->lut_size = data->lut_size;
1242
1243 lpg->lut_bitmap = devm_bitmap_zalloc(lpg->dev, lpg->lut_size, GFP_KERNEL);
1244 if (!lpg->lut_bitmap)
1245 return -ENOMEM;
1246
1247 return 0;
1248 }
1249
lpg_probe(struct platform_device * pdev)1250 static int lpg_probe(struct platform_device *pdev)
1251 {
1252 struct device_node *np;
1253 struct lpg *lpg;
1254 int ret;
1255 int i;
1256
1257 lpg = devm_kzalloc(&pdev->dev, sizeof(*lpg), GFP_KERNEL);
1258 if (!lpg)
1259 return -ENOMEM;
1260
1261 lpg->data = of_device_get_match_data(&pdev->dev);
1262 if (!lpg->data)
1263 return -EINVAL;
1264
1265 platform_set_drvdata(pdev, lpg);
1266
1267 lpg->dev = &pdev->dev;
1268 mutex_init(&lpg->lock);
1269
1270 lpg->map = dev_get_regmap(pdev->dev.parent, NULL);
1271 if (!lpg->map)
1272 return dev_err_probe(&pdev->dev, -ENXIO, "parent regmap unavailable\n");
1273
1274 ret = lpg_init_channels(lpg);
1275 if (ret < 0)
1276 return ret;
1277
1278 ret = lpg_parse_dtest(lpg);
1279 if (ret < 0)
1280 return ret;
1281
1282 ret = lpg_init_triled(lpg);
1283 if (ret < 0)
1284 return ret;
1285
1286 ret = lpg_init_lut(lpg);
1287 if (ret < 0)
1288 return ret;
1289
1290 for_each_available_child_of_node(pdev->dev.of_node, np) {
1291 ret = lpg_add_led(lpg, np);
1292 if (ret)
1293 return ret;
1294 }
1295
1296 for (i = 0; i < lpg->num_channels; i++)
1297 lpg_apply_dtest(&lpg->channels[i]);
1298
1299 return lpg_add_pwm(lpg);
1300 }
1301
lpg_remove(struct platform_device * pdev)1302 static int lpg_remove(struct platform_device *pdev)
1303 {
1304 struct lpg *lpg = platform_get_drvdata(pdev);
1305
1306 pwmchip_remove(&lpg->pwm);
1307
1308 return 0;
1309 }
1310
1311 static const struct lpg_data pm8916_pwm_data = {
1312 .num_channels = 1,
1313 .channels = (const struct lpg_channel_data[]) {
1314 { .base = 0xbc00 },
1315 },
1316 };
1317
1318 static const struct lpg_data pm8941_lpg_data = {
1319 .lut_base = 0xb000,
1320 .lut_size = 64,
1321
1322 .triled_base = 0xd000,
1323 .triled_has_atc_ctl = true,
1324 .triled_has_src_sel = true,
1325
1326 .num_channels = 8,
1327 .channels = (const struct lpg_channel_data[]) {
1328 { .base = 0xb100 },
1329 { .base = 0xb200 },
1330 { .base = 0xb300 },
1331 { .base = 0xb400 },
1332 { .base = 0xb500, .triled_mask = BIT(5) },
1333 { .base = 0xb600, .triled_mask = BIT(6) },
1334 { .base = 0xb700, .triled_mask = BIT(7) },
1335 { .base = 0xb800 },
1336 },
1337 };
1338
1339 static const struct lpg_data pm8994_lpg_data = {
1340 .lut_base = 0xb000,
1341 .lut_size = 64,
1342
1343 .num_channels = 6,
1344 .channels = (const struct lpg_channel_data[]) {
1345 { .base = 0xb100 },
1346 { .base = 0xb200 },
1347 { .base = 0xb300 },
1348 { .base = 0xb400 },
1349 { .base = 0xb500 },
1350 { .base = 0xb600 },
1351 },
1352 };
1353
1354 static const struct lpg_data pmi8994_lpg_data = {
1355 .lut_base = 0xb000,
1356 .lut_size = 24,
1357
1358 .triled_base = 0xd000,
1359 .triled_has_atc_ctl = true,
1360 .triled_has_src_sel = true,
1361
1362 .num_channels = 4,
1363 .channels = (const struct lpg_channel_data[]) {
1364 { .base = 0xb100, .triled_mask = BIT(5) },
1365 { .base = 0xb200, .triled_mask = BIT(6) },
1366 { .base = 0xb300, .triled_mask = BIT(7) },
1367 { .base = 0xb400 },
1368 },
1369 };
1370
1371 static const struct lpg_data pmi8998_lpg_data = {
1372 .lut_base = 0xb000,
1373 .lut_size = 49,
1374
1375 .triled_base = 0xd000,
1376
1377 .num_channels = 6,
1378 .channels = (const struct lpg_channel_data[]) {
1379 { .base = 0xb100 },
1380 { .base = 0xb200 },
1381 { .base = 0xb300, .triled_mask = BIT(5) },
1382 { .base = 0xb400, .triled_mask = BIT(6) },
1383 { .base = 0xb500, .triled_mask = BIT(7) },
1384 { .base = 0xb600 },
1385 },
1386 };
1387
1388 static const struct lpg_data pm8150b_lpg_data = {
1389 .lut_base = 0xb000,
1390 .lut_size = 24,
1391
1392 .triled_base = 0xd000,
1393
1394 .num_channels = 2,
1395 .channels = (const struct lpg_channel_data[]) {
1396 { .base = 0xb100, .triled_mask = BIT(7) },
1397 { .base = 0xb200, .triled_mask = BIT(6) },
1398 },
1399 };
1400
1401 static const struct lpg_data pm8150l_lpg_data = {
1402 .lut_base = 0xb000,
1403 .lut_size = 48,
1404
1405 .triled_base = 0xd000,
1406
1407 .num_channels = 5,
1408 .channels = (const struct lpg_channel_data[]) {
1409 { .base = 0xb100, .triled_mask = BIT(7) },
1410 { .base = 0xb200, .triled_mask = BIT(6) },
1411 { .base = 0xb300, .triled_mask = BIT(5) },
1412 { .base = 0xbc00 },
1413 { .base = 0xbd00 },
1414
1415 },
1416 };
1417
1418 static const struct lpg_data pm8350c_pwm_data = {
1419 .triled_base = 0xef00,
1420
1421 .num_channels = 4,
1422 .channels = (const struct lpg_channel_data[]) {
1423 { .base = 0xe800, .triled_mask = BIT(7) },
1424 { .base = 0xe900, .triled_mask = BIT(6) },
1425 { .base = 0xea00, .triled_mask = BIT(5) },
1426 { .base = 0xeb00 },
1427 },
1428 };
1429
1430 static const struct of_device_id lpg_of_table[] = {
1431 { .compatible = "qcom,pm8150b-lpg", .data = &pm8150b_lpg_data },
1432 { .compatible = "qcom,pm8150l-lpg", .data = &pm8150l_lpg_data },
1433 { .compatible = "qcom,pm8350c-pwm", .data = &pm8350c_pwm_data },
1434 { .compatible = "qcom,pm8916-pwm", .data = &pm8916_pwm_data },
1435 { .compatible = "qcom,pm8941-lpg", .data = &pm8941_lpg_data },
1436 { .compatible = "qcom,pm8994-lpg", .data = &pm8994_lpg_data },
1437 { .compatible = "qcom,pmi8994-lpg", .data = &pmi8994_lpg_data },
1438 { .compatible = "qcom,pmi8998-lpg", .data = &pmi8998_lpg_data },
1439 { .compatible = "qcom,pmc8180c-lpg", .data = &pm8150l_lpg_data },
1440 {}
1441 };
1442 MODULE_DEVICE_TABLE(of, lpg_of_table);
1443
1444 static struct platform_driver lpg_driver = {
1445 .probe = lpg_probe,
1446 .remove = lpg_remove,
1447 .driver = {
1448 .name = "qcom-spmi-lpg",
1449 .of_match_table = lpg_of_table,
1450 },
1451 };
1452 module_platform_driver(lpg_driver);
1453
1454 MODULE_DESCRIPTION("Qualcomm LPG LED driver");
1455 MODULE_LICENSE("GPL v2");
1456