1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 * - LSM6DS3:
18 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
21 * - FIFO size: 8KB
22 *
23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
24 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
27 * - FIFO size: 4KB
28 *
29 * - LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP/
30 * LSM6DSTX:
31 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
32 * 833
33 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
34 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
35 * - FIFO size: 3KB
36 *
37 * - LSM9DS1/LSM6DS0:
38 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
39 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
40 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
41 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
42 * - FIFO size: 32
43 *
44 * Copyright 2016 STMicroelectronics Inc.
45 *
46 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
47 * Denis Ciocca <denis.ciocca@st.com>
48 */
49
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/delay.h>
53 #include <linux/iio/events.h>
54 #include <linux/iio/iio.h>
55 #include <linux/iio/sysfs.h>
56 #include <linux/interrupt.h>
57 #include <linux/irq.h>
58 #include <linux/minmax.h>
59 #include <linux/pm.h>
60 #include <linux/property.h>
61 #include <linux/regmap.h>
62 #include <linux/bitfield.h>
63
64 #include <linux/platform_data/st_sensors_pdata.h>
65
66 #include "st_lsm6dsx.h"
67
68 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
69
70 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */
71
72 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
73 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
74 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
75 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
76 IIO_CHAN_SOFT_TIMESTAMP(3),
77 };
78
79 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
80 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
81 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
82 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
83 IIO_CHAN_SOFT_TIMESTAMP(3),
84 };
85
86 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
87 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
88 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
89 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
90 IIO_CHAN_SOFT_TIMESTAMP(3),
91 };
92
93 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
94 {
95 .reset = {
96 .addr = 0x22,
97 .mask = BIT(0),
98 },
99 .boot = {
100 .addr = 0x22,
101 .mask = BIT(7),
102 },
103 .bdu = {
104 .addr = 0x22,
105 .mask = BIT(6),
106 },
107 .id = {
108 {
109 .hw_id = ST_LSM9DS1_ID,
110 .name = ST_LSM9DS1_DEV_NAME,
111 .wai = 0x68,
112 }, {
113 .hw_id = ST_LSM6DS0_ID,
114 .name = ST_LSM6DS0_DEV_NAME,
115 .wai = 0x68,
116 },
117 },
118 .channels = {
119 [ST_LSM6DSX_ID_ACC] = {
120 .chan = st_lsm6dsx_acc_channels,
121 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
122 },
123 [ST_LSM6DSX_ID_GYRO] = {
124 .chan = st_lsm6ds0_gyro_channels,
125 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
126 },
127 },
128 .odr_table = {
129 [ST_LSM6DSX_ID_ACC] = {
130 .reg = {
131 .addr = 0x20,
132 .mask = GENMASK(7, 5),
133 },
134 .odr_avl[0] = { 10000, 0x01 },
135 .odr_avl[1] = { 50000, 0x02 },
136 .odr_avl[2] = { 119000, 0x03 },
137 .odr_avl[3] = { 238000, 0x04 },
138 .odr_avl[4] = { 476000, 0x05 },
139 .odr_avl[5] = { 952000, 0x06 },
140 .odr_len = 6,
141 },
142 [ST_LSM6DSX_ID_GYRO] = {
143 .reg = {
144 .addr = 0x10,
145 .mask = GENMASK(7, 5),
146 },
147 .odr_avl[0] = { 14900, 0x01 },
148 .odr_avl[1] = { 59500, 0x02 },
149 .odr_avl[2] = { 119000, 0x03 },
150 .odr_avl[3] = { 238000, 0x04 },
151 .odr_avl[4] = { 476000, 0x05 },
152 .odr_avl[5] = { 952000, 0x06 },
153 .odr_len = 6,
154 },
155 },
156 .fs_table = {
157 [ST_LSM6DSX_ID_ACC] = {
158 .reg = {
159 .addr = 0x20,
160 .mask = GENMASK(4, 3),
161 },
162 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
163 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
164 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
165 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
166 .fs_len = 4,
167 },
168 [ST_LSM6DSX_ID_GYRO] = {
169 .reg = {
170 .addr = 0x10,
171 .mask = GENMASK(4, 3),
172 },
173
174 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
175 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
176 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
177 .fs_len = 3,
178 },
179 },
180 .irq_config = {
181 .irq1 = {
182 .addr = 0x0c,
183 .mask = BIT(3),
184 },
185 .irq2 = {
186 .addr = 0x0d,
187 .mask = BIT(3),
188 },
189 .hla = {
190 .addr = 0x22,
191 .mask = BIT(5),
192 },
193 .od = {
194 .addr = 0x22,
195 .mask = BIT(4),
196 },
197 },
198 .fifo_ops = {
199 .max_size = 32,
200 },
201 },
202 {
203 .reset = {
204 .addr = 0x12,
205 .mask = BIT(0),
206 },
207 .boot = {
208 .addr = 0x12,
209 .mask = BIT(7),
210 },
211 .bdu = {
212 .addr = 0x12,
213 .mask = BIT(6),
214 },
215 .id = {
216 {
217 .hw_id = ST_LSM6DS3_ID,
218 .name = ST_LSM6DS3_DEV_NAME,
219 .wai = 0x69,
220 },
221 },
222 .channels = {
223 [ST_LSM6DSX_ID_ACC] = {
224 .chan = st_lsm6dsx_acc_channels,
225 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
226 },
227 [ST_LSM6DSX_ID_GYRO] = {
228 .chan = st_lsm6dsx_gyro_channels,
229 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
230 },
231 },
232 .odr_table = {
233 [ST_LSM6DSX_ID_ACC] = {
234 .reg = {
235 .addr = 0x10,
236 .mask = GENMASK(7, 4),
237 },
238 .odr_avl[0] = { 12500, 0x01 },
239 .odr_avl[1] = { 26000, 0x02 },
240 .odr_avl[2] = { 52000, 0x03 },
241 .odr_avl[3] = { 104000, 0x04 },
242 .odr_avl[4] = { 208000, 0x05 },
243 .odr_avl[5] = { 416000, 0x06 },
244 .odr_len = 6,
245 },
246 [ST_LSM6DSX_ID_GYRO] = {
247 .reg = {
248 .addr = 0x11,
249 .mask = GENMASK(7, 4),
250 },
251 .odr_avl[0] = { 12500, 0x01 },
252 .odr_avl[1] = { 26000, 0x02 },
253 .odr_avl[2] = { 52000, 0x03 },
254 .odr_avl[3] = { 104000, 0x04 },
255 .odr_avl[4] = { 208000, 0x05 },
256 .odr_avl[5] = { 416000, 0x06 },
257 .odr_len = 6,
258 },
259 },
260 .fs_table = {
261 [ST_LSM6DSX_ID_ACC] = {
262 .reg = {
263 .addr = 0x10,
264 .mask = GENMASK(3, 2),
265 },
266 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
267 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
268 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
269 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
270 .fs_len = 4,
271 },
272 [ST_LSM6DSX_ID_GYRO] = {
273 .reg = {
274 .addr = 0x11,
275 .mask = GENMASK(3, 2),
276 },
277 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
278 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
279 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
280 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
281 .fs_len = 4,
282 },
283 },
284 .irq_config = {
285 .irq1 = {
286 .addr = 0x0d,
287 .mask = BIT(3),
288 },
289 .irq2 = {
290 .addr = 0x0e,
291 .mask = BIT(3),
292 },
293 .lir = {
294 .addr = 0x58,
295 .mask = BIT(0),
296 },
297 .irq1_func = {
298 .addr = 0x5e,
299 .mask = BIT(5),
300 },
301 .irq2_func = {
302 .addr = 0x5f,
303 .mask = BIT(5),
304 },
305 .hla = {
306 .addr = 0x12,
307 .mask = BIT(5),
308 },
309 .od = {
310 .addr = 0x12,
311 .mask = BIT(4),
312 },
313 },
314 .decimator = {
315 [ST_LSM6DSX_ID_ACC] = {
316 .addr = 0x08,
317 .mask = GENMASK(2, 0),
318 },
319 [ST_LSM6DSX_ID_GYRO] = {
320 .addr = 0x08,
321 .mask = GENMASK(5, 3),
322 },
323 },
324 .fifo_ops = {
325 .update_fifo = st_lsm6dsx_update_fifo,
326 .read_fifo = st_lsm6dsx_read_fifo,
327 .fifo_th = {
328 .addr = 0x06,
329 .mask = GENMASK(11, 0),
330 },
331 .fifo_diff = {
332 .addr = 0x3a,
333 .mask = GENMASK(11, 0),
334 },
335 .max_size = 1365,
336 .th_wl = 3, /* 1LSB = 2B */
337 },
338 .ts_settings = {
339 .timer_en = {
340 .addr = 0x58,
341 .mask = BIT(7),
342 },
343 .hr_timer = {
344 .addr = 0x5c,
345 .mask = BIT(4),
346 },
347 .fifo_en = {
348 .addr = 0x07,
349 .mask = BIT(7),
350 },
351 .decimator = {
352 .addr = 0x09,
353 .mask = GENMASK(5, 3),
354 },
355 },
356 .event_settings = {
357 .wakeup_reg = {
358 .addr = 0x5B,
359 .mask = GENMASK(5, 0),
360 },
361 .wakeup_src_reg = 0x1b,
362 .wakeup_src_status_mask = BIT(3),
363 .wakeup_src_z_mask = BIT(0),
364 .wakeup_src_y_mask = BIT(1),
365 .wakeup_src_x_mask = BIT(2),
366 },
367 },
368 {
369 .reset = {
370 .addr = 0x12,
371 .mask = BIT(0),
372 },
373 .boot = {
374 .addr = 0x12,
375 .mask = BIT(7),
376 },
377 .bdu = {
378 .addr = 0x12,
379 .mask = BIT(6),
380 },
381 .id = {
382 {
383 .hw_id = ST_LSM6DS3H_ID,
384 .name = ST_LSM6DS3H_DEV_NAME,
385 .wai = 0x69,
386 },
387 },
388 .channels = {
389 [ST_LSM6DSX_ID_ACC] = {
390 .chan = st_lsm6dsx_acc_channels,
391 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
392 },
393 [ST_LSM6DSX_ID_GYRO] = {
394 .chan = st_lsm6dsx_gyro_channels,
395 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
396 },
397 },
398 .odr_table = {
399 [ST_LSM6DSX_ID_ACC] = {
400 .reg = {
401 .addr = 0x10,
402 .mask = GENMASK(7, 4),
403 },
404 .odr_avl[0] = { 12500, 0x01 },
405 .odr_avl[1] = { 26000, 0x02 },
406 .odr_avl[2] = { 52000, 0x03 },
407 .odr_avl[3] = { 104000, 0x04 },
408 .odr_avl[4] = { 208000, 0x05 },
409 .odr_avl[5] = { 416000, 0x06 },
410 .odr_len = 6,
411 },
412 [ST_LSM6DSX_ID_GYRO] = {
413 .reg = {
414 .addr = 0x11,
415 .mask = GENMASK(7, 4),
416 },
417 .odr_avl[0] = { 12500, 0x01 },
418 .odr_avl[1] = { 26000, 0x02 },
419 .odr_avl[2] = { 52000, 0x03 },
420 .odr_avl[3] = { 104000, 0x04 },
421 .odr_avl[4] = { 208000, 0x05 },
422 .odr_avl[5] = { 416000, 0x06 },
423 .odr_len = 6,
424 },
425 },
426 .fs_table = {
427 [ST_LSM6DSX_ID_ACC] = {
428 .reg = {
429 .addr = 0x10,
430 .mask = GENMASK(3, 2),
431 },
432 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
433 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
434 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
435 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
436 .fs_len = 4,
437 },
438 [ST_LSM6DSX_ID_GYRO] = {
439 .reg = {
440 .addr = 0x11,
441 .mask = GENMASK(3, 2),
442 },
443 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
444 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
445 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
446 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
447 .fs_len = 4,
448 },
449 },
450 .irq_config = {
451 .irq1 = {
452 .addr = 0x0d,
453 .mask = BIT(3),
454 },
455 .irq2 = {
456 .addr = 0x0e,
457 .mask = BIT(3),
458 },
459 .lir = {
460 .addr = 0x58,
461 .mask = BIT(0),
462 },
463 .irq1_func = {
464 .addr = 0x5e,
465 .mask = BIT(5),
466 },
467 .irq2_func = {
468 .addr = 0x5f,
469 .mask = BIT(5),
470 },
471 .hla = {
472 .addr = 0x12,
473 .mask = BIT(5),
474 },
475 .od = {
476 .addr = 0x12,
477 .mask = BIT(4),
478 },
479 },
480 .decimator = {
481 [ST_LSM6DSX_ID_ACC] = {
482 .addr = 0x08,
483 .mask = GENMASK(2, 0),
484 },
485 [ST_LSM6DSX_ID_GYRO] = {
486 .addr = 0x08,
487 .mask = GENMASK(5, 3),
488 },
489 },
490 .fifo_ops = {
491 .update_fifo = st_lsm6dsx_update_fifo,
492 .read_fifo = st_lsm6dsx_read_fifo,
493 .fifo_th = {
494 .addr = 0x06,
495 .mask = GENMASK(11, 0),
496 },
497 .fifo_diff = {
498 .addr = 0x3a,
499 .mask = GENMASK(11, 0),
500 },
501 .max_size = 682,
502 .th_wl = 3, /* 1LSB = 2B */
503 },
504 .ts_settings = {
505 .timer_en = {
506 .addr = 0x58,
507 .mask = BIT(7),
508 },
509 .hr_timer = {
510 .addr = 0x5c,
511 .mask = BIT(4),
512 },
513 .fifo_en = {
514 .addr = 0x07,
515 .mask = BIT(7),
516 },
517 .decimator = {
518 .addr = 0x09,
519 .mask = GENMASK(5, 3),
520 },
521 },
522 .event_settings = {
523 .wakeup_reg = {
524 .addr = 0x5B,
525 .mask = GENMASK(5, 0),
526 },
527 .wakeup_src_reg = 0x1b,
528 .wakeup_src_status_mask = BIT(3),
529 .wakeup_src_z_mask = BIT(0),
530 .wakeup_src_y_mask = BIT(1),
531 .wakeup_src_x_mask = BIT(2),
532 },
533 },
534 {
535 .reset = {
536 .addr = 0x12,
537 .mask = BIT(0),
538 },
539 .boot = {
540 .addr = 0x12,
541 .mask = BIT(7),
542 },
543 .bdu = {
544 .addr = 0x12,
545 .mask = BIT(6),
546 },
547 .id = {
548 {
549 .hw_id = ST_LSM6DSL_ID,
550 .name = ST_LSM6DSL_DEV_NAME,
551 .wai = 0x6a,
552 }, {
553 .hw_id = ST_LSM6DSM_ID,
554 .name = ST_LSM6DSM_DEV_NAME,
555 .wai = 0x6a,
556 }, {
557 .hw_id = ST_ISM330DLC_ID,
558 .name = ST_ISM330DLC_DEV_NAME,
559 .wai = 0x6a,
560 }, {
561 .hw_id = ST_LSM6DS3TRC_ID,
562 .name = ST_LSM6DS3TRC_DEV_NAME,
563 .wai = 0x6a,
564 },
565 },
566 .channels = {
567 [ST_LSM6DSX_ID_ACC] = {
568 .chan = st_lsm6dsx_acc_channels,
569 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
570 },
571 [ST_LSM6DSX_ID_GYRO] = {
572 .chan = st_lsm6dsx_gyro_channels,
573 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
574 },
575 },
576 .odr_table = {
577 [ST_LSM6DSX_ID_ACC] = {
578 .reg = {
579 .addr = 0x10,
580 .mask = GENMASK(7, 4),
581 },
582 .odr_avl[0] = { 12500, 0x01 },
583 .odr_avl[1] = { 26000, 0x02 },
584 .odr_avl[2] = { 52000, 0x03 },
585 .odr_avl[3] = { 104000, 0x04 },
586 .odr_avl[4] = { 208000, 0x05 },
587 .odr_avl[5] = { 416000, 0x06 },
588 .odr_len = 6,
589 },
590 [ST_LSM6DSX_ID_GYRO] = {
591 .reg = {
592 .addr = 0x11,
593 .mask = GENMASK(7, 4),
594 },
595 .odr_avl[0] = { 12500, 0x01 },
596 .odr_avl[1] = { 26000, 0x02 },
597 .odr_avl[2] = { 52000, 0x03 },
598 .odr_avl[3] = { 104000, 0x04 },
599 .odr_avl[4] = { 208000, 0x05 },
600 .odr_avl[5] = { 416000, 0x06 },
601 .odr_len = 6,
602 },
603 },
604 .fs_table = {
605 [ST_LSM6DSX_ID_ACC] = {
606 .reg = {
607 .addr = 0x10,
608 .mask = GENMASK(3, 2),
609 },
610 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
611 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
612 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
613 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
614 .fs_len = 4,
615 },
616 [ST_LSM6DSX_ID_GYRO] = {
617 .reg = {
618 .addr = 0x11,
619 .mask = GENMASK(3, 2),
620 },
621 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
622 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
623 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
624 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
625 .fs_len = 4,
626 },
627 },
628 .irq_config = {
629 .irq1 = {
630 .addr = 0x0d,
631 .mask = BIT(3),
632 },
633 .irq2 = {
634 .addr = 0x0e,
635 .mask = BIT(3),
636 },
637 .lir = {
638 .addr = 0x58,
639 .mask = BIT(0),
640 },
641 .irq1_func = {
642 .addr = 0x5e,
643 .mask = BIT(5),
644 },
645 .irq2_func = {
646 .addr = 0x5f,
647 .mask = BIT(5),
648 },
649 .hla = {
650 .addr = 0x12,
651 .mask = BIT(5),
652 },
653 .od = {
654 .addr = 0x12,
655 .mask = BIT(4),
656 },
657 },
658 .decimator = {
659 [ST_LSM6DSX_ID_ACC] = {
660 .addr = 0x08,
661 .mask = GENMASK(2, 0),
662 },
663 [ST_LSM6DSX_ID_GYRO] = {
664 .addr = 0x08,
665 .mask = GENMASK(5, 3),
666 },
667 [ST_LSM6DSX_ID_EXT0] = {
668 .addr = 0x09,
669 .mask = GENMASK(2, 0),
670 },
671 },
672 .fifo_ops = {
673 .update_fifo = st_lsm6dsx_update_fifo,
674 .read_fifo = st_lsm6dsx_read_fifo,
675 .fifo_th = {
676 .addr = 0x06,
677 .mask = GENMASK(10, 0),
678 },
679 .fifo_diff = {
680 .addr = 0x3a,
681 .mask = GENMASK(10, 0),
682 },
683 .max_size = 682,
684 .th_wl = 3, /* 1LSB = 2B */
685 },
686 .ts_settings = {
687 .timer_en = {
688 .addr = 0x19,
689 .mask = BIT(5),
690 },
691 .hr_timer = {
692 .addr = 0x5c,
693 .mask = BIT(4),
694 },
695 .fifo_en = {
696 .addr = 0x07,
697 .mask = BIT(7),
698 },
699 .decimator = {
700 .addr = 0x09,
701 .mask = GENMASK(5, 3),
702 },
703 },
704 .shub_settings = {
705 .page_mux = {
706 .addr = 0x01,
707 .mask = BIT(7),
708 },
709 .master_en = {
710 .addr = 0x1a,
711 .mask = BIT(0),
712 },
713 .pullup_en = {
714 .addr = 0x1a,
715 .mask = BIT(3),
716 },
717 .aux_sens = {
718 .addr = 0x04,
719 .mask = GENMASK(5, 4),
720 },
721 .wr_once = {
722 .addr = 0x07,
723 .mask = BIT(5),
724 },
725 .emb_func = {
726 .addr = 0x19,
727 .mask = BIT(2),
728 },
729 .num_ext_dev = 1,
730 .shub_out = {
731 .addr = 0x2e,
732 },
733 .slv0_addr = 0x02,
734 .dw_slv0_addr = 0x0e,
735 .pause = 0x7,
736 },
737 .event_settings = {
738 .enable_reg = {
739 .addr = 0x58,
740 .mask = BIT(7),
741 },
742 .wakeup_reg = {
743 .addr = 0x5B,
744 .mask = GENMASK(5, 0),
745 },
746 .wakeup_src_reg = 0x1b,
747 .wakeup_src_status_mask = BIT(3),
748 .wakeup_src_z_mask = BIT(0),
749 .wakeup_src_y_mask = BIT(1),
750 .wakeup_src_x_mask = BIT(2),
751 },
752 },
753 {
754 .reset = {
755 .addr = 0x12,
756 .mask = BIT(0),
757 },
758 .boot = {
759 .addr = 0x12,
760 .mask = BIT(7),
761 },
762 .bdu = {
763 .addr = 0x12,
764 .mask = BIT(6),
765 },
766 .id = {
767 {
768 .hw_id = ST_LSM6DSR_ID,
769 .name = ST_LSM6DSR_DEV_NAME,
770 .wai = 0x6b,
771 }, {
772 .hw_id = ST_ISM330DHCX_ID,
773 .name = ST_ISM330DHCX_DEV_NAME,
774 .wai = 0x6b,
775 }, {
776 .hw_id = ST_LSM6DSRX_ID,
777 .name = ST_LSM6DSRX_DEV_NAME,
778 .wai = 0x6b,
779 }, {
780 .hw_id = ST_LSM6DSO_ID,
781 .name = ST_LSM6DSO_DEV_NAME,
782 .wai = 0x6c,
783 }, {
784 .hw_id = ST_LSM6DSOX_ID,
785 .name = ST_LSM6DSOX_DEV_NAME,
786 .wai = 0x6c,
787 }, {
788 .hw_id = ST_LSM6DST_ID,
789 .name = ST_LSM6DST_DEV_NAME,
790 .wai = 0x6d,
791 }, {
792 .hw_id = ST_ASM330LHHX_ID,
793 .name = ST_ASM330LHHX_DEV_NAME,
794 .wai = 0x6b,
795 }, {
796 .hw_id = ST_LSM6DSTX_ID,
797 .name = ST_LSM6DSTX_DEV_NAME,
798 .wai = 0x6d,
799 },
800 },
801 .channels = {
802 [ST_LSM6DSX_ID_ACC] = {
803 .chan = st_lsm6dsx_acc_channels,
804 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
805 },
806 [ST_LSM6DSX_ID_GYRO] = {
807 .chan = st_lsm6dsx_gyro_channels,
808 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
809 },
810 },
811 .drdy_mask = {
812 .addr = 0x13,
813 .mask = BIT(3),
814 },
815 .odr_table = {
816 [ST_LSM6DSX_ID_ACC] = {
817 .reg = {
818 .addr = 0x10,
819 .mask = GENMASK(7, 4),
820 },
821 .odr_avl[0] = { 12500, 0x01 },
822 .odr_avl[1] = { 26000, 0x02 },
823 .odr_avl[2] = { 52000, 0x03 },
824 .odr_avl[3] = { 104000, 0x04 },
825 .odr_avl[4] = { 208000, 0x05 },
826 .odr_avl[5] = { 416000, 0x06 },
827 .odr_avl[6] = { 833000, 0x07 },
828 .odr_len = 7,
829 },
830 [ST_LSM6DSX_ID_GYRO] = {
831 .reg = {
832 .addr = 0x11,
833 .mask = GENMASK(7, 4),
834 },
835 .odr_avl[0] = { 12500, 0x01 },
836 .odr_avl[1] = { 26000, 0x02 },
837 .odr_avl[2] = { 52000, 0x03 },
838 .odr_avl[3] = { 104000, 0x04 },
839 .odr_avl[4] = { 208000, 0x05 },
840 .odr_avl[5] = { 416000, 0x06 },
841 .odr_avl[6] = { 833000, 0x07 },
842 .odr_len = 7,
843 },
844 },
845 .fs_table = {
846 [ST_LSM6DSX_ID_ACC] = {
847 .reg = {
848 .addr = 0x10,
849 .mask = GENMASK(3, 2),
850 },
851 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
852 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
853 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
854 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
855 .fs_len = 4,
856 },
857 [ST_LSM6DSX_ID_GYRO] = {
858 .reg = {
859 .addr = 0x11,
860 .mask = GENMASK(3, 2),
861 },
862 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
863 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
864 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
865 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
866 .fs_len = 4,
867 },
868 },
869 .irq_config = {
870 .irq1 = {
871 .addr = 0x0d,
872 .mask = BIT(3),
873 },
874 .irq2 = {
875 .addr = 0x0e,
876 .mask = BIT(3),
877 },
878 .lir = {
879 .addr = 0x56,
880 .mask = BIT(0),
881 },
882 .clear_on_read = {
883 .addr = 0x56,
884 .mask = BIT(6),
885 },
886 .irq1_func = {
887 .addr = 0x5e,
888 .mask = BIT(5),
889 },
890 .irq2_func = {
891 .addr = 0x5f,
892 .mask = BIT(5),
893 },
894 .hla = {
895 .addr = 0x12,
896 .mask = BIT(5),
897 },
898 .od = {
899 .addr = 0x12,
900 .mask = BIT(4),
901 },
902 },
903 .batch = {
904 [ST_LSM6DSX_ID_ACC] = {
905 .addr = 0x09,
906 .mask = GENMASK(3, 0),
907 },
908 [ST_LSM6DSX_ID_GYRO] = {
909 .addr = 0x09,
910 .mask = GENMASK(7, 4),
911 },
912 },
913 .fifo_ops = {
914 .update_fifo = st_lsm6dsx_update_fifo,
915 .read_fifo = st_lsm6dsx_read_tagged_fifo,
916 .fifo_th = {
917 .addr = 0x07,
918 .mask = GENMASK(8, 0),
919 },
920 .fifo_diff = {
921 .addr = 0x3a,
922 .mask = GENMASK(9, 0),
923 },
924 .max_size = 512,
925 .th_wl = 1,
926 },
927 .ts_settings = {
928 .timer_en = {
929 .addr = 0x19,
930 .mask = BIT(5),
931 },
932 .decimator = {
933 .addr = 0x0a,
934 .mask = GENMASK(7, 6),
935 },
936 .freq_fine = 0x63,
937 },
938 .shub_settings = {
939 .page_mux = {
940 .addr = 0x01,
941 .mask = BIT(6),
942 },
943 .master_en = {
944 .sec_page = true,
945 .addr = 0x14,
946 .mask = BIT(2),
947 },
948 .pullup_en = {
949 .sec_page = true,
950 .addr = 0x14,
951 .mask = BIT(3),
952 },
953 .aux_sens = {
954 .addr = 0x14,
955 .mask = GENMASK(1, 0),
956 },
957 .wr_once = {
958 .addr = 0x14,
959 .mask = BIT(6),
960 },
961 .num_ext_dev = 3,
962 .shub_out = {
963 .sec_page = true,
964 .addr = 0x02,
965 },
966 .slv0_addr = 0x15,
967 .dw_slv0_addr = 0x21,
968 .batch_en = BIT(3),
969 },
970 .event_settings = {
971 .enable_reg = {
972 .addr = 0x58,
973 .mask = BIT(7),
974 },
975 .wakeup_reg = {
976 .addr = 0x5b,
977 .mask = GENMASK(5, 0),
978 },
979 .wakeup_src_reg = 0x1b,
980 .wakeup_src_status_mask = BIT(3),
981 .wakeup_src_z_mask = BIT(0),
982 .wakeup_src_y_mask = BIT(1),
983 .wakeup_src_x_mask = BIT(2),
984 },
985 },
986 {
987 .reset = {
988 .addr = 0x12,
989 .mask = BIT(0),
990 },
991 .boot = {
992 .addr = 0x12,
993 .mask = BIT(7),
994 },
995 .bdu = {
996 .addr = 0x12,
997 .mask = BIT(6),
998 },
999 .id = {
1000 {
1001 .hw_id = ST_ASM330LHH_ID,
1002 .name = ST_ASM330LHH_DEV_NAME,
1003 .wai = 0x6b,
1004 }, {
1005 .hw_id = ST_LSM6DSOP_ID,
1006 .name = ST_LSM6DSOP_DEV_NAME,
1007 .wai = 0x6c,
1008 },
1009 },
1010 .channels = {
1011 [ST_LSM6DSX_ID_ACC] = {
1012 .chan = st_lsm6dsx_acc_channels,
1013 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1014 },
1015 [ST_LSM6DSX_ID_GYRO] = {
1016 .chan = st_lsm6dsx_gyro_channels,
1017 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1018 },
1019 },
1020 .drdy_mask = {
1021 .addr = 0x13,
1022 .mask = BIT(3),
1023 },
1024 .odr_table = {
1025 [ST_LSM6DSX_ID_ACC] = {
1026 .reg = {
1027 .addr = 0x10,
1028 .mask = GENMASK(7, 4),
1029 },
1030 .odr_avl[0] = { 12500, 0x01 },
1031 .odr_avl[1] = { 26000, 0x02 },
1032 .odr_avl[2] = { 52000, 0x03 },
1033 .odr_avl[3] = { 104000, 0x04 },
1034 .odr_avl[4] = { 208000, 0x05 },
1035 .odr_avl[5] = { 416000, 0x06 },
1036 .odr_avl[6] = { 833000, 0x07 },
1037 .odr_len = 7,
1038 },
1039 [ST_LSM6DSX_ID_GYRO] = {
1040 .reg = {
1041 .addr = 0x11,
1042 .mask = GENMASK(7, 4),
1043 },
1044 .odr_avl[0] = { 12500, 0x01 },
1045 .odr_avl[1] = { 26000, 0x02 },
1046 .odr_avl[2] = { 52000, 0x03 },
1047 .odr_avl[3] = { 104000, 0x04 },
1048 .odr_avl[4] = { 208000, 0x05 },
1049 .odr_avl[5] = { 416000, 0x06 },
1050 .odr_avl[6] = { 833000, 0x07 },
1051 .odr_len = 7,
1052 },
1053 },
1054 .fs_table = {
1055 [ST_LSM6DSX_ID_ACC] = {
1056 .reg = {
1057 .addr = 0x10,
1058 .mask = GENMASK(3, 2),
1059 },
1060 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1061 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1062 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1063 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1064 .fs_len = 4,
1065 },
1066 [ST_LSM6DSX_ID_GYRO] = {
1067 .reg = {
1068 .addr = 0x11,
1069 .mask = GENMASK(3, 2),
1070 },
1071 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1072 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1073 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1074 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1075 .fs_len = 4,
1076 },
1077 },
1078 .irq_config = {
1079 .irq1 = {
1080 .addr = 0x0d,
1081 .mask = BIT(3),
1082 },
1083 .irq2 = {
1084 .addr = 0x0e,
1085 .mask = BIT(3),
1086 },
1087 .lir = {
1088 .addr = 0x56,
1089 .mask = BIT(0),
1090 },
1091 .clear_on_read = {
1092 .addr = 0x56,
1093 .mask = BIT(6),
1094 },
1095 .irq1_func = {
1096 .addr = 0x5e,
1097 .mask = BIT(5),
1098 },
1099 .irq2_func = {
1100 .addr = 0x5f,
1101 .mask = BIT(5),
1102 },
1103 .hla = {
1104 .addr = 0x12,
1105 .mask = BIT(5),
1106 },
1107 .od = {
1108 .addr = 0x12,
1109 .mask = BIT(4),
1110 },
1111 },
1112 .batch = {
1113 [ST_LSM6DSX_ID_ACC] = {
1114 .addr = 0x09,
1115 .mask = GENMASK(3, 0),
1116 },
1117 [ST_LSM6DSX_ID_GYRO] = {
1118 .addr = 0x09,
1119 .mask = GENMASK(7, 4),
1120 },
1121 },
1122 .fifo_ops = {
1123 .update_fifo = st_lsm6dsx_update_fifo,
1124 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1125 .fifo_th = {
1126 .addr = 0x07,
1127 .mask = GENMASK(8, 0),
1128 },
1129 .fifo_diff = {
1130 .addr = 0x3a,
1131 .mask = GENMASK(9, 0),
1132 },
1133 .max_size = 512,
1134 .th_wl = 1,
1135 },
1136 .ts_settings = {
1137 .timer_en = {
1138 .addr = 0x19,
1139 .mask = BIT(5),
1140 },
1141 .decimator = {
1142 .addr = 0x0a,
1143 .mask = GENMASK(7, 6),
1144 },
1145 .freq_fine = 0x63,
1146 },
1147 .event_settings = {
1148 .enable_reg = {
1149 .addr = 0x58,
1150 .mask = BIT(7),
1151 },
1152 .wakeup_reg = {
1153 .addr = 0x5B,
1154 .mask = GENMASK(5, 0),
1155 },
1156 .wakeup_src_reg = 0x1b,
1157 .wakeup_src_status_mask = BIT(3),
1158 .wakeup_src_z_mask = BIT(0),
1159 .wakeup_src_y_mask = BIT(1),
1160 .wakeup_src_x_mask = BIT(2),
1161 },
1162 },
1163 };
1164
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)1165 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1166 {
1167 const struct st_lsm6dsx_shub_settings *hub_settings;
1168 unsigned int data;
1169 int err;
1170
1171 hub_settings = &hw->settings->shub_settings;
1172 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1173 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1174 hub_settings->page_mux.mask, data);
1175 usleep_range(100, 150);
1176
1177 return err;
1178 }
1179
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)1180 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1181 const char **name)
1182 {
1183 int err, i, j, data;
1184
1185 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1186 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1187 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1188 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1189 break;
1190 }
1191 if (j < ST_LSM6DSX_MAX_ID)
1192 break;
1193 }
1194
1195 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1196 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1197 return -ENODEV;
1198 }
1199
1200 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1201 if (err < 0) {
1202 dev_err(hw->dev, "failed to read whoami register\n");
1203 return err;
1204 }
1205
1206 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1207 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1208 return -ENODEV;
1209 }
1210
1211 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1212 hw->settings = &st_lsm6dsx_sensor_settings[i];
1213
1214 return 0;
1215 }
1216
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)1217 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1218 u32 gain)
1219 {
1220 const struct st_lsm6dsx_fs_table_entry *fs_table;
1221 unsigned int data;
1222 int i, err;
1223
1224 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1225 for (i = 0; i < fs_table->fs_len; i++) {
1226 if (fs_table->fs_avl[i].gain == gain)
1227 break;
1228 }
1229
1230 if (i == fs_table->fs_len)
1231 return -EINVAL;
1232
1233 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1234 fs_table->reg.mask);
1235 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1236 fs_table->reg.mask, data);
1237 if (err < 0)
1238 return err;
1239
1240 sensor->gain = gain;
1241
1242 return 0;
1243 }
1244
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u32 odr,u8 * val)1245 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1246 {
1247 const struct st_lsm6dsx_odr_table_entry *odr_table;
1248 int i;
1249
1250 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1251 for (i = 0; i < odr_table->odr_len; i++) {
1252 /*
1253 * ext devices can run at different odr respect to
1254 * accel sensor
1255 */
1256 if (odr_table->odr_avl[i].milli_hz >= odr)
1257 break;
1258 }
1259
1260 if (i == odr_table->odr_len)
1261 return -EINVAL;
1262
1263 *val = odr_table->odr_avl[i].val;
1264 return odr_table->odr_avl[i].milli_hz;
1265 }
1266
1267 static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u32 odr,enum st_lsm6dsx_sensor_id id)1268 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1269 enum st_lsm6dsx_sensor_id id)
1270 {
1271 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1272
1273 if (odr > 0) {
1274 if (hw->enable_mask & BIT(id))
1275 return max_t(u32, ref->odr, odr);
1276 else
1277 return odr;
1278 } else {
1279 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1280 }
1281 }
1282
1283 static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u32 req_odr)1284 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1285 {
1286 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1287 struct st_lsm6dsx_hw *hw = sensor->hw;
1288 const struct st_lsm6dsx_reg *reg;
1289 unsigned int data;
1290 u8 val = 0;
1291 int err;
1292
1293 switch (sensor->id) {
1294 case ST_LSM6DSX_ID_GYRO:
1295 break;
1296 case ST_LSM6DSX_ID_EXT0:
1297 case ST_LSM6DSX_ID_EXT1:
1298 case ST_LSM6DSX_ID_EXT2:
1299 case ST_LSM6DSX_ID_ACC: {
1300 u32 odr;
1301 int i;
1302
1303 /*
1304 * i2c embedded controller relies on the accelerometer sensor as
1305 * bus read/write trigger so we need to enable accel device
1306 * at odr = max(accel_odr, ext_odr) in order to properly
1307 * communicate with i2c slave devices
1308 */
1309 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1310 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1311 if (!hw->iio_devs[i] || i == sensor->id)
1312 continue;
1313
1314 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1315 if (odr != req_odr)
1316 /* device already configured */
1317 return 0;
1318 }
1319 break;
1320 }
1321 default: /* should never occur */
1322 return -EINVAL;
1323 }
1324
1325 if (req_odr > 0) {
1326 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1327 if (err < 0)
1328 return err;
1329 }
1330
1331 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1332 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1333 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1334 }
1335
1336 static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1337 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1338 bool enable)
1339 {
1340 struct st_lsm6dsx_hw *hw = sensor->hw;
1341 u32 odr = enable ? sensor->odr : 0;
1342 int err;
1343
1344 err = st_lsm6dsx_set_odr(sensor, odr);
1345 if (err < 0)
1346 return err;
1347
1348 if (enable)
1349 hw->enable_mask |= BIT(sensor->id);
1350 else
1351 hw->enable_mask &= ~BIT(sensor->id);
1352
1353 return 0;
1354 }
1355
1356 static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor * sensor,bool enable)1357 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1358 {
1359 struct st_lsm6dsx_hw *hw = sensor->hw;
1360
1361 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1362 return 0;
1363
1364 return hw->enable_event;
1365 }
1366
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1367 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1368 bool enable)
1369 {
1370 if (st_lsm6dsx_check_events(sensor, enable))
1371 return 0;
1372
1373 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1374 }
1375
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1376 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1377 u8 addr, int *val)
1378 {
1379 struct st_lsm6dsx_hw *hw = sensor->hw;
1380 int err, delay;
1381 __le16 data;
1382
1383 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1384 if (err < 0)
1385 return err;
1386
1387 /*
1388 * we need to wait for sensor settling time before
1389 * reading data in order to avoid corrupted samples
1390 */
1391 delay = 1000000000 / sensor->odr;
1392 usleep_range(3 * delay, 4 * delay);
1393
1394 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1395 if (err < 0)
1396 return err;
1397
1398 if (!hw->enable_event) {
1399 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1400 if (err < 0)
1401 return err;
1402 }
1403
1404 *val = (s16)le16_to_cpu(data);
1405
1406 return IIO_VAL_INT;
1407 }
1408
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1409 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1410 struct iio_chan_spec const *ch,
1411 int *val, int *val2, long mask)
1412 {
1413 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1414 int ret;
1415
1416 switch (mask) {
1417 case IIO_CHAN_INFO_RAW:
1418 ret = iio_device_claim_direct_mode(iio_dev);
1419 if (ret)
1420 break;
1421
1422 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1423 iio_device_release_direct_mode(iio_dev);
1424 break;
1425 case IIO_CHAN_INFO_SAMP_FREQ:
1426 *val = sensor->odr / 1000;
1427 *val2 = (sensor->odr % 1000) * 1000;
1428 ret = IIO_VAL_INT_PLUS_MICRO;
1429 break;
1430 case IIO_CHAN_INFO_SCALE:
1431 *val = 0;
1432 *val2 = sensor->gain;
1433 ret = IIO_VAL_INT_PLUS_NANO;
1434 break;
1435 default:
1436 ret = -EINVAL;
1437 break;
1438 }
1439
1440 return ret;
1441 }
1442
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1443 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1444 struct iio_chan_spec const *chan,
1445 int val, int val2, long mask)
1446 {
1447 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1448 int err;
1449
1450 err = iio_device_claim_direct_mode(iio_dev);
1451 if (err)
1452 return err;
1453
1454 switch (mask) {
1455 case IIO_CHAN_INFO_SCALE:
1456 err = st_lsm6dsx_set_full_scale(sensor, val2);
1457 break;
1458 case IIO_CHAN_INFO_SAMP_FREQ: {
1459 u8 data;
1460
1461 val = val * 1000 + val2 / 1000;
1462 val = st_lsm6dsx_check_odr(sensor, val, &data);
1463 if (val < 0)
1464 err = val;
1465 else
1466 sensor->odr = val;
1467 break;
1468 }
1469 default:
1470 err = -EINVAL;
1471 break;
1472 }
1473
1474 iio_device_release_direct_mode(iio_dev);
1475
1476 return err;
1477 }
1478
st_lsm6dsx_event_setup(struct st_lsm6dsx_hw * hw,int state)1479 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
1480 {
1481 const struct st_lsm6dsx_reg *reg;
1482 unsigned int data;
1483 int err;
1484
1485 if (!hw->settings->irq_config.irq1_func.addr)
1486 return -ENOTSUPP;
1487
1488 reg = &hw->settings->event_settings.enable_reg;
1489 if (reg->addr) {
1490 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1491 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1492 reg->mask, data);
1493 if (err < 0)
1494 return err;
1495 }
1496
1497 /* Enable wakeup interrupt */
1498 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1499 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1500 hw->irq_routing->mask, data);
1501 }
1502
st_lsm6dsx_read_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1503 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1504 const struct iio_chan_spec *chan,
1505 enum iio_event_type type,
1506 enum iio_event_direction dir,
1507 enum iio_event_info info,
1508 int *val, int *val2)
1509 {
1510 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1511 struct st_lsm6dsx_hw *hw = sensor->hw;
1512
1513 if (type != IIO_EV_TYPE_THRESH)
1514 return -EINVAL;
1515
1516 *val2 = 0;
1517 *val = hw->event_threshold;
1518
1519 return IIO_VAL_INT;
1520 }
1521
1522 static int
st_lsm6dsx_write_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1523 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1524 const struct iio_chan_spec *chan,
1525 enum iio_event_type type,
1526 enum iio_event_direction dir,
1527 enum iio_event_info info,
1528 int val, int val2)
1529 {
1530 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1531 struct st_lsm6dsx_hw *hw = sensor->hw;
1532 const struct st_lsm6dsx_reg *reg;
1533 unsigned int data;
1534 int err;
1535
1536 if (type != IIO_EV_TYPE_THRESH)
1537 return -EINVAL;
1538
1539 if (val < 0 || val > 31)
1540 return -EINVAL;
1541
1542 reg = &hw->settings->event_settings.wakeup_reg;
1543 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1544 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1545 reg->mask, data);
1546 if (err < 0)
1547 return -EINVAL;
1548
1549 hw->event_threshold = val;
1550
1551 return 0;
1552 }
1553
1554 static int
st_lsm6dsx_read_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1555 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1556 const struct iio_chan_spec *chan,
1557 enum iio_event_type type,
1558 enum iio_event_direction dir)
1559 {
1560 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1561 struct st_lsm6dsx_hw *hw = sensor->hw;
1562
1563 if (type != IIO_EV_TYPE_THRESH)
1564 return -EINVAL;
1565
1566 return !!(hw->enable_event & BIT(chan->channel2));
1567 }
1568
1569 static int
st_lsm6dsx_write_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)1570 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1571 const struct iio_chan_spec *chan,
1572 enum iio_event_type type,
1573 enum iio_event_direction dir, int state)
1574 {
1575 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1576 struct st_lsm6dsx_hw *hw = sensor->hw;
1577 u8 enable_event;
1578 int err;
1579
1580 if (type != IIO_EV_TYPE_THRESH)
1581 return -EINVAL;
1582
1583 if (state) {
1584 enable_event = hw->enable_event | BIT(chan->channel2);
1585
1586 /* do not enable events if they are already enabled */
1587 if (hw->enable_event)
1588 goto out;
1589 } else {
1590 enable_event = hw->enable_event & ~BIT(chan->channel2);
1591
1592 /* only turn off sensor if no events is enabled */
1593 if (enable_event)
1594 goto out;
1595 }
1596
1597 /* stop here if no changes have been made */
1598 if (hw->enable_event == enable_event)
1599 return 0;
1600
1601 err = st_lsm6dsx_event_setup(hw, state);
1602 if (err < 0)
1603 return err;
1604
1605 mutex_lock(&hw->conf_lock);
1606 if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1607 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1608 mutex_unlock(&hw->conf_lock);
1609 if (err < 0)
1610 return err;
1611
1612 out:
1613 hw->enable_event = enable_event;
1614
1615 return 0;
1616 }
1617
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)1618 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1619 {
1620 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1621 struct st_lsm6dsx_hw *hw = sensor->hw;
1622 int err;
1623
1624 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size);
1625
1626 mutex_lock(&hw->conf_lock);
1627
1628 err = st_lsm6dsx_update_watermark(sensor, val);
1629
1630 mutex_unlock(&hw->conf_lock);
1631
1632 if (err < 0)
1633 return err;
1634
1635 sensor->watermark = val;
1636
1637 return 0;
1638 }
1639
1640 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)1641 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1642 struct device_attribute *attr,
1643 char *buf)
1644 {
1645 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
1646 const struct st_lsm6dsx_odr_table_entry *odr_table;
1647 int i, len = 0;
1648
1649 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1650 for (i = 0; i < odr_table->odr_len; i++)
1651 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
1652 odr_table->odr_avl[i].milli_hz / 1000,
1653 odr_table->odr_avl[i].milli_hz % 1000);
1654 buf[len - 1] = '\n';
1655
1656 return len;
1657 }
1658
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)1659 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1660 struct device_attribute *attr,
1661 char *buf)
1662 {
1663 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
1664 const struct st_lsm6dsx_fs_table_entry *fs_table;
1665 struct st_lsm6dsx_hw *hw = sensor->hw;
1666 int i, len = 0;
1667
1668 fs_table = &hw->settings->fs_table[sensor->id];
1669 for (i = 0; i < fs_table->fs_len; i++)
1670 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ",
1671 fs_table->fs_avl[i].gain);
1672 buf[len - 1] = '\n';
1673
1674 return len;
1675 }
1676
st_lsm6dsx_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)1677 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
1678 struct iio_chan_spec const *chan,
1679 long mask)
1680 {
1681 switch (mask) {
1682 case IIO_CHAN_INFO_SCALE:
1683 switch (chan->type) {
1684 case IIO_ANGL_VEL:
1685 case IIO_ACCEL:
1686 return IIO_VAL_INT_PLUS_NANO;
1687 default:
1688 return IIO_VAL_INT_PLUS_MICRO;
1689 }
1690 default:
1691 return IIO_VAL_INT_PLUS_MICRO;
1692 }
1693 }
1694
1695 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1696 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1697 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1698 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1699 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1700
1701 static struct attribute *st_lsm6dsx_acc_attributes[] = {
1702 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1703 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1704 NULL,
1705 };
1706
1707 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1708 .attrs = st_lsm6dsx_acc_attributes,
1709 };
1710
1711 static const struct iio_info st_lsm6dsx_acc_info = {
1712 .attrs = &st_lsm6dsx_acc_attribute_group,
1713 .read_raw = st_lsm6dsx_read_raw,
1714 .write_raw = st_lsm6dsx_write_raw,
1715 .read_event_value = st_lsm6dsx_read_event,
1716 .write_event_value = st_lsm6dsx_write_event,
1717 .read_event_config = st_lsm6dsx_read_event_config,
1718 .write_event_config = st_lsm6dsx_write_event_config,
1719 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1720 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1721 };
1722
1723 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1724 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1725 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1726 NULL,
1727 };
1728
1729 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1730 .attrs = st_lsm6dsx_gyro_attributes,
1731 };
1732
1733 static const struct iio_info st_lsm6dsx_gyro_info = {
1734 .attrs = &st_lsm6dsx_gyro_attribute_group,
1735 .read_raw = st_lsm6dsx_read_raw,
1736 .write_raw = st_lsm6dsx_write_raw,
1737 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1738 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1739 };
1740
st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw * hw,int * drdy_pin)1741 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1742 {
1743 struct device *dev = hw->dev;
1744
1745 if (!dev_fwnode(dev))
1746 return -EINVAL;
1747
1748 return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
1749 }
1750
1751 static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,const struct st_lsm6dsx_reg ** drdy_reg)1752 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
1753 const struct st_lsm6dsx_reg **drdy_reg)
1754 {
1755 int err = 0, drdy_pin;
1756
1757 if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
1758 struct st_sensors_platform_data *pdata;
1759 struct device *dev = hw->dev;
1760
1761 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1762 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1763 }
1764
1765 switch (drdy_pin) {
1766 case 1:
1767 hw->irq_routing = &hw->settings->irq_config.irq1_func;
1768 *drdy_reg = &hw->settings->irq_config.irq1;
1769 break;
1770 case 2:
1771 hw->irq_routing = &hw->settings->irq_config.irq2_func;
1772 *drdy_reg = &hw->settings->irq_config.irq2;
1773 break;
1774 default:
1775 dev_err(hw->dev, "unsupported data ready pin\n");
1776 err = -EINVAL;
1777 break;
1778 }
1779
1780 return err;
1781 }
1782
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)1783 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1784 {
1785 const struct st_lsm6dsx_shub_settings *hub_settings;
1786 struct st_sensors_platform_data *pdata;
1787 struct device *dev = hw->dev;
1788 unsigned int data;
1789 int err = 0;
1790
1791 hub_settings = &hw->settings->shub_settings;
1792
1793 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1794 if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
1795 (pdata && pdata->pullups)) {
1796 if (hub_settings->pullup_en.sec_page) {
1797 err = st_lsm6dsx_set_page(hw, true);
1798 if (err < 0)
1799 return err;
1800 }
1801
1802 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1803 err = regmap_update_bits(hw->regmap,
1804 hub_settings->pullup_en.addr,
1805 hub_settings->pullup_en.mask, data);
1806
1807 if (hub_settings->pullup_en.sec_page)
1808 st_lsm6dsx_set_page(hw, false);
1809
1810 if (err < 0)
1811 return err;
1812 }
1813
1814 if (hub_settings->aux_sens.addr) {
1815 /* configure aux sensors */
1816 err = st_lsm6dsx_set_page(hw, true);
1817 if (err < 0)
1818 return err;
1819
1820 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1821 err = regmap_update_bits(hw->regmap,
1822 hub_settings->aux_sens.addr,
1823 hub_settings->aux_sens.mask, data);
1824
1825 st_lsm6dsx_set_page(hw, false);
1826
1827 if (err < 0)
1828 return err;
1829 }
1830
1831 if (hub_settings->emb_func.addr) {
1832 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
1833 err = regmap_update_bits(hw->regmap,
1834 hub_settings->emb_func.addr,
1835 hub_settings->emb_func.mask, data);
1836 }
1837
1838 return err;
1839 }
1840
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)1841 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1842 {
1843 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1844 int err, val;
1845
1846 ts_settings = &hw->settings->ts_settings;
1847 /* enable hw timestamp generation if necessary */
1848 if (ts_settings->timer_en.addr) {
1849 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1850 err = regmap_update_bits(hw->regmap,
1851 ts_settings->timer_en.addr,
1852 ts_settings->timer_en.mask, val);
1853 if (err < 0)
1854 return err;
1855 }
1856
1857 /* enable high resolution for hw ts timer if necessary */
1858 if (ts_settings->hr_timer.addr) {
1859 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
1860 err = regmap_update_bits(hw->regmap,
1861 ts_settings->hr_timer.addr,
1862 ts_settings->hr_timer.mask, val);
1863 if (err < 0)
1864 return err;
1865 }
1866
1867 /* enable ts queueing in FIFO if necessary */
1868 if (ts_settings->fifo_en.addr) {
1869 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
1870 err = regmap_update_bits(hw->regmap,
1871 ts_settings->fifo_en.addr,
1872 ts_settings->fifo_en.mask, val);
1873 if (err < 0)
1874 return err;
1875 }
1876
1877 /* calibrate timestamp sensitivity */
1878 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
1879 if (ts_settings->freq_fine) {
1880 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
1881 if (err < 0)
1882 return err;
1883
1884 /*
1885 * linearize the AN5192 formula:
1886 * 1 / (1 + x) ~= 1 - x (Taylor’s Series)
1887 * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val))
1888 * ttrim[ns] ~= 25000 - 37.5 * val
1889 * ttrim[ns] ~= 25000 - (37500 * val) / 1000
1890 */
1891 hw->ts_gain -= ((s8)val * 37500) / 1000;
1892 }
1893
1894 return 0;
1895 }
1896
st_lsm6dsx_reset_device(struct st_lsm6dsx_hw * hw)1897 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
1898 {
1899 const struct st_lsm6dsx_reg *reg;
1900 int err;
1901
1902 /*
1903 * flush hw FIFO before device reset in order to avoid
1904 * possible races on interrupt line 1. If the first interrupt
1905 * line is asserted during hw reset the device will work in
1906 * I3C-only mode (if it is supported)
1907 */
1908 err = st_lsm6dsx_flush_fifo(hw);
1909 if (err < 0 && err != -ENOTSUPP)
1910 return err;
1911
1912 /* device sw reset */
1913 reg = &hw->settings->reset;
1914 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1915 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1916 if (err < 0)
1917 return err;
1918
1919 msleep(50);
1920
1921 /* reload trimming parameter */
1922 reg = &hw->settings->boot;
1923 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1924 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1925 if (err < 0)
1926 return err;
1927
1928 msleep(50);
1929
1930 return 0;
1931 }
1932
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)1933 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
1934 {
1935 const struct st_lsm6dsx_reg *reg;
1936 int err;
1937
1938 err = st_lsm6dsx_reset_device(hw);
1939 if (err < 0)
1940 return err;
1941
1942 /* enable Block Data Update */
1943 reg = &hw->settings->bdu;
1944 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1945 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1946 if (err < 0)
1947 return err;
1948
1949 /* enable FIFO watermak interrupt */
1950 err = st_lsm6dsx_get_drdy_reg(hw, ®);
1951 if (err < 0)
1952 return err;
1953
1954 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1955 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1956 if (err < 0)
1957 return err;
1958
1959 /* enable Latched interrupts for device events */
1960 if (hw->settings->irq_config.lir.addr) {
1961 reg = &hw->settings->irq_config.lir;
1962 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1963 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1964 if (err < 0)
1965 return err;
1966
1967 /* enable clear on read for latched interrupts */
1968 if (hw->settings->irq_config.clear_on_read.addr) {
1969 reg = &hw->settings->irq_config.clear_on_read;
1970 err = regmap_update_bits(hw->regmap,
1971 reg->addr, reg->mask,
1972 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1973 if (err < 0)
1974 return err;
1975 }
1976 }
1977
1978 /* enable drdy-mas if available */
1979 if (hw->settings->drdy_mask.addr) {
1980 reg = &hw->settings->drdy_mask;
1981 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1982 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1983 if (err < 0)
1984 return err;
1985 }
1986
1987 err = st_lsm6dsx_init_shub(hw);
1988 if (err < 0)
1989 return err;
1990
1991 return st_lsm6dsx_init_hw_timer(hw);
1992 }
1993
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)1994 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
1995 enum st_lsm6dsx_sensor_id id,
1996 const char *name)
1997 {
1998 struct st_lsm6dsx_sensor *sensor;
1999 struct iio_dev *iio_dev;
2000
2001 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2002 if (!iio_dev)
2003 return NULL;
2004
2005 iio_dev->modes = INDIO_DIRECT_MODE;
2006 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2007 iio_dev->channels = hw->settings->channels[id].chan;
2008 iio_dev->num_channels = hw->settings->channels[id].len;
2009
2010 sensor = iio_priv(iio_dev);
2011 sensor->id = id;
2012 sensor->hw = hw;
2013 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2014 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2015 sensor->watermark = 1;
2016
2017 switch (id) {
2018 case ST_LSM6DSX_ID_ACC:
2019 iio_dev->info = &st_lsm6dsx_acc_info;
2020 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2021 name);
2022 break;
2023 case ST_LSM6DSX_ID_GYRO:
2024 iio_dev->info = &st_lsm6dsx_gyro_info;
2025 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2026 name);
2027 break;
2028 default:
2029 return NULL;
2030 }
2031 iio_dev->name = sensor->name;
2032
2033 return iio_dev;
2034 }
2035
2036 static bool
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw * hw)2037 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2038 {
2039 const struct st_lsm6dsx_event_settings *event_settings;
2040 int err, data;
2041 s64 timestamp;
2042
2043 if (!hw->enable_event)
2044 return false;
2045
2046 event_settings = &hw->settings->event_settings;
2047 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2048 &data, sizeof(data));
2049 if (err < 0)
2050 return false;
2051
2052 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2053 if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2054 (hw->enable_event & BIT(IIO_MOD_Z)))
2055 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2056 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2057 0,
2058 IIO_MOD_Z,
2059 IIO_EV_TYPE_THRESH,
2060 IIO_EV_DIR_EITHER),
2061 timestamp);
2062
2063 if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2064 (hw->enable_event & BIT(IIO_MOD_Y)))
2065 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2066 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2067 0,
2068 IIO_MOD_Y,
2069 IIO_EV_TYPE_THRESH,
2070 IIO_EV_DIR_EITHER),
2071 timestamp);
2072
2073 if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2074 (hw->enable_event & BIT(IIO_MOD_X)))
2075 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2076 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2077 0,
2078 IIO_MOD_X,
2079 IIO_EV_TYPE_THRESH,
2080 IIO_EV_DIR_EITHER),
2081 timestamp);
2082
2083 return data & event_settings->wakeup_src_status_mask;
2084 }
2085
st_lsm6dsx_handler_thread(int irq,void * private)2086 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2087 {
2088 struct st_lsm6dsx_hw *hw = private;
2089 int fifo_len = 0, len;
2090 bool event;
2091
2092 event = st_lsm6dsx_report_motion_event(hw);
2093
2094 if (!hw->settings->fifo_ops.read_fifo)
2095 return event ? IRQ_HANDLED : IRQ_NONE;
2096
2097 /*
2098 * If we are using edge IRQs, new samples can arrive while
2099 * processing current interrupt since there are no hw
2100 * guarantees the irq line stays "low" long enough to properly
2101 * detect the new interrupt. In this case the new sample will
2102 * be missed.
2103 * Polling FIFO status register allow us to read new
2104 * samples even if the interrupt arrives while processing
2105 * previous data and the timeslot where the line is "low" is
2106 * too short to be properly detected.
2107 */
2108 do {
2109 mutex_lock(&hw->fifo_lock);
2110 len = hw->settings->fifo_ops.read_fifo(hw);
2111 mutex_unlock(&hw->fifo_lock);
2112
2113 if (len > 0)
2114 fifo_len += len;
2115 } while (len > 0);
2116
2117 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2118 }
2119
st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw * hw)2120 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2121 {
2122 struct st_sensors_platform_data *pdata;
2123 const struct st_lsm6dsx_reg *reg;
2124 struct device *dev = hw->dev;
2125 unsigned long irq_type;
2126 bool irq_active_low;
2127 int err;
2128
2129 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
2130
2131 switch (irq_type) {
2132 case IRQF_TRIGGER_HIGH:
2133 case IRQF_TRIGGER_RISING:
2134 irq_active_low = false;
2135 break;
2136 case IRQF_TRIGGER_LOW:
2137 case IRQF_TRIGGER_FALLING:
2138 irq_active_low = true;
2139 break;
2140 default:
2141 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2142 return -EINVAL;
2143 }
2144
2145 reg = &hw->settings->irq_config.hla;
2146 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2147 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2148 reg->mask));
2149 if (err < 0)
2150 return err;
2151
2152 pdata = (struct st_sensors_platform_data *)dev->platform_data;
2153 if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
2154 (pdata && pdata->open_drain)) {
2155 reg = &hw->settings->irq_config.od;
2156 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2157 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2158 if (err < 0)
2159 return err;
2160
2161 irq_type |= IRQF_SHARED;
2162 }
2163
2164 err = devm_request_threaded_irq(hw->dev, hw->irq,
2165 NULL,
2166 st_lsm6dsx_handler_thread,
2167 irq_type | IRQF_ONESHOT,
2168 "lsm6dsx", hw);
2169 if (err) {
2170 dev_err(hw->dev, "failed to request trigger irq %d\n",
2171 hw->irq);
2172 return err;
2173 }
2174
2175 return 0;
2176 }
2177
st_lsm6dsx_init_regulators(struct device * dev)2178 static int st_lsm6dsx_init_regulators(struct device *dev)
2179 {
2180 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2181 int err;
2182
2183 /* vdd-vddio power regulators */
2184 hw->regulators[0].supply = "vdd";
2185 hw->regulators[1].supply = "vddio";
2186 err = devm_regulator_bulk_get(dev, ARRAY_SIZE(hw->regulators),
2187 hw->regulators);
2188 if (err)
2189 return dev_err_probe(dev, err, "failed to get regulators\n");
2190
2191 err = regulator_bulk_enable(ARRAY_SIZE(hw->regulators),
2192 hw->regulators);
2193 if (err) {
2194 dev_err(dev, "failed to enable regulators: %d\n", err);
2195 return err;
2196 }
2197
2198 msleep(50);
2199
2200 return 0;
2201 }
2202
st_lsm6dsx_chip_uninit(void * data)2203 static void st_lsm6dsx_chip_uninit(void *data)
2204 {
2205 struct st_lsm6dsx_hw *hw = data;
2206
2207 regulator_bulk_disable(ARRAY_SIZE(hw->regulators), hw->regulators);
2208 }
2209
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)2210 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2211 struct regmap *regmap)
2212 {
2213 struct st_sensors_platform_data *pdata = dev->platform_data;
2214 const struct st_lsm6dsx_shub_settings *hub_settings;
2215 struct st_lsm6dsx_hw *hw;
2216 const char *name = NULL;
2217 int i, err;
2218
2219 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2220 if (!hw)
2221 return -ENOMEM;
2222
2223 dev_set_drvdata(dev, (void *)hw);
2224
2225 mutex_init(&hw->fifo_lock);
2226 mutex_init(&hw->conf_lock);
2227 mutex_init(&hw->page_lock);
2228
2229 err = st_lsm6dsx_init_regulators(dev);
2230 if (err)
2231 return err;
2232
2233 err = devm_add_action_or_reset(dev, st_lsm6dsx_chip_uninit, hw);
2234 if (err)
2235 return err;
2236
2237 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2238 if (!hw->buff)
2239 return -ENOMEM;
2240
2241 hw->dev = dev;
2242 hw->irq = irq;
2243 hw->regmap = regmap;
2244
2245 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2246 if (err < 0)
2247 return err;
2248
2249 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2250 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2251 if (!hw->iio_devs[i])
2252 return -ENOMEM;
2253 }
2254
2255 err = st_lsm6dsx_init_device(hw);
2256 if (err < 0)
2257 return err;
2258
2259 hub_settings = &hw->settings->shub_settings;
2260 if (hub_settings->master_en.addr &&
2261 (!dev_fwnode(dev) ||
2262 !device_property_read_bool(dev, "st,disable-sensor-hub"))) {
2263 err = st_lsm6dsx_shub_probe(hw, name);
2264 if (err < 0)
2265 return err;
2266 }
2267
2268 if (hw->irq > 0) {
2269 err = st_lsm6dsx_irq_setup(hw);
2270 if (err < 0)
2271 return err;
2272
2273 err = st_lsm6dsx_fifo_setup(hw);
2274 if (err < 0)
2275 return err;
2276 }
2277
2278 err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2279 if (err)
2280 return err;
2281
2282 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2283 if (!hw->iio_devs[i])
2284 continue;
2285
2286 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2287 if (err)
2288 return err;
2289 }
2290
2291 if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
2292 (pdata && pdata->wakeup_source))
2293 device_init_wakeup(dev, true);
2294
2295 return 0;
2296 }
2297 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, IIO_LSM6DSX);
2298
st_lsm6dsx_suspend(struct device * dev)2299 static int st_lsm6dsx_suspend(struct device *dev)
2300 {
2301 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2302 struct st_lsm6dsx_sensor *sensor;
2303 int i, err = 0;
2304
2305 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2306 if (!hw->iio_devs[i])
2307 continue;
2308
2309 sensor = iio_priv(hw->iio_devs[i]);
2310 if (!(hw->enable_mask & BIT(sensor->id)))
2311 continue;
2312
2313 if (device_may_wakeup(dev) &&
2314 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2315 /* Enable wake from IRQ */
2316 enable_irq_wake(hw->irq);
2317 continue;
2318 }
2319
2320 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2321 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2322 sensor->id == ST_LSM6DSX_ID_EXT2)
2323 err = st_lsm6dsx_shub_set_enable(sensor, false);
2324 else
2325 err = st_lsm6dsx_sensor_set_enable(sensor, false);
2326 if (err < 0)
2327 return err;
2328
2329 hw->suspend_mask |= BIT(sensor->id);
2330 }
2331
2332 if (hw->fifo_mask)
2333 err = st_lsm6dsx_flush_fifo(hw);
2334
2335 return err;
2336 }
2337
st_lsm6dsx_resume(struct device * dev)2338 static int st_lsm6dsx_resume(struct device *dev)
2339 {
2340 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2341 struct st_lsm6dsx_sensor *sensor;
2342 int i, err = 0;
2343
2344 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2345 if (!hw->iio_devs[i])
2346 continue;
2347
2348 sensor = iio_priv(hw->iio_devs[i]);
2349 if (device_may_wakeup(dev) &&
2350 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2351 disable_irq_wake(hw->irq);
2352
2353 if (!(hw->suspend_mask & BIT(sensor->id)))
2354 continue;
2355
2356 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2357 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2358 sensor->id == ST_LSM6DSX_ID_EXT2)
2359 err = st_lsm6dsx_shub_set_enable(sensor, true);
2360 else
2361 err = st_lsm6dsx_sensor_set_enable(sensor, true);
2362 if (err < 0)
2363 return err;
2364
2365 hw->suspend_mask &= ~BIT(sensor->id);
2366 }
2367
2368 if (hw->fifo_mask)
2369 err = st_lsm6dsx_resume_fifo(hw);
2370
2371 return err;
2372 }
2373
2374 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend,
2375 st_lsm6dsx_resume, IIO_LSM6DSX);
2376
2377 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2378 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2379 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2380 MODULE_LICENSE("GPL v2");
2381