1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2018, NVIDIA CORPORATION.
4  */
5 
6 #include <linux/interrupt.h>
7 #include <linux/irq.h>
8 #include <linux/io.h>
9 #include <linux/of.h>
10 #include <linux/platform_device.h>
11 
12 #include <soc/tegra/bpmp.h>
13 
14 #include "bpmp-private.h"
15 
16 #define TRIGGER_OFFSET		0x000
17 #define RESULT_OFFSET(id)	(0xc00 + id * 4)
18 #define TRIGGER_ID_SHIFT	16
19 #define TRIGGER_CMD_GET		4
20 
21 #define STA_OFFSET		0
22 #define SET_OFFSET		4
23 #define CLR_OFFSET		8
24 
25 #define CH_MASK(ch)	(0x3 << ((ch) * 2))
26 #define SL_SIGL(ch)	(0x0 << ((ch) * 2))
27 #define SL_QUED(ch)	(0x1 << ((ch) * 2))
28 #define MA_FREE(ch)	(0x2 << ((ch) * 2))
29 #define MA_ACKD(ch)	(0x3 << ((ch) * 2))
30 
31 struct tegra210_bpmp {
32 	void __iomem *atomics;
33 	void __iomem *arb_sema;
34 	struct irq_data *tx_irq_data;
35 };
36 
bpmp_channel_status(struct tegra_bpmp * bpmp,unsigned int index)37 static u32 bpmp_channel_status(struct tegra_bpmp *bpmp, unsigned int index)
38 {
39 	struct tegra210_bpmp *priv = bpmp->priv;
40 
41 	return __raw_readl(priv->arb_sema + STA_OFFSET) & CH_MASK(index);
42 }
43 
tegra210_bpmp_is_response_ready(struct tegra_bpmp_channel * channel)44 static bool tegra210_bpmp_is_response_ready(struct tegra_bpmp_channel *channel)
45 {
46 	unsigned int index = channel->index;
47 
48 	return bpmp_channel_status(channel->bpmp, index) == MA_ACKD(index);
49 }
50 
tegra210_bpmp_is_request_ready(struct tegra_bpmp_channel * channel)51 static bool tegra210_bpmp_is_request_ready(struct tegra_bpmp_channel *channel)
52 {
53 	unsigned int index = channel->index;
54 
55 	return bpmp_channel_status(channel->bpmp, index) == SL_SIGL(index);
56 }
57 
58 static bool
tegra210_bpmp_is_request_channel_free(struct tegra_bpmp_channel * channel)59 tegra210_bpmp_is_request_channel_free(struct tegra_bpmp_channel *channel)
60 {
61 	unsigned int index = channel->index;
62 
63 	return bpmp_channel_status(channel->bpmp, index) == MA_FREE(index);
64 }
65 
66 static bool
tegra210_bpmp_is_response_channel_free(struct tegra_bpmp_channel * channel)67 tegra210_bpmp_is_response_channel_free(struct tegra_bpmp_channel *channel)
68 {
69 	unsigned int index = channel->index;
70 
71 	return bpmp_channel_status(channel->bpmp, index) == SL_QUED(index);
72 }
73 
tegra210_bpmp_post_request(struct tegra_bpmp_channel * channel)74 static int tegra210_bpmp_post_request(struct tegra_bpmp_channel *channel)
75 {
76 	struct tegra210_bpmp *priv = channel->bpmp->priv;
77 
78 	__raw_writel(CH_MASK(channel->index), priv->arb_sema + CLR_OFFSET);
79 
80 	return 0;
81 }
82 
tegra210_bpmp_post_response(struct tegra_bpmp_channel * channel)83 static int tegra210_bpmp_post_response(struct tegra_bpmp_channel *channel)
84 {
85 	struct tegra210_bpmp *priv = channel->bpmp->priv;
86 
87 	__raw_writel(MA_ACKD(channel->index), priv->arb_sema + SET_OFFSET);
88 
89 	return 0;
90 }
91 
tegra210_bpmp_ack_response(struct tegra_bpmp_channel * channel)92 static int tegra210_bpmp_ack_response(struct tegra_bpmp_channel *channel)
93 {
94 	struct tegra210_bpmp *priv = channel->bpmp->priv;
95 
96 	__raw_writel(MA_ACKD(channel->index) ^ MA_FREE(channel->index),
97 		     priv->arb_sema + CLR_OFFSET);
98 
99 	return 0;
100 }
101 
tegra210_bpmp_ack_request(struct tegra_bpmp_channel * channel)102 static int tegra210_bpmp_ack_request(struct tegra_bpmp_channel *channel)
103 {
104 	struct tegra210_bpmp *priv = channel->bpmp->priv;
105 
106 	__raw_writel(SL_QUED(channel->index), priv->arb_sema + SET_OFFSET);
107 
108 	return 0;
109 }
110 
tegra210_bpmp_ring_doorbell(struct tegra_bpmp * bpmp)111 static int tegra210_bpmp_ring_doorbell(struct tegra_bpmp *bpmp)
112 {
113 	struct tegra210_bpmp *priv = bpmp->priv;
114 	struct irq_data *irq_data = priv->tx_irq_data;
115 
116 	/*
117 	 * Tegra Legacy Interrupt Controller (LIC) is used to notify BPMP of
118 	 * available messages
119 	 */
120 	if (irq_data->chip->irq_retrigger)
121 		return irq_data->chip->irq_retrigger(irq_data);
122 
123 	return -EINVAL;
124 }
125 
rx_irq(int irq,void * data)126 static irqreturn_t rx_irq(int irq, void *data)
127 {
128 	struct tegra_bpmp *bpmp = data;
129 
130 	tegra_bpmp_handle_rx(bpmp);
131 
132 	return IRQ_HANDLED;
133 }
134 
tegra210_bpmp_channel_init(struct tegra_bpmp_channel * channel,struct tegra_bpmp * bpmp,unsigned int index)135 static int tegra210_bpmp_channel_init(struct tegra_bpmp_channel *channel,
136 				      struct tegra_bpmp *bpmp,
137 				      unsigned int index)
138 {
139 	struct tegra210_bpmp *priv = bpmp->priv;
140 	u32 address;
141 	void *p;
142 
143 	/* Retrieve channel base address from BPMP */
144 	writel(index << TRIGGER_ID_SHIFT | TRIGGER_CMD_GET,
145 	       priv->atomics + TRIGGER_OFFSET);
146 	address = readl(priv->atomics + RESULT_OFFSET(index));
147 
148 	p = devm_ioremap(bpmp->dev, address, 0x80);
149 	if (!p)
150 		return -ENOMEM;
151 
152 	channel->ib = p;
153 	channel->ob = p;
154 	channel->index = index;
155 	init_completion(&channel->completion);
156 	channel->bpmp = bpmp;
157 
158 	return 0;
159 }
160 
tegra210_bpmp_init(struct tegra_bpmp * bpmp)161 static int tegra210_bpmp_init(struct tegra_bpmp *bpmp)
162 {
163 	struct platform_device *pdev = to_platform_device(bpmp->dev);
164 	struct tegra210_bpmp *priv;
165 	unsigned int i;
166 	int err;
167 
168 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
169 	if (!priv)
170 		return -ENOMEM;
171 
172 	bpmp->priv = priv;
173 
174 	priv->atomics = devm_platform_ioremap_resource(pdev, 0);
175 	if (IS_ERR(priv->atomics))
176 		return PTR_ERR(priv->atomics);
177 
178 	priv->arb_sema = devm_platform_ioremap_resource(pdev, 1);
179 	if (IS_ERR(priv->arb_sema))
180 		return PTR_ERR(priv->arb_sema);
181 
182 	err = tegra210_bpmp_channel_init(bpmp->tx_channel, bpmp,
183 					 bpmp->soc->channels.cpu_tx.offset);
184 	if (err < 0)
185 		return err;
186 
187 	err = tegra210_bpmp_channel_init(bpmp->rx_channel, bpmp,
188 					 bpmp->soc->channels.cpu_rx.offset);
189 	if (err < 0)
190 		return err;
191 
192 	for (i = 0; i < bpmp->threaded.count; i++) {
193 		unsigned int index = bpmp->soc->channels.thread.offset + i;
194 
195 		err = tegra210_bpmp_channel_init(&bpmp->threaded_channels[i],
196 						 bpmp, index);
197 		if (err < 0)
198 			return err;
199 	}
200 
201 	err = platform_get_irq_byname(pdev, "tx");
202 	if (err < 0) {
203 		dev_err(&pdev->dev, "failed to get TX IRQ: %d\n", err);
204 		return err;
205 	}
206 
207 	priv->tx_irq_data = irq_get_irq_data(err);
208 	if (!priv->tx_irq_data) {
209 		dev_err(&pdev->dev, "failed to get IRQ data for TX IRQ\n");
210 		return -ENOENT;
211 	}
212 
213 	err = platform_get_irq_byname(pdev, "rx");
214 	if (err < 0) {
215 		dev_err(&pdev->dev, "failed to get rx IRQ: %d\n", err);
216 		return err;
217 	}
218 
219 	err = devm_request_irq(&pdev->dev, err, rx_irq,
220 			       IRQF_NO_SUSPEND, dev_name(&pdev->dev), bpmp);
221 	if (err < 0) {
222 		dev_err(&pdev->dev, "failed to request IRQ: %d\n", err);
223 		return err;
224 	}
225 
226 	return 0;
227 }
228 
229 const struct tegra_bpmp_ops tegra210_bpmp_ops = {
230 	.init = tegra210_bpmp_init,
231 	.is_response_ready = tegra210_bpmp_is_response_ready,
232 	.is_request_ready = tegra210_bpmp_is_request_ready,
233 	.ack_response = tegra210_bpmp_ack_response,
234 	.ack_request = tegra210_bpmp_ack_request,
235 	.is_response_channel_free = tegra210_bpmp_is_response_channel_free,
236 	.is_request_channel_free = tegra210_bpmp_is_request_channel_free,
237 	.post_response = tegra210_bpmp_post_response,
238 	.post_request = tegra210_bpmp_post_request,
239 	.ring_doorbell = tegra210_bpmp_ring_doorbell,
240 };
241