1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2014 - 2021 Intel Corporation */
3 #ifndef ADF_DRV_H
4 #define ADF_DRV_H
5
6 #include <linux/list.h>
7 #include <linux/pci.h>
8 #include "adf_accel_devices.h"
9 #include "icp_qat_fw_loader_handle.h"
10 #include "icp_qat_hal.h"
11
12 #define ADF_MAJOR_VERSION 0
13 #define ADF_MINOR_VERSION 6
14 #define ADF_BUILD_VERSION 0
15 #define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \
16 __stringify(ADF_MINOR_VERSION) "." \
17 __stringify(ADF_BUILD_VERSION)
18
19 #define ADF_STATUS_RESTARTING 0
20 #define ADF_STATUS_STARTING 1
21 #define ADF_STATUS_CONFIGURED 2
22 #define ADF_STATUS_STARTED 3
23 #define ADF_STATUS_AE_INITIALISED 4
24 #define ADF_STATUS_AE_UCODE_LOADED 5
25 #define ADF_STATUS_AE_STARTED 6
26 #define ADF_STATUS_PF_RUNNING 7
27 #define ADF_STATUS_IRQ_ALLOCATED 8
28
29 enum adf_dev_reset_mode {
30 ADF_DEV_RESET_ASYNC = 0,
31 ADF_DEV_RESET_SYNC
32 };
33
34 enum adf_event {
35 ADF_EVENT_INIT = 0,
36 ADF_EVENT_START,
37 ADF_EVENT_STOP,
38 ADF_EVENT_SHUTDOWN,
39 ADF_EVENT_RESTARTING,
40 ADF_EVENT_RESTARTED,
41 };
42
43 struct service_hndl {
44 int (*event_hld)(struct adf_accel_dev *accel_dev,
45 enum adf_event event);
46 unsigned long init_status[ADF_DEVS_ARRAY_SIZE];
47 unsigned long start_status[ADF_DEVS_ARRAY_SIZE];
48 char *name;
49 struct list_head list;
50 };
51
52 int adf_service_register(struct service_hndl *service);
53 int adf_service_unregister(struct service_hndl *service);
54
55 int adf_dev_init(struct adf_accel_dev *accel_dev);
56 int adf_dev_start(struct adf_accel_dev *accel_dev);
57 void adf_dev_stop(struct adf_accel_dev *accel_dev);
58 void adf_dev_shutdown(struct adf_accel_dev *accel_dev);
59 int adf_dev_shutdown_cache_cfg(struct adf_accel_dev *accel_dev);
60
61 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
62 void adf_clean_vf_map(bool);
63
64 int adf_ctl_dev_register(void);
65 void adf_ctl_dev_unregister(void);
66 int adf_processes_dev_register(void);
67 void adf_processes_dev_unregister(void);
68
69 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
70 struct adf_accel_dev *pf);
71 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
72 struct adf_accel_dev *pf);
73 struct list_head *adf_devmgr_get_head(void);
74 struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id);
75 struct adf_accel_dev *adf_devmgr_get_first(void);
76 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev);
77 int adf_devmgr_verify_id(u32 id);
78 void adf_devmgr_get_num_dev(u32 *num);
79 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
80 int adf_dev_started(struct adf_accel_dev *accel_dev);
81 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
82 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
83 int adf_ae_init(struct adf_accel_dev *accel_dev);
84 int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
85 int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
86 void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
87 int adf_ae_start(struct adf_accel_dev *accel_dev);
88 int adf_ae_stop(struct adf_accel_dev *accel_dev);
89
90 extern const struct pci_error_handlers adf_err_handler;
91 void adf_enable_aer(struct adf_accel_dev *accel_dev);
92 void adf_disable_aer(struct adf_accel_dev *accel_dev);
93 void adf_reset_sbr(struct adf_accel_dev *accel_dev);
94 void adf_reset_flr(struct adf_accel_dev *accel_dev);
95 void adf_dev_restore(struct adf_accel_dev *accel_dev);
96 int adf_init_aer(void);
97 void adf_exit_aer(void);
98 int adf_init_admin_comms(struct adf_accel_dev *accel_dev);
99 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev);
100 int adf_send_admin_init(struct adf_accel_dev *accel_dev);
101 int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay);
102 int adf_init_arb(struct adf_accel_dev *accel_dev);
103 void adf_exit_arb(struct adf_accel_dev *accel_dev);
104 void adf_update_ring_arb(struct adf_etr_ring_data *ring);
105
106 int adf_dev_get(struct adf_accel_dev *accel_dev);
107 void adf_dev_put(struct adf_accel_dev *accel_dev);
108 int adf_dev_in_use(struct adf_accel_dev *accel_dev);
109 int adf_init_etr_data(struct adf_accel_dev *accel_dev);
110 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
111 int qat_crypto_register(void);
112 int qat_crypto_unregister(void);
113 int qat_crypto_dev_config(struct adf_accel_dev *accel_dev);
114 int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev);
115 struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
116 void qat_crypto_put_instance(struct qat_crypto_instance *inst);
117 void qat_alg_callback(void *resp);
118 void qat_alg_asym_callback(void *resp);
119 int qat_algs_register(void);
120 void qat_algs_unregister(void);
121 int qat_asym_algs_register(void);
122 void qat_asym_algs_unregister(void);
123
124 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
125 void adf_isr_resource_free(struct adf_accel_dev *accel_dev);
126 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
127 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev);
128
129 int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev);
130
131 int adf_sysfs_init(struct adf_accel_dev *accel_dev);
132
133 int qat_hal_init(struct adf_accel_dev *accel_dev);
134 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
135 int qat_hal_start(struct icp_qat_fw_loader_handle *handle);
136 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
137 unsigned int ctx_mask);
138 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
139 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
140 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
141 unsigned char ae, unsigned int ctx_mask);
142 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
143 unsigned int ae);
144 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
145 unsigned char ae, enum icp_qat_uof_regtype lm_type,
146 unsigned char mode);
147 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
148 unsigned char ae, unsigned char mode);
149 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
150 unsigned char ae, unsigned char mode);
151 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
152 unsigned char ae, unsigned int ctx_mask, unsigned int upc);
153 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
154 unsigned char ae, unsigned int uaddr,
155 unsigned int words_num, u64 *uword);
156 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
157 unsigned int uword_addr, unsigned int words_num,
158 unsigned int *data);
159 int qat_hal_get_ins_num(void);
160 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
161 unsigned char ae,
162 struct icp_qat_uof_batch_init *lm_init_header);
163 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
164 unsigned char ae, unsigned long ctx_mask,
165 enum icp_qat_uof_regtype reg_type,
166 unsigned short reg_num, unsigned int regdata);
167 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
168 unsigned char ae, unsigned long ctx_mask,
169 enum icp_qat_uof_regtype reg_type,
170 unsigned short reg_num, unsigned int regdata);
171 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
172 unsigned char ae, unsigned long ctx_mask,
173 enum icp_qat_uof_regtype reg_type,
174 unsigned short reg_num, unsigned int regdata);
175 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
176 unsigned char ae, unsigned long ctx_mask,
177 unsigned short reg_num, unsigned int regdata);
178 int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle,
179 unsigned char ae, unsigned short lm_addr, unsigned int value);
180 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle,
181 unsigned char ae, unsigned char mode);
182 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
183 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle);
184 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr,
185 int mem_size);
186 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle,
187 void *addr_ptr, u32 mem_size, char *obj_name);
188 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle,
189 unsigned int cfg_ae_mask);
190 int adf_init_misc_wq(void);
191 void adf_exit_misc_wq(void);
192 bool adf_misc_wq_queue_work(struct work_struct *work);
193 #if defined(CONFIG_PCI_IOV)
194 int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
195 void adf_disable_sriov(struct adf_accel_dev *accel_dev);
196 void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask);
197 void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev);
198 bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev);
199 bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr);
200 int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev);
201 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
202 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
203 void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info);
204 int adf_init_pf_wq(void);
205 void adf_exit_pf_wq(void);
206 int adf_init_vf_wq(void);
207 void adf_exit_vf_wq(void);
208 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev);
209 #else
210 #define adf_sriov_configure NULL
211
adf_disable_sriov(struct adf_accel_dev * accel_dev)212 static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
213 {
214 }
215
adf_init_pf_wq(void)216 static inline int adf_init_pf_wq(void)
217 {
218 return 0;
219 }
220
adf_exit_pf_wq(void)221 static inline void adf_exit_pf_wq(void)
222 {
223 }
224
adf_init_vf_wq(void)225 static inline int adf_init_vf_wq(void)
226 {
227 return 0;
228 }
229
adf_exit_vf_wq(void)230 static inline void adf_exit_vf_wq(void)
231 {
232 }
233
234 #endif
235
adf_get_pmisc_base(struct adf_accel_dev * accel_dev)236 static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev)
237 {
238 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
239 struct adf_bar *pmisc;
240
241 pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
242
243 return pmisc->virt_addr;
244 }
245
246 #endif
247