1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2017 MediaTek Inc.
4  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5  */
6 
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt2712-clk.h>
14 
15 static const struct mtk_gate_regs vdec0_cg_regs = {
16 	.set_ofs = 0x0,
17 	.clr_ofs = 0x4,
18 	.sta_ofs = 0x0,
19 };
20 
21 static const struct mtk_gate_regs vdec1_cg_regs = {
22 	.set_ofs = 0x8,
23 	.clr_ofs = 0xc,
24 	.sta_ofs = 0x8,
25 };
26 
27 #define GATE_VDEC0(_id, _name, _parent, _shift) {	\
28 		.id = _id,				\
29 		.name = _name,				\
30 		.parent_name = _parent,			\
31 		.regs = &vdec0_cg_regs,			\
32 		.shift = _shift,			\
33 		.ops = &mtk_clk_gate_ops_setclr_inv,	\
34 	}
35 
36 #define GATE_VDEC1(_id, _name, _parent, _shift) {	\
37 		.id = _id,				\
38 		.name = _name,				\
39 		.parent_name = _parent,			\
40 		.regs = &vdec1_cg_regs,			\
41 		.shift = _shift,			\
42 		.ops = &mtk_clk_gate_ops_setclr_inv,	\
43 	}
44 
45 static const struct mtk_gate vdec_clks[] = {
46 	/* VDEC0 */
47 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
48 	/* VDEC1 */
49 	GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "vdec_sel", 0),
50 	GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1),
51 };
52 
53 static const struct mtk_clk_desc vdec_desc = {
54 	.clks = vdec_clks,
55 	.num_clks = ARRAY_SIZE(vdec_clks),
56 };
57 
58 static const struct of_device_id of_match_clk_mt2712_vdec[] = {
59 	{
60 		.compatible = "mediatek,mt2712-vdecsys",
61 		.data = &vdec_desc,
62 	}, {
63 		/* sentinel */
64 	}
65 };
66 
67 static struct platform_driver clk_mt2712_vdec_drv = {
68 	.probe = mtk_clk_simple_probe,
69 	.remove = mtk_clk_simple_remove,
70 	.driver = {
71 		.name = "clk-mt2712-vdec",
72 		.of_match_table = of_match_clk_mt2712_vdec,
73 	},
74 };
75 
76 builtin_platform_driver(clk_mt2712_vdec_drv);
77