1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * include/asm-sh/processor.h
4  *
5  * Copyright (C) 1999, 2000  Niibe Yutaka
6  * Copyright (C) 2002, 2003  Paul Mundt
7  */
8 
9 #ifndef __ASM_SH_PROCESSOR_32_H
10 #define __ASM_SH_PROCESSOR_32_H
11 
12 #include <linux/compiler.h>
13 #include <linux/linkage.h>
14 #include <asm/page.h>
15 #include <asm/types.h>
16 #include <asm/hw_breakpoint.h>
17 
18 /* Core Processor Version Register */
19 #define CCN_PVR		0xff000030
20 #define CCN_CVR		0xff000040
21 #define CCN_PRR		0xff000044
22 
23 /*
24  * User space process size: 2GB.
25  *
26  * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
27  */
28 #define TASK_SIZE	0x7c000000UL
29 
30 #define STACK_TOP	TASK_SIZE
31 #define STACK_TOP_MAX	STACK_TOP
32 
33 /* This decides where the kernel will search for a free chunk of vm
34  * space during mmap's.
35  */
36 #define TASK_UNMAPPED_BASE	PAGE_ALIGN(TASK_SIZE / 3)
37 
38 /*
39  * Bit of SR register
40  *
41  * FD-bit:
42  *     When it's set, it means the processor doesn't have right to use FPU,
43  *     and it results exception when the floating operation is executed.
44  *
45  * IMASK-bit:
46  *     Interrupt level mask
47  */
48 #define SR_DSP		0x00001000
49 #define SR_IMASK	0x000000f0
50 #define SR_FD		0x00008000
51 #define SR_MD		0x40000000
52 
53 /*
54  * DSP structure and data
55  */
56 struct sh_dsp_struct {
57 	unsigned long dsp_regs[14];
58 	long status;
59 };
60 
61 /*
62  * FPU structure and data
63  */
64 
65 struct sh_fpu_hard_struct {
66 	unsigned long fp_regs[16];
67 	unsigned long xfp_regs[16];
68 	unsigned long fpscr;
69 	unsigned long fpul;
70 
71 	long status; /* software status information */
72 };
73 
74 /* Dummy fpu emulator  */
75 struct sh_fpu_soft_struct {
76 	unsigned long fp_regs[16];
77 	unsigned long xfp_regs[16];
78 	unsigned long fpscr;
79 	unsigned long fpul;
80 
81 	unsigned char lookahead;
82 	unsigned long entry_pc;
83 };
84 
85 union thread_xstate {
86 	struct sh_fpu_hard_struct hardfpu;
87 	struct sh_fpu_soft_struct softfpu;
88 };
89 
90 struct thread_struct {
91 	/* Saved registers when thread is descheduled */
92 	unsigned long sp;
93 	unsigned long pc;
94 
95 	/* Various thread flags, see SH_THREAD_xxx */
96 	unsigned long flags;
97 
98 	/* Save middle states of ptrace breakpoints */
99 	struct perf_event *ptrace_bps[HBP_NUM];
100 
101 #ifdef CONFIG_SH_DSP
102 	/* Dsp status information */
103 	struct sh_dsp_struct dsp_status;
104 #endif
105 
106 	/* Extended processor state */
107 	union thread_xstate *xstate;
108 
109 	/*
110 	 * fpu_counter contains the number of consecutive context switches
111 	 * that the FPU is used. If this is over a threshold, the lazy fpu
112 	 * saving becomes unlazy to save the trap. This is an unsigned char
113 	 * so that after 256 times the counter wraps and the behavior turns
114 	 * lazy again; this to deal with bursty apps that only use FPU for
115 	 * a short time
116 	 */
117 	unsigned char fpu_counter;
118 };
119 
120 #define INIT_THREAD  {						\
121 	.sp = sizeof(init_stack) + (long) &init_stack,		\
122 	.flags = 0,						\
123 }
124 
125 /* Forward declaration, a strange C thing */
126 struct task_struct;
127 
128 extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
129 
130 /*
131  * FPU lazy state save handling.
132  */
133 
disable_fpu(void)134 static __inline__ void disable_fpu(void)
135 {
136 	unsigned long __dummy;
137 
138 	/* Set FD flag in SR */
139 	__asm__ __volatile__("stc	sr, %0\n\t"
140 			     "or	%1, %0\n\t"
141 			     "ldc	%0, sr"
142 			     : "=&r" (__dummy)
143 			     : "r" (SR_FD));
144 }
145 
enable_fpu(void)146 static __inline__ void enable_fpu(void)
147 {
148 	unsigned long __dummy;
149 
150 	/* Clear out FD flag in SR */
151 	__asm__ __volatile__("stc	sr, %0\n\t"
152 			     "and	%1, %0\n\t"
153 			     "ldc	%0, sr"
154 			     : "=&r" (__dummy)
155 			     : "r" (~SR_FD));
156 }
157 
158 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
159 #define FPSCR_INIT  0x00080000
160 
161 #define	FPSCR_CAUSE_MASK	0x0001f000	/* Cause bits */
162 #define	FPSCR_FLAG_MASK		0x0000007c	/* Flag bits */
163 
164 /*
165  * Return saved PC of a blocked thread.
166  */
167 #define thread_saved_pc(tsk)	(tsk->thread.pc)
168 
169 void show_trace(struct task_struct *tsk, unsigned long *sp,
170 		struct pt_regs *regs, const char *loglvl);
171 
172 #ifdef CONFIG_DUMP_CODE
173 void show_code(struct pt_regs *regs);
174 #else
show_code(struct pt_regs * regs)175 static inline void show_code(struct pt_regs *regs)
176 {
177 }
178 #endif
179 
180 extern unsigned long __get_wchan(struct task_struct *p);
181 
182 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->pc)
183 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->regs[15])
184 
185 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
186 
187 #define PREFETCH_STRIDE		L1_CACHE_BYTES
188 #define ARCH_HAS_PREFETCH
189 #define ARCH_HAS_PREFETCHW
190 
prefetch(const void * x)191 static inline void prefetch(const void *x)
192 {
193 	__builtin_prefetch(x, 0, 3);
194 }
195 
prefetchw(const void * x)196 static inline void prefetchw(const void *x)
197 {
198 	__builtin_prefetch(x, 1, 3);
199 }
200 #endif
201 
202 #endif /* __ASM_SH_PROCESSOR_32_H */
203