1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _ASM_POWERPC_CODE_PATCHING_H
3 #define _ASM_POWERPC_CODE_PATCHING_H
4
5 /*
6 * Copyright 2008, Michael Ellerman, IBM Corporation.
7 */
8
9 #include <asm/types.h>
10 #include <asm/ppc-opcode.h>
11 #include <linux/string.h>
12 #include <linux/kallsyms.h>
13 #include <asm/asm-compat.h>
14 #include <asm/inst.h>
15
16 /* Flags for create_branch:
17 * "b" == create_branch(addr, target, 0);
18 * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
19 * "bl" == create_branch(addr, target, BRANCH_SET_LINK);
20 * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
21 */
22 #define BRANCH_SET_LINK 0x1
23 #define BRANCH_ABSOLUTE 0x2
24
25 DECLARE_STATIC_KEY_FALSE(init_mem_is_free);
26
27 /*
28 * Powerpc branch instruction is :
29 *
30 * 0 6 30 31
31 * +---------+----------------+---+---+
32 * | opcode | LI |AA |LK |
33 * +---------+----------------+---+---+
34 * Where AA = 0 and LK = 0
35 *
36 * LI is a signed 24 bits integer. The real branch offset is computed
37 * by: imm32 = SignExtend(LI:'0b00', 32);
38 *
39 * So the maximum forward branch should be:
40 * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
41 * The maximum backward branch should be:
42 * (0xff800000 << 2) = 0xfe000000 = -0x2000000
43 */
is_offset_in_branch_range(long offset)44 static inline bool is_offset_in_branch_range(long offset)
45 {
46 return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
47 }
48
is_offset_in_cond_branch_range(long offset)49 static inline bool is_offset_in_cond_branch_range(long offset)
50 {
51 return offset >= -0x8000 && offset <= 0x7fff && !(offset & 0x3);
52 }
53
create_branch(ppc_inst_t * instr,const u32 * addr,unsigned long target,int flags)54 static inline int create_branch(ppc_inst_t *instr, const u32 *addr,
55 unsigned long target, int flags)
56 {
57 long offset;
58
59 *instr = ppc_inst(0);
60 offset = target;
61 if (! (flags & BRANCH_ABSOLUTE))
62 offset = offset - (unsigned long)addr;
63
64 /* Check we can represent the target in the instruction format */
65 if (!is_offset_in_branch_range(offset))
66 return 1;
67
68 /* Mask out the flags and target, so they don't step on each other. */
69 *instr = ppc_inst(0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC));
70
71 return 0;
72 }
73
74 int create_cond_branch(ppc_inst_t *instr, const u32 *addr,
75 unsigned long target, int flags);
76 int patch_branch(u32 *addr, unsigned long target, int flags);
77 int patch_instruction(u32 *addr, ppc_inst_t instr);
78 int raw_patch_instruction(u32 *addr, ppc_inst_t instr);
79
patch_site_addr(s32 * site)80 static inline unsigned long patch_site_addr(s32 *site)
81 {
82 return (unsigned long)site + *site;
83 }
84
patch_instruction_site(s32 * site,ppc_inst_t instr)85 static inline int patch_instruction_site(s32 *site, ppc_inst_t instr)
86 {
87 return patch_instruction((u32 *)patch_site_addr(site), instr);
88 }
89
patch_branch_site(s32 * site,unsigned long target,int flags)90 static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
91 {
92 return patch_branch((u32 *)patch_site_addr(site), target, flags);
93 }
94
modify_instruction(unsigned int * addr,unsigned int clr,unsigned int set)95 static inline int modify_instruction(unsigned int *addr, unsigned int clr,
96 unsigned int set)
97 {
98 return patch_instruction(addr, ppc_inst((*addr & ~clr) | set));
99 }
100
modify_instruction_site(s32 * site,unsigned int clr,unsigned int set)101 static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
102 {
103 return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
104 }
105
branch_opcode(ppc_inst_t instr)106 static inline unsigned int branch_opcode(ppc_inst_t instr)
107 {
108 return ppc_inst_primary_opcode(instr) & 0x3F;
109 }
110
instr_is_branch_iform(ppc_inst_t instr)111 static inline int instr_is_branch_iform(ppc_inst_t instr)
112 {
113 return branch_opcode(instr) == 18;
114 }
115
instr_is_branch_bform(ppc_inst_t instr)116 static inline int instr_is_branch_bform(ppc_inst_t instr)
117 {
118 return branch_opcode(instr) == 16;
119 }
120
121 int instr_is_relative_branch(ppc_inst_t instr);
122 int instr_is_relative_link_branch(ppc_inst_t instr);
123 unsigned long branch_target(const u32 *instr);
124 int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src);
125 bool is_conditional_branch(ppc_inst_t instr);
126
127 #define OP_RT_RA_MASK 0xffff0000UL
128 #define LIS_R2 (PPC_RAW_LIS(_R2, 0))
129 #define ADDIS_R2_R12 (PPC_RAW_ADDIS(_R2, _R12, 0))
130 #define ADDI_R2_R2 (PPC_RAW_ADDI(_R2, _R2, 0))
131
132
ppc_function_entry(void * func)133 static inline unsigned long ppc_function_entry(void *func)
134 {
135 #ifdef CONFIG_PPC64_ELF_ABI_V2
136 u32 *insn = func;
137
138 /*
139 * A PPC64 ABIv2 function may have a local and a global entry
140 * point. We need to use the local entry point when patching
141 * functions, so identify and step over the global entry point
142 * sequence.
143 *
144 * The global entry point sequence is always of the form:
145 *
146 * addis r2,r12,XXXX
147 * addi r2,r2,XXXX
148 *
149 * A linker optimisation may convert the addis to lis:
150 *
151 * lis r2,XXXX
152 * addi r2,r2,XXXX
153 */
154 if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) ||
155 ((*insn & OP_RT_RA_MASK) == LIS_R2)) &&
156 ((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2))
157 return (unsigned long)(insn + 2);
158 else
159 return (unsigned long)func;
160 #elif defined(CONFIG_PPC64_ELF_ABI_V1)
161 /*
162 * On PPC64 ABIv1 the function pointer actually points to the
163 * function's descriptor. The first entry in the descriptor is the
164 * address of the function text.
165 */
166 return ((struct func_desc *)func)->addr;
167 #else
168 return (unsigned long)func;
169 #endif
170 }
171
ppc_global_function_entry(void * func)172 static inline unsigned long ppc_global_function_entry(void *func)
173 {
174 #ifdef CONFIG_PPC64_ELF_ABI_V2
175 /* PPC64 ABIv2 the global entry point is at the address */
176 return (unsigned long)func;
177 #else
178 /* All other cases there is no change vs ppc_function_entry() */
179 return ppc_function_entry(func);
180 #endif
181 }
182
183 /*
184 * Wrapper around kallsyms_lookup() to return function entry address:
185 * - For ABIv1, we lookup the dot variant.
186 * - For ABIv2, we return the local entry point.
187 */
ppc_kallsyms_lookup_name(const char * name)188 static inline unsigned long ppc_kallsyms_lookup_name(const char *name)
189 {
190 unsigned long addr;
191 #ifdef CONFIG_PPC64_ELF_ABI_V1
192 /* check for dot variant */
193 char dot_name[1 + KSYM_NAME_LEN];
194 bool dot_appended = false;
195
196 if (strnlen(name, KSYM_NAME_LEN) >= KSYM_NAME_LEN)
197 return 0;
198
199 if (name[0] != '.') {
200 dot_name[0] = '.';
201 dot_name[1] = '\0';
202 strlcat(dot_name, name, sizeof(dot_name));
203 dot_appended = true;
204 } else {
205 dot_name[0] = '\0';
206 strlcat(dot_name, name, sizeof(dot_name));
207 }
208 addr = kallsyms_lookup_name(dot_name);
209 if (!addr && dot_appended)
210 /* Let's try the original non-dot symbol lookup */
211 addr = kallsyms_lookup_name(name);
212 #elif defined(CONFIG_PPC64_ELF_ABI_V2)
213 addr = kallsyms_lookup_name(name);
214 if (addr)
215 addr = ppc_function_entry((void *)addr);
216 #else
217 addr = kallsyms_lookup_name(name);
218 #endif
219 return addr;
220 }
221
222 /*
223 * Some instruction encodings commonly used in dynamic ftracing
224 * and function live patching.
225 */
226
227 /* This must match the definition of STK_GOT in <asm/ppc_asm.h> */
228 #ifdef CONFIG_PPC64_ELF_ABI_V2
229 #define R2_STACK_OFFSET 24
230 #else
231 #define R2_STACK_OFFSET 40
232 #endif
233
234 #define PPC_INST_LD_TOC PPC_RAW_LD(_R2, _R1, R2_STACK_OFFSET)
235
236 /* usually preceded by a mflr r0 */
237 #define PPC_INST_STD_LR PPC_RAW_STD(_R0, _R1, PPC_LR_STKOFF)
238
239 #endif /* _ASM_POWERPC_CODE_PATCHING_H */
240