1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3	bool
4	default y
5	select ARCH_32BIT_OFF_T if !64BIT
6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7	select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9	select ARCH_HAS_FORTIFY_SOURCE
10	select ARCH_HAS_KCOV
11	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13	select ARCH_HAS_STRNCPY_FROM_USER
14	select ARCH_HAS_STRNLEN_USER
15	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16	select ARCH_HAS_UBSAN_SANITIZE_ALL
17	select ARCH_HAS_GCOV_PROFILE_ALL
18	select ARCH_KEEP_MEMBLOCK
19	select ARCH_SUPPORTS_UPROBES
20	select ARCH_USE_BUILTIN_BSWAP
21	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
22	select ARCH_USE_MEMTEST
23	select ARCH_USE_QUEUED_RWLOCKS
24	select ARCH_USE_QUEUED_SPINLOCKS
25	select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
26	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27	select ARCH_WANT_IPC_PARSE_VERSION
28	select ARCH_WANT_LD_ORPHAN_WARN
29	select BUILDTIME_TABLE_SORT
30	select CLONE_BACKWARDS
31	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
32	select CPU_PM if CPU_IDLE
33	select GENERIC_ATOMIC64 if !64BIT
34	select GENERIC_CMOS_UPDATE
35	select GENERIC_CPU_AUTOPROBE
36	select GENERIC_GETTIMEOFDAY
37	select GENERIC_IOMAP
38	select GENERIC_IRQ_PROBE
39	select GENERIC_IRQ_SHOW
40	select GENERIC_ISA_DMA if EISA
41	select GENERIC_LIB_ASHLDI3
42	select GENERIC_LIB_ASHRDI3
43	select GENERIC_LIB_CMPDI2
44	select GENERIC_LIB_LSHRDI3
45	select GENERIC_LIB_UCMPDI2
46	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47	select GENERIC_SMP_IDLE_THREAD
48	select GENERIC_TIME_VSYSCALL
49	select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50	select HAVE_ARCH_COMPILER_H
51	select HAVE_ARCH_JUMP_LABEL
52	select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53	select HAVE_ARCH_MMAP_RND_BITS if MMU
54	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55	select HAVE_ARCH_SECCOMP_FILTER
56	select HAVE_ARCH_TRACEHOOK
57	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58	select HAVE_ASM_MODVERSIONS
59	select HAVE_CONTEXT_TRACKING_USER
60	select HAVE_TIF_NOHZ
61	select HAVE_C_RECORDMCOUNT
62	select HAVE_DEBUG_KMEMLEAK
63	select HAVE_DEBUG_STACKOVERFLOW
64	select HAVE_DMA_CONTIGUOUS
65	select HAVE_DYNAMIC_FTRACE
66	select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67				!CPU_DADDI_WORKAROUNDS && \
68				!CPU_R4000_WORKAROUNDS && \
69				!CPU_R4400_WORKAROUNDS
70	select HAVE_EXIT_THREAD
71	select HAVE_FAST_GUP
72	select HAVE_FTRACE_MCOUNT_RECORD
73	select HAVE_FUNCTION_GRAPH_TRACER
74	select HAVE_FUNCTION_TRACER
75	select HAVE_GCC_PLUGINS
76	select HAVE_GENERIC_VDSO
77	select HAVE_IOREMAP_PROT
78	select HAVE_IRQ_EXIT_ON_IRQ_STACK
79	select HAVE_IRQ_TIME_ACCOUNTING
80	select HAVE_KPROBES
81	select HAVE_KRETPROBES
82	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83	select HAVE_MOD_ARCH_SPECIFIC
84	select HAVE_NMI
85	select HAVE_PERF_EVENTS
86	select HAVE_PERF_REGS
87	select HAVE_PERF_USER_STACK_DUMP
88	select HAVE_REGS_AND_STACK_ACCESS_API
89	select HAVE_RSEQ
90	select HAVE_SPARSE_SYSCALL_NR
91	select HAVE_STACKPROTECTOR
92	select HAVE_SYSCALL_TRACEPOINTS
93	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
94	select IRQ_FORCED_THREADING
95	select ISA if EISA
96	select MODULES_USE_ELF_REL if MODULES
97	select MODULES_USE_ELF_RELA if MODULES && 64BIT
98	select PERF_USE_VMALLOC
99	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100	select RTC_LIB
101	select SYSCTL_EXCEPTION_TRACE
102	select TRACE_IRQFLAGS_SUPPORT
103	select ARCH_HAS_ELFCORE_COMPAT
104	select HAVE_ARCH_KCSAN if 64BIT
105
106config MIPS_FIXUP_BIGPHYS_ADDR
107	bool
108
109config MIPS_GENERIC
110	bool
111
112config MACH_INGENIC
113	bool
114	select SYS_SUPPORTS_32BIT_KERNEL
115	select SYS_SUPPORTS_LITTLE_ENDIAN
116	select SYS_SUPPORTS_ZBOOT
117	select DMA_NONCOHERENT
118	select ARCH_HAS_SYNC_DMA_FOR_CPU
119	select IRQ_MIPS_CPU
120	select PINCTRL
121	select GPIOLIB
122	select COMMON_CLK
123	select GENERIC_IRQ_CHIP
124	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
125	select USE_OF
126	select CPU_SUPPORTS_CPUFREQ
127	select MIPS_EXTERNAL_TIMER
128
129menu "Machine selection"
130
131choice
132	prompt "System type"
133	default MIPS_GENERIC_KERNEL
134
135config MIPS_GENERIC_KERNEL
136	bool "Generic board-agnostic MIPS kernel"
137	select ARCH_HAS_SETUP_DMA_OPS
138	select MIPS_GENERIC
139	select BOOT_RAW
140	select BUILTIN_DTB
141	select CEVT_R4K
142	select CLKSRC_MIPS_GIC
143	select COMMON_CLK
144	select CPU_MIPSR2_IRQ_EI
145	select CPU_MIPSR2_IRQ_VI
146	select CSRC_R4K
147	select DMA_NONCOHERENT
148	select HAVE_PCI
149	select IRQ_MIPS_CPU
150	select MIPS_AUTO_PFN_OFFSET
151	select MIPS_CPU_SCACHE
152	select MIPS_GIC
153	select MIPS_L1_CACHE_SHIFT_7
154	select NO_EXCEPT_FILL
155	select PCI_DRIVERS_GENERIC
156	select SMP_UP if SMP
157	select SWAP_IO_SPACE
158	select SYS_HAS_CPU_MIPS32_R1
159	select SYS_HAS_CPU_MIPS32_R2
160	select SYS_HAS_CPU_MIPS32_R6
161	select SYS_HAS_CPU_MIPS64_R1
162	select SYS_HAS_CPU_MIPS64_R2
163	select SYS_HAS_CPU_MIPS64_R6
164	select SYS_SUPPORTS_32BIT_KERNEL
165	select SYS_SUPPORTS_64BIT_KERNEL
166	select SYS_SUPPORTS_BIG_ENDIAN
167	select SYS_SUPPORTS_HIGHMEM
168	select SYS_SUPPORTS_LITTLE_ENDIAN
169	select SYS_SUPPORTS_MICROMIPS
170	select SYS_SUPPORTS_MIPS16
171	select SYS_SUPPORTS_MIPS_CPS
172	select SYS_SUPPORTS_MULTITHREADING
173	select SYS_SUPPORTS_RELOCATABLE
174	select SYS_SUPPORTS_SMARTMIPS
175	select SYS_SUPPORTS_ZBOOT
176	select UHI_BOOT
177	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
183	select USE_OF
184	help
185	  Select this to build a kernel which aims to support multiple boards,
186	  generally using a flattened device tree passed from the bootloader
187	  using the boot protocol defined in the UHI (Unified Hosting
188	  Interface) specification.
189
190config MIPS_ALCHEMY
191	bool "Alchemy processor based machines"
192	select PHYS_ADDR_T_64BIT
193	select CEVT_R4K
194	select CSRC_R4K
195	select IRQ_MIPS_CPU
196	select DMA_NONCOHERENT		# Au1000,1500,1100 aren't, rest is
197	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198	select SYS_HAS_CPU_MIPS32_R1
199	select SYS_SUPPORTS_32BIT_KERNEL
200	select SYS_SUPPORTS_APM_EMULATION
201	select GPIOLIB
202	select SYS_SUPPORTS_ZBOOT
203	select COMMON_CLK
204
205config AR7
206	bool "Texas Instruments AR7"
207	select BOOT_ELF32
208	select COMMON_CLK
209	select DMA_NONCOHERENT
210	select CEVT_R4K
211	select CSRC_R4K
212	select IRQ_MIPS_CPU
213	select NO_EXCEPT_FILL
214	select SWAP_IO_SPACE
215	select SYS_HAS_CPU_MIPS32_R1
216	select SYS_HAS_EARLY_PRINTK
217	select SYS_SUPPORTS_32BIT_KERNEL
218	select SYS_SUPPORTS_LITTLE_ENDIAN
219	select SYS_SUPPORTS_MIPS16
220	select SYS_SUPPORTS_ZBOOT_UART16550
221	select GPIOLIB
222	select VLYNQ
223	help
224	  Support for the Texas Instruments AR7 System-on-a-Chip
225	  family: TNETD7100, 7200 and 7300.
226
227config ATH25
228	bool "Atheros AR231x/AR531x SoC support"
229	select CEVT_R4K
230	select CSRC_R4K
231	select DMA_NONCOHERENT
232	select IRQ_MIPS_CPU
233	select IRQ_DOMAIN
234	select SYS_HAS_CPU_MIPS32_R1
235	select SYS_SUPPORTS_BIG_ENDIAN
236	select SYS_SUPPORTS_32BIT_KERNEL
237	select SYS_HAS_EARLY_PRINTK
238	help
239	  Support for Atheros AR231x and Atheros AR531x based boards
240
241config ATH79
242	bool "Atheros AR71XX/AR724X/AR913X based boards"
243	select ARCH_HAS_RESET_CONTROLLER
244	select BOOT_RAW
245	select CEVT_R4K
246	select CSRC_R4K
247	select DMA_NONCOHERENT
248	select GPIOLIB
249	select PINCTRL
250	select COMMON_CLK
251	select IRQ_MIPS_CPU
252	select SYS_HAS_CPU_MIPS32_R2
253	select SYS_HAS_EARLY_PRINTK
254	select SYS_SUPPORTS_32BIT_KERNEL
255	select SYS_SUPPORTS_BIG_ENDIAN
256	select SYS_SUPPORTS_MIPS16
257	select SYS_SUPPORTS_ZBOOT_UART_PROM
258	select USE_OF
259	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
260	help
261	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
262
263config BMIPS_GENERIC
264	bool "Broadcom Generic BMIPS kernel"
265	select ARCH_HAS_RESET_CONTROLLER
266	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
267	select BOOT_RAW
268	select NO_EXCEPT_FILL
269	select USE_OF
270	select CEVT_R4K
271	select CSRC_R4K
272	select SYNC_R4K
273	select COMMON_CLK
274	select BCM6345_L1_IRQ
275	select BCM7038_L1_IRQ
276	select BCM7120_L2_IRQ
277	select BRCMSTB_L2_IRQ
278	select IRQ_MIPS_CPU
279	select DMA_NONCOHERENT
280	select SYS_SUPPORTS_32BIT_KERNEL
281	select SYS_SUPPORTS_LITTLE_ENDIAN
282	select SYS_SUPPORTS_BIG_ENDIAN
283	select SYS_SUPPORTS_HIGHMEM
284	select SYS_HAS_CPU_BMIPS32_3300
285	select SYS_HAS_CPU_BMIPS4350
286	select SYS_HAS_CPU_BMIPS4380
287	select SYS_HAS_CPU_BMIPS5000
288	select SWAP_IO_SPACE
289	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293	select HARDIRQS_SW_RESEND
294	select HAVE_PCI
295	select PCI_DRIVERS_GENERIC
296	select FW_CFE
297	help
298	  Build a generic DT-based kernel image that boots on select
299	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
300	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
301	  must be set appropriately for your board.
302
303config BCM47XX
304	bool "Broadcom BCM47XX based boards"
305	select BOOT_RAW
306	select CEVT_R4K
307	select CSRC_R4K
308	select DMA_NONCOHERENT
309	select HAVE_PCI
310	select IRQ_MIPS_CPU
311	select SYS_HAS_CPU_MIPS32_R1
312	select NO_EXCEPT_FILL
313	select SYS_SUPPORTS_32BIT_KERNEL
314	select SYS_SUPPORTS_LITTLE_ENDIAN
315	select SYS_SUPPORTS_MIPS16
316	select SYS_SUPPORTS_ZBOOT
317	select SYS_HAS_EARLY_PRINTK
318	select USE_GENERIC_EARLY_PRINTK_8250
319	select GPIOLIB
320	select LEDS_GPIO_REGISTER
321	select BCM47XX_NVRAM
322	select BCM47XX_SPROM
323	select BCM47XX_SSB if !BCM47XX_BCMA
324	help
325	  Support for BCM47XX based boards
326
327config BCM63XX
328	bool "Broadcom BCM63XX based boards"
329	select BOOT_RAW
330	select CEVT_R4K
331	select CSRC_R4K
332	select SYNC_R4K
333	select DMA_NONCOHERENT
334	select IRQ_MIPS_CPU
335	select SYS_SUPPORTS_32BIT_KERNEL
336	select SYS_SUPPORTS_BIG_ENDIAN
337	select SYS_HAS_EARLY_PRINTK
338	select SYS_HAS_CPU_BMIPS32_3300
339	select SYS_HAS_CPU_BMIPS4350
340	select SYS_HAS_CPU_BMIPS4380
341	select SWAP_IO_SPACE
342	select GPIOLIB
343	select MIPS_L1_CACHE_SHIFT_4
344	select HAVE_LEGACY_CLK
345	help
346	  Support for BCM63XX based boards
347
348config MIPS_COBALT
349	bool "Cobalt Server"
350	select CEVT_R4K
351	select CSRC_R4K
352	select CEVT_GT641XX
353	select DMA_NONCOHERENT
354	select FORCE_PCI
355	select I8253
356	select I8259
357	select IRQ_MIPS_CPU
358	select IRQ_GT641XX
359	select PCI_GT64XXX_PCI0
360	select SYS_HAS_CPU_NEVADA
361	select SYS_HAS_EARLY_PRINTK
362	select SYS_SUPPORTS_32BIT_KERNEL
363	select SYS_SUPPORTS_64BIT_KERNEL
364	select SYS_SUPPORTS_LITTLE_ENDIAN
365	select USE_GENERIC_EARLY_PRINTK_8250
366
367config MACH_DECSTATION
368	bool "DECstations"
369	select BOOT_ELF32
370	select CEVT_DS1287
371	select CEVT_R4K if CPU_R4X00
372	select CSRC_IOASIC
373	select CSRC_R4K if CPU_R4X00
374	select CPU_DADDI_WORKAROUNDS if 64BIT
375	select CPU_R4000_WORKAROUNDS if 64BIT
376	select CPU_R4400_WORKAROUNDS if 64BIT
377	select DMA_NONCOHERENT
378	select NO_IOPORT_MAP
379	select IRQ_MIPS_CPU
380	select SYS_HAS_CPU_R3000
381	select SYS_HAS_CPU_R4X00
382	select SYS_SUPPORTS_32BIT_KERNEL
383	select SYS_SUPPORTS_64BIT_KERNEL
384	select SYS_SUPPORTS_LITTLE_ENDIAN
385	select SYS_SUPPORTS_128HZ
386	select SYS_SUPPORTS_256HZ
387	select SYS_SUPPORTS_1024HZ
388	select MIPS_L1_CACHE_SHIFT_4
389	help
390	  This enables support for DEC's MIPS based workstations.  For details
391	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
392	  DECstation porting pages on <http://decstation.unix-ag.org/>.
393
394	  If you have one of the following DECstation Models you definitely
395	  want to choose R4xx0 for the CPU Type:
396
397		DECstation 5000/50
398		DECstation 5000/150
399		DECstation 5000/260
400		DECsystem 5900/260
401
402	  otherwise choose R3000.
403
404config MACH_JAZZ
405	bool "Jazz family of machines"
406	select ARC_MEMORY
407	select ARC_PROMLIB
408	select ARCH_MIGHT_HAVE_PC_PARPORT
409	select ARCH_MIGHT_HAVE_PC_SERIO
410	select DMA_OPS
411	select FW_ARC
412	select FW_ARC32
413	select ARCH_MAY_HAVE_PC_FDC
414	select CEVT_R4K
415	select CSRC_R4K
416	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
417	select GENERIC_ISA_DMA
418	select HAVE_PCSPKR_PLATFORM
419	select IRQ_MIPS_CPU
420	select I8253
421	select I8259
422	select ISA
423	select SYS_HAS_CPU_R4X00
424	select SYS_SUPPORTS_32BIT_KERNEL
425	select SYS_SUPPORTS_64BIT_KERNEL
426	select SYS_SUPPORTS_100HZ
427	select SYS_SUPPORTS_LITTLE_ENDIAN
428	help
429	  This a family of machines based on the MIPS R4030 chipset which was
430	  used by several vendors to build RISC/os and Windows NT workstations.
431	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
432	  Olivetti M700-10 workstations.
433
434config MACH_INGENIC_SOC
435	bool "Ingenic SoC based machines"
436	select MIPS_GENERIC
437	select MACH_INGENIC
438	select SYS_SUPPORTS_ZBOOT_UART16550
439	select CPU_SUPPORTS_CPUFREQ
440	select MIPS_EXTERNAL_TIMER
441
442config LANTIQ
443	bool "Lantiq based platforms"
444	select DMA_NONCOHERENT
445	select IRQ_MIPS_CPU
446	select CEVT_R4K
447	select CSRC_R4K
448	select SYS_HAS_CPU_MIPS32_R1
449	select SYS_HAS_CPU_MIPS32_R2
450	select SYS_SUPPORTS_BIG_ENDIAN
451	select SYS_SUPPORTS_32BIT_KERNEL
452	select SYS_SUPPORTS_MIPS16
453	select SYS_SUPPORTS_MULTITHREADING
454	select SYS_SUPPORTS_VPE_LOADER
455	select SYS_HAS_EARLY_PRINTK
456	select GPIOLIB
457	select SWAP_IO_SPACE
458	select BOOT_RAW
459	select HAVE_LEGACY_CLK
460	select USE_OF
461	select PINCTRL
462	select PINCTRL_LANTIQ
463	select ARCH_HAS_RESET_CONTROLLER
464	select RESET_CONTROLLER
465
466config MACH_LOONGSON32
467	bool "Loongson 32-bit family of machines"
468	select SYS_SUPPORTS_ZBOOT
469	help
470	  This enables support for the Loongson-1 family of machines.
471
472	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
473	  the Institute of Computing Technology (ICT), Chinese Academy of
474	  Sciences (CAS).
475
476config MACH_LOONGSON2EF
477	bool "Loongson-2E/F family of machines"
478	select SYS_SUPPORTS_ZBOOT
479	help
480	  This enables the support of early Loongson-2E/F family of machines.
481
482config MACH_LOONGSON64
483	bool "Loongson 64-bit family of machines"
484	select ARCH_SPARSEMEM_ENABLE
485	select ARCH_MIGHT_HAVE_PC_PARPORT
486	select ARCH_MIGHT_HAVE_PC_SERIO
487	select GENERIC_ISA_DMA_SUPPORT_BROKEN
488	select BOOT_ELF32
489	select BOARD_SCACHE
490	select CSRC_R4K
491	select CEVT_R4K
492	select CPU_HAS_WB
493	select FORCE_PCI
494	select ISA
495	select I8259
496	select IRQ_MIPS_CPU
497	select NO_EXCEPT_FILL
498	select NR_CPUS_DEFAULT_64
499	select USE_GENERIC_EARLY_PRINTK_8250
500	select PCI_DRIVERS_GENERIC
501	select SYS_HAS_CPU_LOONGSON64
502	select SYS_HAS_EARLY_PRINTK
503	select SYS_SUPPORTS_SMP
504	select SYS_SUPPORTS_HOTPLUG_CPU
505	select SYS_SUPPORTS_NUMA
506	select SYS_SUPPORTS_64BIT_KERNEL
507	select SYS_SUPPORTS_HIGHMEM
508	select SYS_SUPPORTS_LITTLE_ENDIAN
509	select SYS_SUPPORTS_ZBOOT
510	select SYS_SUPPORTS_RELOCATABLE
511	select ZONE_DMA32
512	select COMMON_CLK
513	select USE_OF
514	select BUILTIN_DTB
515	select PCI_HOST_GENERIC
516	select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
517	help
518	  This enables the support of Loongson-2/3 family of machines.
519
520	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
521	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
522	  and Loongson-2F which will be removed), developed by the Institute
523	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
524
525config MIPS_MALTA
526	bool "MIPS Malta board"
527	select ARCH_MAY_HAVE_PC_FDC
528	select ARCH_MIGHT_HAVE_PC_PARPORT
529	select ARCH_MIGHT_HAVE_PC_SERIO
530	select BOOT_ELF32
531	select BOOT_RAW
532	select BUILTIN_DTB
533	select CEVT_R4K
534	select CLKSRC_MIPS_GIC
535	select COMMON_CLK
536	select CSRC_R4K
537	select DMA_NONCOHERENT
538	select GENERIC_ISA_DMA
539	select HAVE_PCSPKR_PLATFORM
540	select HAVE_PCI
541	select I8253
542	select I8259
543	select IRQ_MIPS_CPU
544	select MIPS_BONITO64
545	select MIPS_CPU_SCACHE
546	select MIPS_GIC
547	select MIPS_L1_CACHE_SHIFT_6
548	select MIPS_MSC
549	select PCI_GT64XXX_PCI0
550	select SMP_UP if SMP
551	select SWAP_IO_SPACE
552	select SYS_HAS_CPU_MIPS32_R1
553	select SYS_HAS_CPU_MIPS32_R2
554	select SYS_HAS_CPU_MIPS32_R3_5
555	select SYS_HAS_CPU_MIPS32_R5
556	select SYS_HAS_CPU_MIPS32_R6
557	select SYS_HAS_CPU_MIPS64_R1
558	select SYS_HAS_CPU_MIPS64_R2
559	select SYS_HAS_CPU_MIPS64_R6
560	select SYS_HAS_CPU_NEVADA
561	select SYS_HAS_CPU_RM7000
562	select SYS_SUPPORTS_32BIT_KERNEL
563	select SYS_SUPPORTS_64BIT_KERNEL
564	select SYS_SUPPORTS_BIG_ENDIAN
565	select SYS_SUPPORTS_HIGHMEM
566	select SYS_SUPPORTS_LITTLE_ENDIAN
567	select SYS_SUPPORTS_MICROMIPS
568	select SYS_SUPPORTS_MIPS16
569	select SYS_SUPPORTS_MIPS_CMP
570	select SYS_SUPPORTS_MIPS_CPS
571	select SYS_SUPPORTS_MULTITHREADING
572	select SYS_SUPPORTS_RELOCATABLE
573	select SYS_SUPPORTS_SMARTMIPS
574	select SYS_SUPPORTS_VPE_LOADER
575	select SYS_SUPPORTS_ZBOOT
576	select USE_OF
577	select WAR_ICACHE_REFILLS
578	select ZONE_DMA32 if 64BIT
579	help
580	  This enables support for the MIPS Technologies Malta evaluation
581	  board.
582
583config MACH_PIC32
584	bool "Microchip PIC32 Family"
585	help
586	  This enables support for the Microchip PIC32 family of platforms.
587
588	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
589	  microcontrollers.
590
591config MACH_NINTENDO64
592	bool "Nintendo 64 console"
593	select CEVT_R4K
594	select CSRC_R4K
595	select SYS_HAS_CPU_R4300
596	select SYS_SUPPORTS_BIG_ENDIAN
597	select SYS_SUPPORTS_ZBOOT
598	select SYS_SUPPORTS_32BIT_KERNEL
599	select SYS_SUPPORTS_64BIT_KERNEL
600	select DMA_NONCOHERENT
601	select IRQ_MIPS_CPU
602
603config RALINK
604	bool "Ralink based machines"
605	select CEVT_R4K
606	select COMMON_CLK
607	select CSRC_R4K
608	select BOOT_RAW
609	select DMA_NONCOHERENT
610	select IRQ_MIPS_CPU
611	select USE_OF
612	select SYS_HAS_CPU_MIPS32_R1
613	select SYS_HAS_CPU_MIPS32_R2
614	select SYS_SUPPORTS_32BIT_KERNEL
615	select SYS_SUPPORTS_LITTLE_ENDIAN
616	select SYS_SUPPORTS_MIPS16
617	select SYS_SUPPORTS_ZBOOT
618	select SYS_HAS_EARLY_PRINTK
619	select ARCH_HAS_RESET_CONTROLLER
620	select RESET_CONTROLLER
621
622config MACH_REALTEK_RTL
623	bool "Realtek RTL838x/RTL839x based machines"
624	select MIPS_GENERIC
625	select DMA_NONCOHERENT
626	select IRQ_MIPS_CPU
627	select CSRC_R4K
628	select CEVT_R4K
629	select SYS_HAS_CPU_MIPS32_R1
630	select SYS_HAS_CPU_MIPS32_R2
631	select SYS_SUPPORTS_BIG_ENDIAN
632	select SYS_SUPPORTS_32BIT_KERNEL
633	select SYS_SUPPORTS_MIPS16
634	select SYS_SUPPORTS_MULTITHREADING
635	select SYS_SUPPORTS_VPE_LOADER
636	select BOOT_RAW
637	select PINCTRL
638	select USE_OF
639
640config SGI_IP22
641	bool "SGI IP22 (Indy/Indigo2)"
642	select ARC_MEMORY
643	select ARC_PROMLIB
644	select FW_ARC
645	select FW_ARC32
646	select ARCH_MIGHT_HAVE_PC_SERIO
647	select BOOT_ELF32
648	select CEVT_R4K
649	select CSRC_R4K
650	select DEFAULT_SGI_PARTITION
651	select DMA_NONCOHERENT
652	select HAVE_EISA
653	select I8253
654	select I8259
655	select IP22_CPU_SCACHE
656	select IRQ_MIPS_CPU
657	select GENERIC_ISA_DMA_SUPPORT_BROKEN
658	select SGI_HAS_I8042
659	select SGI_HAS_INDYDOG
660	select SGI_HAS_HAL2
661	select SGI_HAS_SEEQ
662	select SGI_HAS_WD93
663	select SGI_HAS_ZILOG
664	select SWAP_IO_SPACE
665	select SYS_HAS_CPU_R4X00
666	select SYS_HAS_CPU_R5000
667	select SYS_HAS_EARLY_PRINTK
668	select SYS_SUPPORTS_32BIT_KERNEL
669	select SYS_SUPPORTS_64BIT_KERNEL
670	select SYS_SUPPORTS_BIG_ENDIAN
671	select WAR_R4600_V1_INDEX_ICACHEOP
672	select WAR_R4600_V1_HIT_CACHEOP
673	select WAR_R4600_V2_HIT_CACHEOP
674	select MIPS_L1_CACHE_SHIFT_7
675	help
676	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
677	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
678	  that runs on these, say Y here.
679
680config SGI_IP27
681	bool "SGI IP27 (Origin200/2000)"
682	select ARCH_HAS_PHYS_TO_DMA
683	select ARCH_SPARSEMEM_ENABLE
684	select FW_ARC
685	select FW_ARC64
686	select ARC_CMDLINE_ONLY
687	select BOOT_ELF64
688	select DEFAULT_SGI_PARTITION
689	select FORCE_PCI
690	select SYS_HAS_EARLY_PRINTK
691	select HAVE_PCI
692	select IRQ_MIPS_CPU
693	select IRQ_DOMAIN_HIERARCHY
694	select NR_CPUS_DEFAULT_64
695	select PCI_DRIVERS_GENERIC
696	select PCI_XTALK_BRIDGE
697	select SYS_HAS_CPU_R10000
698	select SYS_SUPPORTS_64BIT_KERNEL
699	select SYS_SUPPORTS_BIG_ENDIAN
700	select SYS_SUPPORTS_NUMA
701	select SYS_SUPPORTS_SMP
702	select WAR_R10000_LLSC
703	select MIPS_L1_CACHE_SHIFT_7
704	select NUMA
705	select HAVE_ARCH_NODEDATA_EXTENSION
706	help
707	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
708	  workstations.  To compile a Linux kernel that runs on these, say Y
709	  here.
710
711config SGI_IP28
712	bool "SGI IP28 (Indigo2 R10k)"
713	select ARC_MEMORY
714	select ARC_PROMLIB
715	select FW_ARC
716	select FW_ARC64
717	select ARCH_MIGHT_HAVE_PC_SERIO
718	select BOOT_ELF64
719	select CEVT_R4K
720	select CSRC_R4K
721	select DEFAULT_SGI_PARTITION
722	select DMA_NONCOHERENT
723	select GENERIC_ISA_DMA_SUPPORT_BROKEN
724	select IRQ_MIPS_CPU
725	select HAVE_EISA
726	select I8253
727	select I8259
728	select SGI_HAS_I8042
729	select SGI_HAS_INDYDOG
730	select SGI_HAS_HAL2
731	select SGI_HAS_SEEQ
732	select SGI_HAS_WD93
733	select SGI_HAS_ZILOG
734	select SWAP_IO_SPACE
735	select SYS_HAS_CPU_R10000
736	select SYS_HAS_EARLY_PRINTK
737	select SYS_SUPPORTS_64BIT_KERNEL
738	select SYS_SUPPORTS_BIG_ENDIAN
739	select WAR_R10000_LLSC
740	select MIPS_L1_CACHE_SHIFT_7
741	help
742	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
743	  kernel that runs on these, say Y here.
744
745config SGI_IP30
746	bool "SGI IP30 (Octane/Octane2)"
747	select ARCH_HAS_PHYS_TO_DMA
748	select FW_ARC
749	select FW_ARC64
750	select BOOT_ELF64
751	select CEVT_R4K
752	select CSRC_R4K
753	select FORCE_PCI
754	select SYNC_R4K if SMP
755	select ZONE_DMA32
756	select HAVE_PCI
757	select IRQ_MIPS_CPU
758	select IRQ_DOMAIN_HIERARCHY
759	select PCI_DRIVERS_GENERIC
760	select PCI_XTALK_BRIDGE
761	select SYS_HAS_EARLY_PRINTK
762	select SYS_HAS_CPU_R10000
763	select SYS_SUPPORTS_64BIT_KERNEL
764	select SYS_SUPPORTS_BIG_ENDIAN
765	select SYS_SUPPORTS_SMP
766	select WAR_R10000_LLSC
767	select MIPS_L1_CACHE_SHIFT_7
768	select ARC_MEMORY
769	help
770	  These are the SGI Octane and Octane2 graphics workstations.  To
771	  compile a Linux kernel that runs on these, say Y here.
772
773config SGI_IP32
774	bool "SGI IP32 (O2)"
775	select ARC_MEMORY
776	select ARC_PROMLIB
777	select ARCH_HAS_PHYS_TO_DMA
778	select FW_ARC
779	select FW_ARC32
780	select BOOT_ELF32
781	select CEVT_R4K
782	select CSRC_R4K
783	select DMA_NONCOHERENT
784	select HAVE_PCI
785	select IRQ_MIPS_CPU
786	select R5000_CPU_SCACHE
787	select RM7000_CPU_SCACHE
788	select SYS_HAS_CPU_R5000
789	select SYS_HAS_CPU_R10000 if BROKEN
790	select SYS_HAS_CPU_RM7000
791	select SYS_HAS_CPU_NEVADA
792	select SYS_SUPPORTS_64BIT_KERNEL
793	select SYS_SUPPORTS_BIG_ENDIAN
794	select WAR_ICACHE_REFILLS
795	help
796	  If you want this kernel to run on SGI O2 workstation, say Y here.
797
798config SIBYTE_CRHINE
799	bool "Sibyte BCM91120C-CRhine"
800	select BOOT_ELF32
801	select SIBYTE_BCM1120
802	select SWAP_IO_SPACE
803	select SYS_HAS_CPU_SB1
804	select SYS_SUPPORTS_BIG_ENDIAN
805	select SYS_SUPPORTS_LITTLE_ENDIAN
806
807config SIBYTE_CARMEL
808	bool "Sibyte BCM91120x-Carmel"
809	select BOOT_ELF32
810	select SIBYTE_BCM1120
811	select SWAP_IO_SPACE
812	select SYS_HAS_CPU_SB1
813	select SYS_SUPPORTS_BIG_ENDIAN
814	select SYS_SUPPORTS_LITTLE_ENDIAN
815
816config SIBYTE_CRHONE
817	bool "Sibyte BCM91125C-CRhone"
818	select BOOT_ELF32
819	select SIBYTE_BCM1125
820	select SWAP_IO_SPACE
821	select SYS_HAS_CPU_SB1
822	select SYS_SUPPORTS_BIG_ENDIAN
823	select SYS_SUPPORTS_HIGHMEM
824	select SYS_SUPPORTS_LITTLE_ENDIAN
825
826config SIBYTE_RHONE
827	bool "Sibyte BCM91125E-Rhone"
828	select BOOT_ELF32
829	select SIBYTE_BCM1125H
830	select SWAP_IO_SPACE
831	select SYS_HAS_CPU_SB1
832	select SYS_SUPPORTS_BIG_ENDIAN
833	select SYS_SUPPORTS_LITTLE_ENDIAN
834
835config SIBYTE_SWARM
836	bool "Sibyte BCM91250A-SWARM"
837	select BOOT_ELF32
838	select HAVE_PATA_PLATFORM
839	select SIBYTE_SB1250
840	select SWAP_IO_SPACE
841	select SYS_HAS_CPU_SB1
842	select SYS_SUPPORTS_BIG_ENDIAN
843	select SYS_SUPPORTS_HIGHMEM
844	select SYS_SUPPORTS_LITTLE_ENDIAN
845	select ZONE_DMA32 if 64BIT
846	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
847
848config SIBYTE_LITTLESUR
849	bool "Sibyte BCM91250C2-LittleSur"
850	select BOOT_ELF32
851	select HAVE_PATA_PLATFORM
852	select SIBYTE_SB1250
853	select SWAP_IO_SPACE
854	select SYS_HAS_CPU_SB1
855	select SYS_SUPPORTS_BIG_ENDIAN
856	select SYS_SUPPORTS_HIGHMEM
857	select SYS_SUPPORTS_LITTLE_ENDIAN
858	select ZONE_DMA32 if 64BIT
859
860config SIBYTE_SENTOSA
861	bool "Sibyte BCM91250E-Sentosa"
862	select BOOT_ELF32
863	select SIBYTE_SB1250
864	select SWAP_IO_SPACE
865	select SYS_HAS_CPU_SB1
866	select SYS_SUPPORTS_BIG_ENDIAN
867	select SYS_SUPPORTS_LITTLE_ENDIAN
868	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
869
870config SIBYTE_BIGSUR
871	bool "Sibyte BCM91480B-BigSur"
872	select BOOT_ELF32
873	select NR_CPUS_DEFAULT_4
874	select SIBYTE_BCM1x80
875	select SWAP_IO_SPACE
876	select SYS_HAS_CPU_SB1
877	select SYS_SUPPORTS_BIG_ENDIAN
878	select SYS_SUPPORTS_HIGHMEM
879	select SYS_SUPPORTS_LITTLE_ENDIAN
880	select ZONE_DMA32 if 64BIT
881	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
882
883config SNI_RM
884	bool "SNI RM200/300/400"
885	select ARC_MEMORY
886	select ARC_PROMLIB
887	select FW_ARC if CPU_LITTLE_ENDIAN
888	select FW_ARC32 if CPU_LITTLE_ENDIAN
889	select FW_SNIPROM if CPU_BIG_ENDIAN
890	select ARCH_MAY_HAVE_PC_FDC
891	select ARCH_MIGHT_HAVE_PC_PARPORT
892	select ARCH_MIGHT_HAVE_PC_SERIO
893	select BOOT_ELF32
894	select CEVT_R4K
895	select CSRC_R4K
896	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
897	select DMA_NONCOHERENT
898	select GENERIC_ISA_DMA
899	select HAVE_EISA
900	select HAVE_PCSPKR_PLATFORM
901	select HAVE_PCI
902	select IRQ_MIPS_CPU
903	select I8253
904	select I8259
905	select ISA
906	select MIPS_L1_CACHE_SHIFT_6
907	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
908	select SYS_HAS_CPU_R4X00
909	select SYS_HAS_CPU_R5000
910	select SYS_HAS_CPU_R10000
911	select R5000_CPU_SCACHE
912	select SYS_HAS_EARLY_PRINTK
913	select SYS_SUPPORTS_32BIT_KERNEL
914	select SYS_SUPPORTS_64BIT_KERNEL
915	select SYS_SUPPORTS_BIG_ENDIAN
916	select SYS_SUPPORTS_HIGHMEM
917	select SYS_SUPPORTS_LITTLE_ENDIAN
918	select WAR_R4600_V2_HIT_CACHEOP
919	help
920	  The SNI RM200/300/400 are MIPS-based machines manufactured by
921	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
922	  Technology and now in turn merged with Fujitsu.  Say Y here to
923	  support this machine type.
924
925config MACH_TX49XX
926	bool "Toshiba TX49 series based machines"
927	select WAR_TX49XX_ICACHE_INDEX_INV
928
929config MIKROTIK_RB532
930	bool "Mikrotik RB532 boards"
931	select CEVT_R4K
932	select CSRC_R4K
933	select DMA_NONCOHERENT
934	select HAVE_PCI
935	select IRQ_MIPS_CPU
936	select SYS_HAS_CPU_MIPS32_R1
937	select SYS_SUPPORTS_32BIT_KERNEL
938	select SYS_SUPPORTS_LITTLE_ENDIAN
939	select SWAP_IO_SPACE
940	select BOOT_RAW
941	select GPIOLIB
942	select MIPS_L1_CACHE_SHIFT_4
943	help
944	  Support the Mikrotik(tm) RouterBoard 532 series,
945	  based on the IDT RC32434 SoC.
946
947config CAVIUM_OCTEON_SOC
948	bool "Cavium Networks Octeon SoC based boards"
949	select CEVT_R4K
950	select ARCH_HAS_PHYS_TO_DMA
951	select HAVE_RAPIDIO
952	select PHYS_ADDR_T_64BIT
953	select SYS_SUPPORTS_64BIT_KERNEL
954	select SYS_SUPPORTS_BIG_ENDIAN
955	select EDAC_SUPPORT
956	select EDAC_ATOMIC_SCRUB
957	select SYS_SUPPORTS_LITTLE_ENDIAN
958	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
959	select SYS_HAS_EARLY_PRINTK
960	select SYS_HAS_CPU_CAVIUM_OCTEON
961	select HAVE_PCI
962	select HAVE_PLAT_DELAY
963	select HAVE_PLAT_FW_INIT_CMDLINE
964	select HAVE_PLAT_MEMCPY
965	select ZONE_DMA32
966	select GPIOLIB
967	select USE_OF
968	select ARCH_SPARSEMEM_ENABLE
969	select SYS_SUPPORTS_SMP
970	select NR_CPUS_DEFAULT_64
971	select MIPS_NR_CPU_NR_MAP_1024
972	select BUILTIN_DTB
973	select MTD
974	select MTD_COMPLEX_MAPPINGS
975	select SWIOTLB
976	select SYS_SUPPORTS_RELOCATABLE
977	help
978	  This option supports all of the Octeon reference boards from Cavium
979	  Networks. It builds a kernel that dynamically determines the Octeon
980	  CPU type and supports all known board reference implementations.
981	  Some of the supported boards are:
982		EBT3000
983		EBH3000
984		EBH3100
985		Thunder
986		Kodama
987		Hikari
988	  Say Y here for most Octeon reference boards.
989
990endchoice
991
992source "arch/mips/alchemy/Kconfig"
993source "arch/mips/ath25/Kconfig"
994source "arch/mips/ath79/Kconfig"
995source "arch/mips/bcm47xx/Kconfig"
996source "arch/mips/bcm63xx/Kconfig"
997source "arch/mips/bmips/Kconfig"
998source "arch/mips/generic/Kconfig"
999source "arch/mips/ingenic/Kconfig"
1000source "arch/mips/jazz/Kconfig"
1001source "arch/mips/lantiq/Kconfig"
1002source "arch/mips/pic32/Kconfig"
1003source "arch/mips/ralink/Kconfig"
1004source "arch/mips/sgi-ip27/Kconfig"
1005source "arch/mips/sibyte/Kconfig"
1006source "arch/mips/txx9/Kconfig"
1007source "arch/mips/cavium-octeon/Kconfig"
1008source "arch/mips/loongson2ef/Kconfig"
1009source "arch/mips/loongson32/Kconfig"
1010source "arch/mips/loongson64/Kconfig"
1011
1012endmenu
1013
1014config GENERIC_HWEIGHT
1015	bool
1016	default y
1017
1018config GENERIC_CALIBRATE_DELAY
1019	bool
1020	default y
1021
1022config SCHED_OMIT_FRAME_POINTER
1023	bool
1024	default y
1025
1026#
1027# Select some configuration options automatically based on user selections.
1028#
1029config FW_ARC
1030	bool
1031
1032config ARCH_MAY_HAVE_PC_FDC
1033	bool
1034
1035config BOOT_RAW
1036	bool
1037
1038config CEVT_BCM1480
1039	bool
1040
1041config CEVT_DS1287
1042	bool
1043
1044config CEVT_GT641XX
1045	bool
1046
1047config CEVT_R4K
1048	bool
1049
1050config CEVT_SB1250
1051	bool
1052
1053config CEVT_TXX9
1054	bool
1055
1056config CSRC_BCM1480
1057	bool
1058
1059config CSRC_IOASIC
1060	bool
1061
1062config CSRC_R4K
1063	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1064	bool
1065
1066config CSRC_SB1250
1067	bool
1068
1069config MIPS_CLOCK_VSYSCALL
1070	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1071
1072config GPIO_TXX9
1073	select GPIOLIB
1074	bool
1075
1076config FW_CFE
1077	bool
1078
1079config ARCH_SUPPORTS_UPROBES
1080	bool
1081
1082config DMA_PERDEV_COHERENT
1083	bool
1084	select ARCH_HAS_SETUP_DMA_OPS
1085	select DMA_NONCOHERENT
1086
1087config DMA_NONCOHERENT
1088	bool
1089	#
1090	# MIPS allows mixing "slightly different" Cacheability and Coherency
1091	# Attribute bits.  It is believed that the uncached access through
1092	# KSEG1 and the implementation specific "uncached accelerated" used
1093	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1094	# significant advantages.
1095	#
1096	select ARCH_HAS_DMA_WRITE_COMBINE
1097	select ARCH_HAS_DMA_PREP_COHERENT
1098	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1099	select ARCH_HAS_DMA_SET_UNCACHED
1100	select DMA_NONCOHERENT_MMAP
1101	select NEED_DMA_MAP_STATE
1102
1103config SYS_HAS_EARLY_PRINTK
1104	bool
1105
1106config SYS_SUPPORTS_HOTPLUG_CPU
1107	bool
1108
1109config MIPS_BONITO64
1110	bool
1111
1112config MIPS_MSC
1113	bool
1114
1115config SYNC_R4K
1116	bool
1117
1118config NO_IOPORT_MAP
1119	def_bool n
1120
1121config GENERIC_CSUM
1122	def_bool CPU_NO_LOAD_STORE_LR
1123
1124config GENERIC_ISA_DMA
1125	bool
1126	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1127	select ISA_DMA_API
1128
1129config GENERIC_ISA_DMA_SUPPORT_BROKEN
1130	bool
1131	select GENERIC_ISA_DMA
1132
1133config HAVE_PLAT_DELAY
1134	bool
1135
1136config HAVE_PLAT_FW_INIT_CMDLINE
1137	bool
1138
1139config HAVE_PLAT_MEMCPY
1140	bool
1141
1142config ISA_DMA_API
1143	bool
1144
1145config SYS_SUPPORTS_RELOCATABLE
1146	bool
1147	help
1148	  Selected if the platform supports relocating the kernel.
1149	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1150	  to allow access to command line and entropy sources.
1151
1152#
1153# Endianness selection.  Sufficiently obscure so many users don't know what to
1154# answer,so we try hard to limit the available choices.  Also the use of a
1155# choice statement should be more obvious to the user.
1156#
1157choice
1158	prompt "Endianness selection"
1159	help
1160	  Some MIPS machines can be configured for either little or big endian
1161	  byte order. These modes require different kernels and a different
1162	  Linux distribution.  In general there is one preferred byteorder for a
1163	  particular system but some systems are just as commonly used in the
1164	  one or the other endianness.
1165
1166config CPU_BIG_ENDIAN
1167	bool "Big endian"
1168	depends on SYS_SUPPORTS_BIG_ENDIAN
1169
1170config CPU_LITTLE_ENDIAN
1171	bool "Little endian"
1172	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1173
1174endchoice
1175
1176config EXPORT_UASM
1177	bool
1178
1179config SYS_SUPPORTS_APM_EMULATION
1180	bool
1181
1182config SYS_SUPPORTS_BIG_ENDIAN
1183	bool
1184
1185config SYS_SUPPORTS_LITTLE_ENDIAN
1186	bool
1187
1188config MIPS_HUGE_TLB_SUPPORT
1189	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1190
1191config IRQ_MSP_SLP
1192	bool
1193
1194config IRQ_MSP_CIC
1195	bool
1196
1197config IRQ_TXX9
1198	bool
1199
1200config IRQ_GT641XX
1201	bool
1202
1203config PCI_GT64XXX_PCI0
1204	bool
1205
1206config PCI_XTALK_BRIDGE
1207	bool
1208
1209config NO_EXCEPT_FILL
1210	bool
1211
1212config MIPS_SPRAM
1213	bool
1214
1215config SWAP_IO_SPACE
1216	bool
1217
1218config SGI_HAS_INDYDOG
1219	bool
1220
1221config SGI_HAS_HAL2
1222	bool
1223
1224config SGI_HAS_SEEQ
1225	bool
1226
1227config SGI_HAS_WD93
1228	bool
1229
1230config SGI_HAS_ZILOG
1231	bool
1232
1233config SGI_HAS_I8042
1234	bool
1235
1236config DEFAULT_SGI_PARTITION
1237	bool
1238
1239config FW_ARC32
1240	bool
1241
1242config FW_SNIPROM
1243	bool
1244
1245config BOOT_ELF32
1246	bool
1247
1248config MIPS_L1_CACHE_SHIFT_4
1249	bool
1250
1251config MIPS_L1_CACHE_SHIFT_5
1252	bool
1253
1254config MIPS_L1_CACHE_SHIFT_6
1255	bool
1256
1257config MIPS_L1_CACHE_SHIFT_7
1258	bool
1259
1260config MIPS_L1_CACHE_SHIFT
1261	int
1262	default "7" if MIPS_L1_CACHE_SHIFT_7
1263	default "6" if MIPS_L1_CACHE_SHIFT_6
1264	default "5" if MIPS_L1_CACHE_SHIFT_5
1265	default "4" if MIPS_L1_CACHE_SHIFT_4
1266	default "5"
1267
1268config ARC_CMDLINE_ONLY
1269	bool
1270
1271config ARC_CONSOLE
1272	bool "ARC console support"
1273	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1274
1275config ARC_MEMORY
1276	bool
1277
1278config ARC_PROMLIB
1279	bool
1280
1281config FW_ARC64
1282	bool
1283
1284config BOOT_ELF64
1285	bool
1286
1287menu "CPU selection"
1288
1289choice
1290	prompt "CPU type"
1291	default CPU_R4X00
1292
1293config CPU_LOONGSON64
1294	bool "Loongson 64-bit CPU"
1295	depends on SYS_HAS_CPU_LOONGSON64
1296	select ARCH_HAS_PHYS_TO_DMA
1297	select CPU_MIPSR2
1298	select CPU_HAS_PREFETCH
1299	select CPU_SUPPORTS_64BIT_KERNEL
1300	select CPU_SUPPORTS_HIGHMEM
1301	select CPU_SUPPORTS_HUGEPAGES
1302	select CPU_SUPPORTS_MSA
1303	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1304	select CPU_MIPSR2_IRQ_VI
1305	select WEAK_ORDERING
1306	select WEAK_REORDERING_BEYOND_LLSC
1307	select MIPS_ASID_BITS_VARIABLE
1308	select MIPS_PGD_C0_CONTEXT
1309	select MIPS_L1_CACHE_SHIFT_6
1310	select MIPS_FP_SUPPORT
1311	select GPIOLIB
1312	select SWIOTLB
1313	select HAVE_KVM
1314	help
1315	  The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1316	  cores implements the MIPS64R2 instruction set with many extensions,
1317	  including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1318	  3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1319	  Loongson-2E/2F is not covered here and will be removed in future.
1320
1321config LOONGSON3_ENHANCEMENT
1322	bool "New Loongson-3 CPU Enhancements"
1323	default n
1324	depends on CPU_LOONGSON64
1325	help
1326	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1327	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1328	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1329	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1330	  Fast TLB refill support, etc.
1331
1332	  This option enable those enhancements which are not probed at run
1333	  time. If you want a generic kernel to run on all Loongson 3 machines,
1334	  please say 'N' here. If you want a high-performance kernel to run on
1335	  new Loongson-3 machines only, please say 'Y' here.
1336
1337config CPU_LOONGSON3_WORKAROUNDS
1338	bool "Loongson-3 LLSC Workarounds"
1339	default y if SMP
1340	depends on CPU_LOONGSON64
1341	help
1342	  Loongson-3 processors have the llsc issues which require workarounds.
1343	  Without workarounds the system may hang unexpectedly.
1344
1345	  Say Y, unless you know what you are doing.
1346
1347config CPU_LOONGSON3_CPUCFG_EMULATION
1348	bool "Emulate the CPUCFG instruction on older Loongson cores"
1349	default y
1350	depends on CPU_LOONGSON64
1351	help
1352	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1353	  userland to query CPU capabilities, much like CPUID on x86. This
1354	  option provides emulation of the instruction on older Loongson
1355	  cores, back to Loongson-3A1000.
1356
1357	  If unsure, please say Y.
1358
1359config CPU_LOONGSON2E
1360	bool "Loongson 2E"
1361	depends on SYS_HAS_CPU_LOONGSON2E
1362	select CPU_LOONGSON2EF
1363	help
1364	  The Loongson 2E processor implements the MIPS III instruction set
1365	  with many extensions.
1366
1367	  It has an internal FPGA northbridge, which is compatible to
1368	  bonito64.
1369
1370config CPU_LOONGSON2F
1371	bool "Loongson 2F"
1372	depends on SYS_HAS_CPU_LOONGSON2F
1373	select CPU_LOONGSON2EF
1374	select GPIOLIB
1375	help
1376	  The Loongson 2F processor implements the MIPS III instruction set
1377	  with many extensions.
1378
1379	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1380	  have a similar programming interface with FPGA northbridge used in
1381	  Loongson2E.
1382
1383config CPU_LOONGSON1B
1384	bool "Loongson 1B"
1385	depends on SYS_HAS_CPU_LOONGSON1B
1386	select CPU_LOONGSON32
1387	select LEDS_GPIO_REGISTER
1388	help
1389	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1390	  Release 1 instruction set and part of the MIPS32 Release 2
1391	  instruction set.
1392
1393config CPU_LOONGSON1C
1394	bool "Loongson 1C"
1395	depends on SYS_HAS_CPU_LOONGSON1C
1396	select CPU_LOONGSON32
1397	select LEDS_GPIO_REGISTER
1398	help
1399	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1400	  Release 1 instruction set and part of the MIPS32 Release 2
1401	  instruction set.
1402
1403config CPU_MIPS32_R1
1404	bool "MIPS32 Release 1"
1405	depends on SYS_HAS_CPU_MIPS32_R1
1406	select CPU_HAS_PREFETCH
1407	select CPU_SUPPORTS_32BIT_KERNEL
1408	select CPU_SUPPORTS_HIGHMEM
1409	help
1410	  Choose this option to build a kernel for release 1 or later of the
1411	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1412	  MIPS processor are based on a MIPS32 processor.  If you know the
1413	  specific type of processor in your system, choose those that one
1414	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1415	  Release 2 of the MIPS32 architecture is available since several
1416	  years so chances are you even have a MIPS32 Release 2 processor
1417	  in which case you should choose CPU_MIPS32_R2 instead for better
1418	  performance.
1419
1420config CPU_MIPS32_R2
1421	bool "MIPS32 Release 2"
1422	depends on SYS_HAS_CPU_MIPS32_R2
1423	select CPU_HAS_PREFETCH
1424	select CPU_SUPPORTS_32BIT_KERNEL
1425	select CPU_SUPPORTS_HIGHMEM
1426	select CPU_SUPPORTS_MSA
1427	select HAVE_KVM
1428	help
1429	  Choose this option to build a kernel for release 2 or later of the
1430	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1431	  MIPS processor are based on a MIPS32 processor.  If you know the
1432	  specific type of processor in your system, choose those that one
1433	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1434
1435config CPU_MIPS32_R5
1436	bool "MIPS32 Release 5"
1437	depends on SYS_HAS_CPU_MIPS32_R5
1438	select CPU_HAS_PREFETCH
1439	select CPU_SUPPORTS_32BIT_KERNEL
1440	select CPU_SUPPORTS_HIGHMEM
1441	select CPU_SUPPORTS_MSA
1442	select HAVE_KVM
1443	select MIPS_O32_FP64_SUPPORT
1444	help
1445	  Choose this option to build a kernel for release 5 or later of the
1446	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1447	  family, are based on a MIPS32r5 processor. If you own an older
1448	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1449
1450config CPU_MIPS32_R6
1451	bool "MIPS32 Release 6"
1452	depends on SYS_HAS_CPU_MIPS32_R6
1453	select CPU_HAS_PREFETCH
1454	select CPU_NO_LOAD_STORE_LR
1455	select CPU_SUPPORTS_32BIT_KERNEL
1456	select CPU_SUPPORTS_HIGHMEM
1457	select CPU_SUPPORTS_MSA
1458	select HAVE_KVM
1459	select MIPS_O32_FP64_SUPPORT
1460	help
1461	  Choose this option to build a kernel for release 6 or later of the
1462	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1463	  family, are based on a MIPS32r6 processor. If you own an older
1464	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1465
1466config CPU_MIPS64_R1
1467	bool "MIPS64 Release 1"
1468	depends on SYS_HAS_CPU_MIPS64_R1
1469	select CPU_HAS_PREFETCH
1470	select CPU_SUPPORTS_32BIT_KERNEL
1471	select CPU_SUPPORTS_64BIT_KERNEL
1472	select CPU_SUPPORTS_HIGHMEM
1473	select CPU_SUPPORTS_HUGEPAGES
1474	help
1475	  Choose this option to build a kernel for release 1 or later of the
1476	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1477	  MIPS processor are based on a MIPS64 processor.  If you know the
1478	  specific type of processor in your system, choose those that one
1479	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1480	  Release 2 of the MIPS64 architecture is available since several
1481	  years so chances are you even have a MIPS64 Release 2 processor
1482	  in which case you should choose CPU_MIPS64_R2 instead for better
1483	  performance.
1484
1485config CPU_MIPS64_R2
1486	bool "MIPS64 Release 2"
1487	depends on SYS_HAS_CPU_MIPS64_R2
1488	select CPU_HAS_PREFETCH
1489	select CPU_SUPPORTS_32BIT_KERNEL
1490	select CPU_SUPPORTS_64BIT_KERNEL
1491	select CPU_SUPPORTS_HIGHMEM
1492	select CPU_SUPPORTS_HUGEPAGES
1493	select CPU_SUPPORTS_MSA
1494	select HAVE_KVM
1495	help
1496	  Choose this option to build a kernel for release 2 or later of the
1497	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1498	  MIPS processor are based on a MIPS64 processor.  If you know the
1499	  specific type of processor in your system, choose those that one
1500	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1501
1502config CPU_MIPS64_R5
1503	bool "MIPS64 Release 5"
1504	depends on SYS_HAS_CPU_MIPS64_R5
1505	select CPU_HAS_PREFETCH
1506	select CPU_SUPPORTS_32BIT_KERNEL
1507	select CPU_SUPPORTS_64BIT_KERNEL
1508	select CPU_SUPPORTS_HIGHMEM
1509	select CPU_SUPPORTS_HUGEPAGES
1510	select CPU_SUPPORTS_MSA
1511	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1512	select HAVE_KVM
1513	help
1514	  Choose this option to build a kernel for release 5 or later of the
1515	  MIPS64 architecture.  This is a intermediate MIPS architecture
1516	  release partly implementing release 6 features. Though there is no
1517	  any hardware known to be based on this release.
1518
1519config CPU_MIPS64_R6
1520	bool "MIPS64 Release 6"
1521	depends on SYS_HAS_CPU_MIPS64_R6
1522	select CPU_HAS_PREFETCH
1523	select CPU_NO_LOAD_STORE_LR
1524	select CPU_SUPPORTS_32BIT_KERNEL
1525	select CPU_SUPPORTS_64BIT_KERNEL
1526	select CPU_SUPPORTS_HIGHMEM
1527	select CPU_SUPPORTS_HUGEPAGES
1528	select CPU_SUPPORTS_MSA
1529	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1530	select HAVE_KVM
1531	help
1532	  Choose this option to build a kernel for release 6 or later of the
1533	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1534	  family, are based on a MIPS64r6 processor. If you own an older
1535	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1536
1537config CPU_P5600
1538	bool "MIPS Warrior P5600"
1539	depends on SYS_HAS_CPU_P5600
1540	select CPU_HAS_PREFETCH
1541	select CPU_SUPPORTS_32BIT_KERNEL
1542	select CPU_SUPPORTS_HIGHMEM
1543	select CPU_SUPPORTS_MSA
1544	select CPU_SUPPORTS_CPUFREQ
1545	select CPU_MIPSR2_IRQ_VI
1546	select CPU_MIPSR2_IRQ_EI
1547	select HAVE_KVM
1548	select MIPS_O32_FP64_SUPPORT
1549	help
1550	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1551	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1552	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1553	  level features like up to six P5600 calculation cores, CM2 with L2
1554	  cache, IOCU/IOMMU (though might be unused depending on the system-
1555	  specific IP core configuration), GIC, CPC, virtualisation module,
1556	  eJTAG and PDtrace.
1557
1558config CPU_R3000
1559	bool "R3000"
1560	depends on SYS_HAS_CPU_R3000
1561	select CPU_HAS_WB
1562	select CPU_R3K_TLB
1563	select CPU_SUPPORTS_32BIT_KERNEL
1564	select CPU_SUPPORTS_HIGHMEM
1565	help
1566	  Please make sure to pick the right CPU type. Linux/MIPS is not
1567	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1568	  *not* work on R4000 machines and vice versa.  However, since most
1569	  of the supported machines have an R4000 (or similar) CPU, R4x00
1570	  might be a safe bet.  If the resulting kernel does not work,
1571	  try to recompile with R3000.
1572
1573config CPU_R4300
1574	bool "R4300"
1575	depends on SYS_HAS_CPU_R4300
1576	select CPU_SUPPORTS_32BIT_KERNEL
1577	select CPU_SUPPORTS_64BIT_KERNEL
1578	help
1579	  MIPS Technologies R4300-series processors.
1580
1581config CPU_R4X00
1582	bool "R4x00"
1583	depends on SYS_HAS_CPU_R4X00
1584	select CPU_SUPPORTS_32BIT_KERNEL
1585	select CPU_SUPPORTS_64BIT_KERNEL
1586	select CPU_SUPPORTS_HUGEPAGES
1587	help
1588	  MIPS Technologies R4000-series processors other than 4300, including
1589	  the R4000, R4400, R4600, and 4700.
1590
1591config CPU_TX49XX
1592	bool "R49XX"
1593	depends on SYS_HAS_CPU_TX49XX
1594	select CPU_HAS_PREFETCH
1595	select CPU_SUPPORTS_32BIT_KERNEL
1596	select CPU_SUPPORTS_64BIT_KERNEL
1597	select CPU_SUPPORTS_HUGEPAGES
1598
1599config CPU_R5000
1600	bool "R5000"
1601	depends on SYS_HAS_CPU_R5000
1602	select CPU_SUPPORTS_32BIT_KERNEL
1603	select CPU_SUPPORTS_64BIT_KERNEL
1604	select CPU_SUPPORTS_HUGEPAGES
1605	help
1606	  MIPS Technologies R5000-series processors other than the Nevada.
1607
1608config CPU_R5500
1609	bool "R5500"
1610	depends on SYS_HAS_CPU_R5500
1611	select CPU_SUPPORTS_32BIT_KERNEL
1612	select CPU_SUPPORTS_64BIT_KERNEL
1613	select CPU_SUPPORTS_HUGEPAGES
1614	help
1615	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1616	  instruction set.
1617
1618config CPU_NEVADA
1619	bool "RM52xx"
1620	depends on SYS_HAS_CPU_NEVADA
1621	select CPU_SUPPORTS_32BIT_KERNEL
1622	select CPU_SUPPORTS_64BIT_KERNEL
1623	select CPU_SUPPORTS_HUGEPAGES
1624	help
1625	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1626
1627config CPU_R10000
1628	bool "R10000"
1629	depends on SYS_HAS_CPU_R10000
1630	select CPU_HAS_PREFETCH
1631	select CPU_SUPPORTS_32BIT_KERNEL
1632	select CPU_SUPPORTS_64BIT_KERNEL
1633	select CPU_SUPPORTS_HIGHMEM
1634	select CPU_SUPPORTS_HUGEPAGES
1635	help
1636	  MIPS Technologies R10000-series processors.
1637
1638config CPU_RM7000
1639	bool "RM7000"
1640	depends on SYS_HAS_CPU_RM7000
1641	select CPU_HAS_PREFETCH
1642	select CPU_SUPPORTS_32BIT_KERNEL
1643	select CPU_SUPPORTS_64BIT_KERNEL
1644	select CPU_SUPPORTS_HIGHMEM
1645	select CPU_SUPPORTS_HUGEPAGES
1646
1647config CPU_SB1
1648	bool "SB1"
1649	depends on SYS_HAS_CPU_SB1
1650	select CPU_SUPPORTS_32BIT_KERNEL
1651	select CPU_SUPPORTS_64BIT_KERNEL
1652	select CPU_SUPPORTS_HIGHMEM
1653	select CPU_SUPPORTS_HUGEPAGES
1654	select WEAK_ORDERING
1655
1656config CPU_CAVIUM_OCTEON
1657	bool "Cavium Octeon processor"
1658	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1659	select CPU_HAS_PREFETCH
1660	select CPU_SUPPORTS_64BIT_KERNEL
1661	select WEAK_ORDERING
1662	select CPU_SUPPORTS_HIGHMEM
1663	select CPU_SUPPORTS_HUGEPAGES
1664	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1665	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1666	select MIPS_L1_CACHE_SHIFT_7
1667	select HAVE_KVM
1668	help
1669	  The Cavium Octeon processor is a highly integrated chip containing
1670	  many ethernet hardware widgets for networking tasks. The processor
1671	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1672	  Full details can be found at http://www.caviumnetworks.com.
1673
1674config CPU_BMIPS
1675	bool "Broadcom BMIPS"
1676	depends on SYS_HAS_CPU_BMIPS
1677	select CPU_MIPS32
1678	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1679	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1680	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1681	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1682	select CPU_SUPPORTS_32BIT_KERNEL
1683	select DMA_NONCOHERENT
1684	select IRQ_MIPS_CPU
1685	select SWAP_IO_SPACE
1686	select WEAK_ORDERING
1687	select CPU_SUPPORTS_HIGHMEM
1688	select CPU_HAS_PREFETCH
1689	select CPU_SUPPORTS_CPUFREQ
1690	select MIPS_EXTERNAL_TIMER
1691	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1692	help
1693	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1694
1695endchoice
1696
1697config CPU_MIPS32_3_5_FEATURES
1698	bool "MIPS32 Release 3.5 Features"
1699	depends on SYS_HAS_CPU_MIPS32_R3_5
1700	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1701		   CPU_P5600
1702	help
1703	  Choose this option to build a kernel for release 2 or later of the
1704	  MIPS32 architecture including features from the 3.5 release such as
1705	  support for Enhanced Virtual Addressing (EVA).
1706
1707config CPU_MIPS32_3_5_EVA
1708	bool "Enhanced Virtual Addressing (EVA)"
1709	depends on CPU_MIPS32_3_5_FEATURES
1710	select EVA
1711	default y
1712	help
1713	  Choose this option if you want to enable the Enhanced Virtual
1714	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1715	  One of its primary benefits is an increase in the maximum size
1716	  of lowmem (up to 3GB). If unsure, say 'N' here.
1717
1718config CPU_MIPS32_R5_FEATURES
1719	bool "MIPS32 Release 5 Features"
1720	depends on SYS_HAS_CPU_MIPS32_R5
1721	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1722	help
1723	  Choose this option to build a kernel for release 2 or later of the
1724	  MIPS32 architecture including features from release 5 such as
1725	  support for Extended Physical Addressing (XPA).
1726
1727config CPU_MIPS32_R5_XPA
1728	bool "Extended Physical Addressing (XPA)"
1729	depends on CPU_MIPS32_R5_FEATURES
1730	depends on !EVA
1731	depends on !PAGE_SIZE_4KB
1732	depends on SYS_SUPPORTS_HIGHMEM
1733	select XPA
1734	select HIGHMEM
1735	select PHYS_ADDR_T_64BIT
1736	default n
1737	help
1738	  Choose this option if you want to enable the Extended Physical
1739	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1740	  benefit is to increase physical addressing equal to or greater
1741	  than 40 bits. Note that this has the side effect of turning on
1742	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1743	  If unsure, say 'N' here.
1744
1745if CPU_LOONGSON2F
1746config CPU_NOP_WORKAROUNDS
1747	bool
1748
1749config CPU_JUMP_WORKAROUNDS
1750	bool
1751
1752config CPU_LOONGSON2F_WORKAROUNDS
1753	bool "Loongson 2F Workarounds"
1754	default y
1755	select CPU_NOP_WORKAROUNDS
1756	select CPU_JUMP_WORKAROUNDS
1757	help
1758	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1759	  require workarounds.  Without workarounds the system may hang
1760	  unexpectedly.  For more information please refer to the gas
1761	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1762
1763	  Loongson 2F03 and later have fixed these issues and no workarounds
1764	  are needed.  The workarounds have no significant side effect on them
1765	  but may decrease the performance of the system so this option should
1766	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1767	  systems.
1768
1769	  If unsure, please say Y.
1770endif # CPU_LOONGSON2F
1771
1772config SYS_SUPPORTS_ZBOOT
1773	bool
1774	select HAVE_KERNEL_GZIP
1775	select HAVE_KERNEL_BZIP2
1776	select HAVE_KERNEL_LZ4
1777	select HAVE_KERNEL_LZMA
1778	select HAVE_KERNEL_LZO
1779	select HAVE_KERNEL_XZ
1780	select HAVE_KERNEL_ZSTD
1781
1782config SYS_SUPPORTS_ZBOOT_UART16550
1783	bool
1784	select SYS_SUPPORTS_ZBOOT
1785
1786config SYS_SUPPORTS_ZBOOT_UART_PROM
1787	bool
1788	select SYS_SUPPORTS_ZBOOT
1789
1790config CPU_LOONGSON2EF
1791	bool
1792	select CPU_SUPPORTS_32BIT_KERNEL
1793	select CPU_SUPPORTS_64BIT_KERNEL
1794	select CPU_SUPPORTS_HIGHMEM
1795	select CPU_SUPPORTS_HUGEPAGES
1796	select ARCH_HAS_PHYS_TO_DMA
1797
1798config CPU_LOONGSON32
1799	bool
1800	select CPU_MIPS32
1801	select CPU_MIPSR2
1802	select CPU_HAS_PREFETCH
1803	select CPU_SUPPORTS_32BIT_KERNEL
1804	select CPU_SUPPORTS_HIGHMEM
1805	select CPU_SUPPORTS_CPUFREQ
1806
1807config CPU_BMIPS32_3300
1808	select SMP_UP if SMP
1809	bool
1810
1811config CPU_BMIPS4350
1812	bool
1813	select SYS_SUPPORTS_SMP
1814	select SYS_SUPPORTS_HOTPLUG_CPU
1815
1816config CPU_BMIPS4380
1817	bool
1818	select MIPS_L1_CACHE_SHIFT_6
1819	select SYS_SUPPORTS_SMP
1820	select SYS_SUPPORTS_HOTPLUG_CPU
1821	select CPU_HAS_RIXI
1822
1823config CPU_BMIPS5000
1824	bool
1825	select MIPS_CPU_SCACHE
1826	select MIPS_L1_CACHE_SHIFT_7
1827	select SYS_SUPPORTS_SMP
1828	select SYS_SUPPORTS_HOTPLUG_CPU
1829	select CPU_HAS_RIXI
1830
1831config SYS_HAS_CPU_LOONGSON64
1832	bool
1833	select CPU_SUPPORTS_CPUFREQ
1834	select CPU_HAS_RIXI
1835
1836config SYS_HAS_CPU_LOONGSON2E
1837	bool
1838
1839config SYS_HAS_CPU_LOONGSON2F
1840	bool
1841	select CPU_SUPPORTS_CPUFREQ
1842	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1843
1844config SYS_HAS_CPU_LOONGSON1B
1845	bool
1846
1847config SYS_HAS_CPU_LOONGSON1C
1848	bool
1849
1850config SYS_HAS_CPU_MIPS32_R1
1851	bool
1852
1853config SYS_HAS_CPU_MIPS32_R2
1854	bool
1855
1856config SYS_HAS_CPU_MIPS32_R3_5
1857	bool
1858
1859config SYS_HAS_CPU_MIPS32_R5
1860	bool
1861	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1862
1863config SYS_HAS_CPU_MIPS32_R6
1864	bool
1865	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1866
1867config SYS_HAS_CPU_MIPS64_R1
1868	bool
1869
1870config SYS_HAS_CPU_MIPS64_R2
1871	bool
1872
1873config SYS_HAS_CPU_MIPS64_R5
1874	bool
1875	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1876
1877config SYS_HAS_CPU_MIPS64_R6
1878	bool
1879	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1880
1881config SYS_HAS_CPU_P5600
1882	bool
1883	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1884
1885config SYS_HAS_CPU_R3000
1886	bool
1887
1888config SYS_HAS_CPU_R4300
1889	bool
1890
1891config SYS_HAS_CPU_R4X00
1892	bool
1893
1894config SYS_HAS_CPU_TX49XX
1895	bool
1896
1897config SYS_HAS_CPU_R5000
1898	bool
1899
1900config SYS_HAS_CPU_R5500
1901	bool
1902
1903config SYS_HAS_CPU_NEVADA
1904	bool
1905
1906config SYS_HAS_CPU_R10000
1907	bool
1908	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1909
1910config SYS_HAS_CPU_RM7000
1911	bool
1912
1913config SYS_HAS_CPU_SB1
1914	bool
1915
1916config SYS_HAS_CPU_CAVIUM_OCTEON
1917	bool
1918
1919config SYS_HAS_CPU_BMIPS
1920	bool
1921
1922config SYS_HAS_CPU_BMIPS32_3300
1923	bool
1924	select SYS_HAS_CPU_BMIPS
1925
1926config SYS_HAS_CPU_BMIPS4350
1927	bool
1928	select SYS_HAS_CPU_BMIPS
1929
1930config SYS_HAS_CPU_BMIPS4380
1931	bool
1932	select SYS_HAS_CPU_BMIPS
1933
1934config SYS_HAS_CPU_BMIPS5000
1935	bool
1936	select SYS_HAS_CPU_BMIPS
1937	select ARCH_HAS_SYNC_DMA_FOR_CPU
1938
1939#
1940# CPU may reorder R->R, R->W, W->R, W->W
1941# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1942#
1943config WEAK_ORDERING
1944	bool
1945
1946#
1947# CPU may reorder reads and writes beyond LL/SC
1948# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1949#
1950config WEAK_REORDERING_BEYOND_LLSC
1951	bool
1952endmenu
1953
1954#
1955# These two indicate any level of the MIPS32 and MIPS64 architecture
1956#
1957config CPU_MIPS32
1958	bool
1959	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1960		     CPU_MIPS32_R6 || CPU_P5600
1961
1962config CPU_MIPS64
1963	bool
1964	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1965		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1966
1967#
1968# These indicate the revision of the architecture
1969#
1970config CPU_MIPSR1
1971	bool
1972	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1973
1974config CPU_MIPSR2
1975	bool
1976	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1977	select CPU_HAS_RIXI
1978	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1979	select MIPS_SPRAM
1980
1981config CPU_MIPSR5
1982	bool
1983	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1984	select CPU_HAS_RIXI
1985	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1986	select MIPS_SPRAM
1987
1988config CPU_MIPSR6
1989	bool
1990	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1991	select CPU_HAS_RIXI
1992	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1993	select HAVE_ARCH_BITREVERSE
1994	select MIPS_ASID_BITS_VARIABLE
1995	select MIPS_CRC_SUPPORT
1996	select MIPS_SPRAM
1997
1998config TARGET_ISA_REV
1999	int
2000	default 1 if CPU_MIPSR1
2001	default 2 if CPU_MIPSR2
2002	default 5 if CPU_MIPSR5
2003	default 6 if CPU_MIPSR6
2004	default 0
2005	help
2006	  Reflects the ISA revision being targeted by the kernel build. This
2007	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
2008
2009config EVA
2010	bool
2011
2012config XPA
2013	bool
2014
2015config SYS_SUPPORTS_32BIT_KERNEL
2016	bool
2017config SYS_SUPPORTS_64BIT_KERNEL
2018	bool
2019config CPU_SUPPORTS_32BIT_KERNEL
2020	bool
2021config CPU_SUPPORTS_64BIT_KERNEL
2022	bool
2023config CPU_SUPPORTS_CPUFREQ
2024	bool
2025config CPU_SUPPORTS_ADDRWINCFG
2026	bool
2027config CPU_SUPPORTS_HUGEPAGES
2028	bool
2029	depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2030config MIPS_PGD_C0_CONTEXT
2031	bool
2032	depends on 64BIT
2033	default y if (CPU_MIPSR2 || CPU_MIPSR6)
2034
2035#
2036# Set to y for ptrace access to watch registers.
2037#
2038config HARDWARE_WATCHPOINTS
2039	bool
2040	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2041
2042menu "Kernel type"
2043
2044choice
2045	prompt "Kernel code model"
2046	help
2047	  You should only select this option if you have a workload that
2048	  actually benefits from 64-bit processing or if your machine has
2049	  large memory.  You will only be presented a single option in this
2050	  menu if your system does not support both 32-bit and 64-bit kernels.
2051
2052config 32BIT
2053	bool "32-bit kernel"
2054	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2055	select TRAD_SIGNALS
2056	help
2057	  Select this option if you want to build a 32-bit kernel.
2058
2059config 64BIT
2060	bool "64-bit kernel"
2061	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2062	help
2063	  Select this option if you want to build a 64-bit kernel.
2064
2065endchoice
2066
2067config MIPS_VA_BITS_48
2068	bool "48 bits virtual memory"
2069	depends on 64BIT
2070	help
2071	  Support a maximum at least 48 bits of application virtual
2072	  memory.  Default is 40 bits or less, depending on the CPU.
2073	  For page sizes 16k and above, this option results in a small
2074	  memory overhead for page tables.  For 4k page size, a fourth
2075	  level of page tables is added which imposes both a memory
2076	  overhead as well as slower TLB fault handling.
2077
2078	  If unsure, say N.
2079
2080config ZBOOT_LOAD_ADDRESS
2081	hex "Compressed kernel load address"
2082	default 0xffffffff80400000 if BCM47XX
2083	default 0x0
2084	depends on SYS_SUPPORTS_ZBOOT
2085	help
2086	  The address to load compressed kernel, aka vmlinuz.
2087
2088	  This is only used if non-zero.
2089
2090choice
2091	prompt "Kernel page size"
2092	default PAGE_SIZE_4KB
2093
2094config PAGE_SIZE_4KB
2095	bool "4kB"
2096	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2097	help
2098	  This option select the standard 4kB Linux page size.  On some
2099	  R3000-family processors this is the only available page size.  Using
2100	  4kB page size will minimize memory consumption and is therefore
2101	  recommended for low memory systems.
2102
2103config PAGE_SIZE_8KB
2104	bool "8kB"
2105	depends on CPU_CAVIUM_OCTEON
2106	depends on !MIPS_VA_BITS_48
2107	help
2108	  Using 8kB page size will result in higher performance kernel at
2109	  the price of higher memory consumption.  This option is available
2110	  only on cnMIPS processors.  Note that you will need a suitable Linux
2111	  distribution to support this.
2112
2113config PAGE_SIZE_16KB
2114	bool "16kB"
2115	depends on !CPU_R3000
2116	help
2117	  Using 16kB page size will result in higher performance kernel at
2118	  the price of higher memory consumption.  This option is available on
2119	  all non-R3000 family processors.  Note that you will need a suitable
2120	  Linux distribution to support this.
2121
2122config PAGE_SIZE_32KB
2123	bool "32kB"
2124	depends on CPU_CAVIUM_OCTEON
2125	depends on !MIPS_VA_BITS_48
2126	help
2127	  Using 32kB page size will result in higher performance kernel at
2128	  the price of higher memory consumption.  This option is available
2129	  only on cnMIPS cores.  Note that you will need a suitable Linux
2130	  distribution to support this.
2131
2132config PAGE_SIZE_64KB
2133	bool "64kB"
2134	depends on !CPU_R3000
2135	help
2136	  Using 64kB page size will result in higher performance kernel at
2137	  the price of higher memory consumption.  This option is available on
2138	  all non-R3000 family processor.  Not that at the time of this
2139	  writing this option is still high experimental.
2140
2141endchoice
2142
2143config ARCH_FORCE_MAX_ORDER
2144	int "Maximum zone order"
2145	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2146	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2147	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2148	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2149	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2150	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2151	range 0 64
2152	default "11"
2153	help
2154	  The kernel memory allocator divides physically contiguous memory
2155	  blocks into "zones", where each zone is a power of two number of
2156	  pages.  This option selects the largest power of two that the kernel
2157	  keeps in the memory allocator.  If you need to allocate very large
2158	  blocks of physically contiguous memory, then you may need to
2159	  increase this value.
2160
2161	  This config option is actually maximum order plus one. For example,
2162	  a value of 11 means that the largest free memory block is 2^10 pages.
2163
2164	  The page size is not necessarily 4KB.  Keep this in mind
2165	  when choosing a value for this option.
2166
2167config BOARD_SCACHE
2168	bool
2169
2170config IP22_CPU_SCACHE
2171	bool
2172	select BOARD_SCACHE
2173
2174#
2175# Support for a MIPS32 / MIPS64 style S-caches
2176#
2177config MIPS_CPU_SCACHE
2178	bool
2179	select BOARD_SCACHE
2180
2181config R5000_CPU_SCACHE
2182	bool
2183	select BOARD_SCACHE
2184
2185config RM7000_CPU_SCACHE
2186	bool
2187	select BOARD_SCACHE
2188
2189config SIBYTE_DMA_PAGEOPS
2190	bool "Use DMA to clear/copy pages"
2191	depends on CPU_SB1
2192	help
2193	  Instead of using the CPU to zero and copy pages, use a Data Mover
2194	  channel.  These DMA channels are otherwise unused by the standard
2195	  SiByte Linux port.  Seems to give a small performance benefit.
2196
2197config CPU_HAS_PREFETCH
2198	bool
2199
2200config CPU_GENERIC_DUMP_TLB
2201	bool
2202	default y if !CPU_R3000
2203
2204config MIPS_FP_SUPPORT
2205	bool "Floating Point support" if EXPERT
2206	default y
2207	help
2208	  Select y to include support for floating point in the kernel
2209	  including initialization of FPU hardware, FP context save & restore
2210	  and emulation of an FPU where necessary. Without this support any
2211	  userland program attempting to use floating point instructions will
2212	  receive a SIGILL.
2213
2214	  If you know that your userland will not attempt to use floating point
2215	  instructions then you can say n here to shrink the kernel a little.
2216
2217	  If unsure, say y.
2218
2219config CPU_R2300_FPU
2220	bool
2221	depends on MIPS_FP_SUPPORT
2222	default y if CPU_R3000
2223
2224config CPU_R3K_TLB
2225	bool
2226
2227config CPU_R4K_FPU
2228	bool
2229	depends on MIPS_FP_SUPPORT
2230	default y if !CPU_R2300_FPU
2231
2232config CPU_R4K_CACHE_TLB
2233	bool
2234	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2235
2236config MIPS_MT_SMP
2237	bool "MIPS MT SMP support (1 TC on each available VPE)"
2238	default y
2239	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2240	select CPU_MIPSR2_IRQ_VI
2241	select CPU_MIPSR2_IRQ_EI
2242	select SYNC_R4K
2243	select MIPS_MT
2244	select SMP
2245	select SMP_UP
2246	select SYS_SUPPORTS_SMP
2247	select SYS_SUPPORTS_SCHED_SMT
2248	select MIPS_PERF_SHARED_TC_COUNTERS
2249	help
2250	  This is a kernel model which is known as SMVP. This is supported
2251	  on cores with the MT ASE and uses the available VPEs to implement
2252	  virtual processors which supports SMP. This is equivalent to the
2253	  Intel Hyperthreading feature. For further information go to
2254	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
2255
2256config MIPS_MT
2257	bool
2258
2259config SCHED_SMT
2260	bool "SMT (multithreading) scheduler support"
2261	depends on SYS_SUPPORTS_SCHED_SMT
2262	default n
2263	help
2264	  SMT scheduler support improves the CPU scheduler's decision making
2265	  when dealing with MIPS MT enabled cores at a cost of slightly
2266	  increased overhead in some places. If unsure say N here.
2267
2268config SYS_SUPPORTS_SCHED_SMT
2269	bool
2270
2271config SYS_SUPPORTS_MULTITHREADING
2272	bool
2273
2274config MIPS_MT_FPAFF
2275	bool "Dynamic FPU affinity for FP-intensive threads"
2276	default y
2277	depends on MIPS_MT_SMP
2278
2279config MIPSR2_TO_R6_EMULATOR
2280	bool "MIPS R2-to-R6 emulator"
2281	depends on CPU_MIPSR6
2282	depends on MIPS_FP_SUPPORT
2283	default y
2284	help
2285	  Choose this option if you want to run non-R6 MIPS userland code.
2286	  Even if you say 'Y' here, the emulator will still be disabled by
2287	  default. You can enable it using the 'mipsr2emu' kernel option.
2288	  The only reason this is a build-time option is to save ~14K from the
2289	  final kernel image.
2290
2291config SYS_SUPPORTS_VPE_LOADER
2292	bool
2293	depends on SYS_SUPPORTS_MULTITHREADING
2294	help
2295	  Indicates that the platform supports the VPE loader, and provides
2296	  physical_memsize.
2297
2298config MIPS_VPE_LOADER
2299	bool "VPE loader support."
2300	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2301	select CPU_MIPSR2_IRQ_VI
2302	select CPU_MIPSR2_IRQ_EI
2303	select MIPS_MT
2304	help
2305	  Includes a loader for loading an elf relocatable object
2306	  onto another VPE and running it.
2307
2308config MIPS_VPE_LOADER_CMP
2309	bool
2310	default "y"
2311	depends on MIPS_VPE_LOADER && MIPS_CMP
2312
2313config MIPS_VPE_LOADER_MT
2314	bool
2315	default "y"
2316	depends on MIPS_VPE_LOADER && !MIPS_CMP
2317
2318config MIPS_VPE_LOADER_TOM
2319	bool "Load VPE program into memory hidden from linux"
2320	depends on MIPS_VPE_LOADER
2321	default y
2322	help
2323	  The loader can use memory that is present but has been hidden from
2324	  Linux using the kernel command line option "mem=xxMB". It's up to
2325	  you to ensure the amount you put in the option and the space your
2326	  program requires is less or equal to the amount physically present.
2327
2328config MIPS_VPE_APSP_API
2329	bool "Enable support for AP/SP API (RTLX)"
2330	depends on MIPS_VPE_LOADER
2331
2332config MIPS_VPE_APSP_API_CMP
2333	bool
2334	default "y"
2335	depends on MIPS_VPE_APSP_API && MIPS_CMP
2336
2337config MIPS_VPE_APSP_API_MT
2338	bool
2339	default "y"
2340	depends on MIPS_VPE_APSP_API && !MIPS_CMP
2341
2342config MIPS_CMP
2343	bool "MIPS CMP framework support (DEPRECATED)"
2344	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2345	select SMP
2346	select SYNC_R4K
2347	select SYS_SUPPORTS_SMP
2348	select WEAK_ORDERING
2349	default n
2350	help
2351	  Select this if you are using a bootloader which implements the "CMP
2352	  framework" protocol (ie. YAMON) and want your kernel to make use of
2353	  its ability to start secondary CPUs.
2354
2355	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
2356	  instead of this.
2357
2358config MIPS_CPS
2359	bool "MIPS Coherent Processing System support"
2360	depends on SYS_SUPPORTS_MIPS_CPS
2361	select MIPS_CM
2362	select MIPS_CPS_PM if HOTPLUG_CPU
2363	select SMP
2364	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2365	select SYS_SUPPORTS_HOTPLUG_CPU
2366	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2367	select SYS_SUPPORTS_SMP
2368	select WEAK_ORDERING
2369	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2370	help
2371	  Select this if you wish to run an SMP kernel across multiple cores
2372	  within a MIPS Coherent Processing System. When this option is
2373	  enabled the kernel will probe for other cores and boot them with
2374	  no external assistance. It is safe to enable this when hardware
2375	  support is unavailable.
2376
2377config MIPS_CPS_PM
2378	depends on MIPS_CPS
2379	bool
2380
2381config MIPS_CM
2382	bool
2383	select MIPS_CPC
2384
2385config MIPS_CPC
2386	bool
2387
2388config SB1_PASS_2_WORKAROUNDS
2389	bool
2390	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2391	default y
2392
2393config SB1_PASS_2_1_WORKAROUNDS
2394	bool
2395	depends on CPU_SB1 && CPU_SB1_PASS_2
2396	default y
2397
2398choice
2399	prompt "SmartMIPS or microMIPS ASE support"
2400
2401config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2402	bool "None"
2403	help
2404	  Select this if you want neither microMIPS nor SmartMIPS support
2405
2406config CPU_HAS_SMARTMIPS
2407	depends on SYS_SUPPORTS_SMARTMIPS
2408	bool "SmartMIPS"
2409	help
2410	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2411	  increased security at both hardware and software level for
2412	  smartcards.  Enabling this option will allow proper use of the
2413	  SmartMIPS instructions by Linux applications.  However a kernel with
2414	  this option will not work on a MIPS core without SmartMIPS core.  If
2415	  you don't know you probably don't have SmartMIPS and should say N
2416	  here.
2417
2418config CPU_MICROMIPS
2419	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2420	bool "microMIPS"
2421	help
2422	  When this option is enabled the kernel will be built using the
2423	  microMIPS ISA
2424
2425endchoice
2426
2427config CPU_HAS_MSA
2428	bool "Support for the MIPS SIMD Architecture"
2429	depends on CPU_SUPPORTS_MSA
2430	depends on MIPS_FP_SUPPORT
2431	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2432	help
2433	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2434	  and a set of SIMD instructions to operate on them. When this option
2435	  is enabled the kernel will support allocating & switching MSA
2436	  vector register contexts. If you know that your kernel will only be
2437	  running on CPUs which do not support MSA or that your userland will
2438	  not be making use of it then you may wish to say N here to reduce
2439	  the size & complexity of your kernel.
2440
2441	  If unsure, say Y.
2442
2443config CPU_HAS_WB
2444	bool
2445
2446config XKS01
2447	bool
2448
2449config CPU_HAS_DIEI
2450	depends on !CPU_DIEI_BROKEN
2451	bool
2452
2453config CPU_DIEI_BROKEN
2454	bool
2455
2456config CPU_HAS_RIXI
2457	bool
2458
2459config CPU_NO_LOAD_STORE_LR
2460	bool
2461	help
2462	  CPU lacks support for unaligned load and store instructions:
2463	  LWL, LWR, SWL, SWR (Load/store word left/right).
2464	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2465	  systems).
2466
2467#
2468# Vectored interrupt mode is an R2 feature
2469#
2470config CPU_MIPSR2_IRQ_VI
2471	bool
2472
2473#
2474# Extended interrupt mode is an R2 feature
2475#
2476config CPU_MIPSR2_IRQ_EI
2477	bool
2478
2479config CPU_HAS_SYNC
2480	bool
2481	depends on !CPU_R3000
2482	default y
2483
2484#
2485# CPU non-features
2486#
2487
2488# Work around the "daddi" and "daddiu" CPU errata:
2489#
2490# - The `daddi' instruction fails to trap on overflow.
2491#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2492#   erratum #23
2493#
2494# - The `daddiu' instruction can produce an incorrect result.
2495#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2496#   erratum #41
2497#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2498#   #15
2499#   "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2500#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2501config CPU_DADDI_WORKAROUNDS
2502	bool
2503
2504# Work around certain R4000 CPU errata (as implemented by GCC):
2505#
2506# - A double-word or a variable shift may give an incorrect result
2507#   if executed immediately after starting an integer division:
2508#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2509#   erratum #28
2510#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2511#   #19
2512#
2513# - A double-word or a variable shift may give an incorrect result
2514#   if executed while an integer multiplication is in progress:
2515#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2516#   errata #16 & #28
2517#
2518# - An integer division may give an incorrect result if started in
2519#   a delay slot of a taken branch or a jump:
2520#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2521#   erratum #52
2522config CPU_R4000_WORKAROUNDS
2523	bool
2524	select CPU_R4400_WORKAROUNDS
2525
2526# Work around certain R4400 CPU errata (as implemented by GCC):
2527#
2528# - A double-word or a variable shift may give an incorrect result
2529#   if executed immediately after starting an integer division:
2530#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2531#   "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2532config CPU_R4400_WORKAROUNDS
2533	bool
2534
2535config CPU_R4X00_BUGS64
2536	bool
2537	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2538
2539config MIPS_ASID_SHIFT
2540	int
2541	default 6 if CPU_R3000
2542	default 0
2543
2544config MIPS_ASID_BITS
2545	int
2546	default 0 if MIPS_ASID_BITS_VARIABLE
2547	default 6 if CPU_R3000
2548	default 8
2549
2550config MIPS_ASID_BITS_VARIABLE
2551	bool
2552
2553config MIPS_CRC_SUPPORT
2554	bool
2555
2556# R4600 erratum.  Due to the lack of errata information the exact
2557# technical details aren't known.  I've experimentally found that disabling
2558# interrupts during indexed I-cache flushes seems to be sufficient to deal
2559# with the issue.
2560config WAR_R4600_V1_INDEX_ICACHEOP
2561	bool
2562
2563# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2564#
2565#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2566#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2567#      executed if there is no other dcache activity. If the dcache is
2568#      accessed for another instruction immediately preceding when these
2569#      cache instructions are executing, it is possible that the dcache
2570#      tag match outputs used by these cache instructions will be
2571#      incorrect. These cache instructions should be preceded by at least
2572#      four instructions that are not any kind of load or store
2573#      instruction.
2574#
2575#      This is not allowed:    lw
2576#                              nop
2577#                              nop
2578#                              nop
2579#                              cache       Hit_Writeback_Invalidate_D
2580#
2581#      This is allowed:        lw
2582#                              nop
2583#                              nop
2584#                              nop
2585#                              nop
2586#                              cache       Hit_Writeback_Invalidate_D
2587config WAR_R4600_V1_HIT_CACHEOP
2588	bool
2589
2590# Writeback and invalidate the primary cache dcache before DMA.
2591#
2592# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2593# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2594# operate correctly if the internal data cache refill buffer is empty.  These
2595# CACHE instructions should be separated from any potential data cache miss
2596# by a load instruction to an uncached address to empty the response buffer."
2597# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2598# in .pdf format.)
2599config WAR_R4600_V2_HIT_CACHEOP
2600	bool
2601
2602# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2603# the line which this instruction itself exists, the following
2604# operation is not guaranteed."
2605#
2606# Workaround: do two phase flushing for Index_Invalidate_I
2607config WAR_TX49XX_ICACHE_INDEX_INV
2608	bool
2609
2610# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2611# opposes it being called that) where invalid instructions in the same
2612# I-cache line worth of instructions being fetched may case spurious
2613# exceptions.
2614config WAR_ICACHE_REFILLS
2615	bool
2616
2617# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2618# may cause ll / sc and lld / scd sequences to execute non-atomically.
2619config WAR_R10000_LLSC
2620	bool
2621
2622# 34K core erratum: "Problems Executing the TLBR Instruction"
2623config WAR_MIPS34K_MISSED_ITLB
2624	bool
2625
2626#
2627# - Highmem only makes sense for the 32-bit kernel.
2628# - The current highmem code will only work properly on physically indexed
2629#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2630#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2631#   moment we protect the user and offer the highmem option only on machines
2632#   where it's known to be safe.  This will not offer highmem on a few systems
2633#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2634#   indexed CPUs but we're playing safe.
2635# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2636#   know they might have memory configurations that could make use of highmem
2637#   support.
2638#
2639config HIGHMEM
2640	bool "High Memory Support"
2641	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2642	select KMAP_LOCAL
2643
2644config CPU_SUPPORTS_HIGHMEM
2645	bool
2646
2647config SYS_SUPPORTS_HIGHMEM
2648	bool
2649
2650config SYS_SUPPORTS_SMARTMIPS
2651	bool
2652
2653config SYS_SUPPORTS_MICROMIPS
2654	bool
2655
2656config SYS_SUPPORTS_MIPS16
2657	bool
2658	help
2659	  This option must be set if a kernel might be executed on a MIPS16-
2660	  enabled CPU even if MIPS16 is not actually being used.  In other
2661	  words, it makes the kernel MIPS16-tolerant.
2662
2663config CPU_SUPPORTS_MSA
2664	bool
2665
2666config ARCH_FLATMEM_ENABLE
2667	def_bool y
2668	depends on !NUMA && !CPU_LOONGSON2EF
2669
2670config ARCH_SPARSEMEM_ENABLE
2671	bool
2672
2673config NUMA
2674	bool "NUMA Support"
2675	depends on SYS_SUPPORTS_NUMA
2676	select SMP
2677	select HAVE_SETUP_PER_CPU_AREA
2678	select NEED_PER_CPU_EMBED_FIRST_CHUNK
2679	help
2680	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2681	  Access).  This option improves performance on systems with more
2682	  than two nodes; on two node systems it is generally better to
2683	  leave it disabled; on single node systems leave this option
2684	  disabled.
2685
2686config SYS_SUPPORTS_NUMA
2687	bool
2688
2689config HAVE_ARCH_NODEDATA_EXTENSION
2690	bool
2691
2692config RELOCATABLE
2693	bool "Relocatable kernel"
2694	depends on SYS_SUPPORTS_RELOCATABLE
2695	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2696		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2697		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2698		   CPU_P5600 || CAVIUM_OCTEON_SOC || \
2699		   CPU_LOONGSON64
2700	help
2701	  This builds a kernel image that retains relocation information
2702	  so it can be loaded someplace besides the default 1MB.
2703	  The relocations make the kernel binary about 15% larger,
2704	  but are discarded at runtime
2705
2706config RELOCATION_TABLE_SIZE
2707	hex "Relocation table size"
2708	depends on RELOCATABLE
2709	range 0x0 0x01000000
2710	default "0x00200000" if CPU_LOONGSON64
2711	default "0x00100000"
2712	help
2713	  A table of relocation data will be appended to the kernel binary
2714	  and parsed at boot to fix up the relocated kernel.
2715
2716	  This option allows the amount of space reserved for the table to be
2717	  adjusted, although the default of 1Mb should be ok in most cases.
2718
2719	  The build will fail and a valid size suggested if this is too small.
2720
2721	  If unsure, leave at the default value.
2722
2723config RANDOMIZE_BASE
2724	bool "Randomize the address of the kernel image"
2725	depends on RELOCATABLE
2726	help
2727	  Randomizes the physical and virtual address at which the
2728	  kernel image is loaded, as a security feature that
2729	  deters exploit attempts relying on knowledge of the location
2730	  of kernel internals.
2731
2732	  Entropy is generated using any coprocessor 0 registers available.
2733
2734	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2735
2736	  If unsure, say N.
2737
2738config RANDOMIZE_BASE_MAX_OFFSET
2739	hex "Maximum kASLR offset" if EXPERT
2740	depends on RANDOMIZE_BASE
2741	range 0x0 0x40000000 if EVA || 64BIT
2742	range 0x0 0x08000000
2743	default "0x01000000"
2744	help
2745	  When kASLR is active, this provides the maximum offset that will
2746	  be applied to the kernel image. It should be set according to the
2747	  amount of physical RAM available in the target system minus
2748	  PHYSICAL_START and must be a power of 2.
2749
2750	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2751	  EVA or 64-bit. The default is 16Mb.
2752
2753config NODES_SHIFT
2754	int
2755	default "6"
2756	depends on NUMA
2757
2758config HW_PERF_EVENTS
2759	bool "Enable hardware performance counter support for perf events"
2760	depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2761	default y
2762	help
2763	  Enable hardware performance counter support for perf events. If
2764	  disabled, perf events will use software events only.
2765
2766config DMI
2767	bool "Enable DMI scanning"
2768	depends on MACH_LOONGSON64
2769	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2770	default y
2771	help
2772	  Enabled scanning of DMI to identify machine quirks. Say Y
2773	  here unless you have verified that your setup is not
2774	  affected by entries in the DMI blacklist. Required by PNP
2775	  BIOS code.
2776
2777config SMP
2778	bool "Multi-Processing support"
2779	depends on SYS_SUPPORTS_SMP
2780	help
2781	  This enables support for systems with more than one CPU. If you have
2782	  a system with only one CPU, say N. If you have a system with more
2783	  than one CPU, say Y.
2784
2785	  If you say N here, the kernel will run on uni- and multiprocessor
2786	  machines, but will use only one CPU of a multiprocessor machine. If
2787	  you say Y here, the kernel will run on many, but not all,
2788	  uniprocessor machines. On a uniprocessor machine, the kernel
2789	  will run faster if you say N here.
2790
2791	  People using multiprocessor machines who say Y here should also say
2792	  Y to "Enhanced Real Time Clock Support", below.
2793
2794	  See also the SMP-HOWTO available at
2795	  <https://www.tldp.org/docs.html#howto>.
2796
2797	  If you don't know what to do here, say N.
2798
2799config HOTPLUG_CPU
2800	bool "Support for hot-pluggable CPUs"
2801	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2802	help
2803	  Say Y here to allow turning CPUs off and on. CPUs can be
2804	  controlled through /sys/devices/system/cpu.
2805	  (Note: power management support will enable this option
2806	    automatically on SMP systems. )
2807	  Say N if you want to disable CPU hotplug.
2808
2809config SMP_UP
2810	bool
2811
2812config SYS_SUPPORTS_MIPS_CMP
2813	bool
2814
2815config SYS_SUPPORTS_MIPS_CPS
2816	bool
2817
2818config SYS_SUPPORTS_SMP
2819	bool
2820
2821config NR_CPUS_DEFAULT_4
2822	bool
2823
2824config NR_CPUS_DEFAULT_8
2825	bool
2826
2827config NR_CPUS_DEFAULT_16
2828	bool
2829
2830config NR_CPUS_DEFAULT_32
2831	bool
2832
2833config NR_CPUS_DEFAULT_64
2834	bool
2835
2836config NR_CPUS
2837	int "Maximum number of CPUs (2-256)"
2838	range 2 256
2839	depends on SMP
2840	default "4" if NR_CPUS_DEFAULT_4
2841	default "8" if NR_CPUS_DEFAULT_8
2842	default "16" if NR_CPUS_DEFAULT_16
2843	default "32" if NR_CPUS_DEFAULT_32
2844	default "64" if NR_CPUS_DEFAULT_64
2845	help
2846	  This allows you to specify the maximum number of CPUs which this
2847	  kernel will support.  The maximum supported value is 32 for 32-bit
2848	  kernel and 64 for 64-bit kernels; the minimum value which makes
2849	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2850	  and 2 for all others.
2851
2852	  This is purely to save memory - each supported CPU adds
2853	  approximately eight kilobytes to the kernel image.  For best
2854	  performance should round up your number of processors to the next
2855	  power of two.
2856
2857config MIPS_PERF_SHARED_TC_COUNTERS
2858	bool
2859
2860config MIPS_NR_CPU_NR_MAP_1024
2861	bool
2862
2863config MIPS_NR_CPU_NR_MAP
2864	int
2865	depends on SMP
2866	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2867	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2868
2869#
2870# Timer Interrupt Frequency Configuration
2871#
2872
2873choice
2874	prompt "Timer frequency"
2875	default HZ_250
2876	help
2877	  Allows the configuration of the timer frequency.
2878
2879	config HZ_24
2880		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2881
2882	config HZ_48
2883		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2884
2885	config HZ_100
2886		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2887
2888	config HZ_128
2889		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2890
2891	config HZ_250
2892		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2893
2894	config HZ_256
2895		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2896
2897	config HZ_1000
2898		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2899
2900	config HZ_1024
2901		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2902
2903endchoice
2904
2905config SYS_SUPPORTS_24HZ
2906	bool
2907
2908config SYS_SUPPORTS_48HZ
2909	bool
2910
2911config SYS_SUPPORTS_100HZ
2912	bool
2913
2914config SYS_SUPPORTS_128HZ
2915	bool
2916
2917config SYS_SUPPORTS_250HZ
2918	bool
2919
2920config SYS_SUPPORTS_256HZ
2921	bool
2922
2923config SYS_SUPPORTS_1000HZ
2924	bool
2925
2926config SYS_SUPPORTS_1024HZ
2927	bool
2928
2929config SYS_SUPPORTS_ARBIT_HZ
2930	bool
2931	default y if !SYS_SUPPORTS_24HZ && \
2932		     !SYS_SUPPORTS_48HZ && \
2933		     !SYS_SUPPORTS_100HZ && \
2934		     !SYS_SUPPORTS_128HZ && \
2935		     !SYS_SUPPORTS_250HZ && \
2936		     !SYS_SUPPORTS_256HZ && \
2937		     !SYS_SUPPORTS_1000HZ && \
2938		     !SYS_SUPPORTS_1024HZ
2939
2940config HZ
2941	int
2942	default 24 if HZ_24
2943	default 48 if HZ_48
2944	default 100 if HZ_100
2945	default 128 if HZ_128
2946	default 250 if HZ_250
2947	default 256 if HZ_256
2948	default 1000 if HZ_1000
2949	default 1024 if HZ_1024
2950
2951config SCHED_HRTICK
2952	def_bool HIGH_RES_TIMERS
2953
2954config KEXEC
2955	bool "Kexec system call"
2956	select KEXEC_CORE
2957	help
2958	  kexec is a system call that implements the ability to shutdown your
2959	  current kernel, and to start another kernel.  It is like a reboot
2960	  but it is independent of the system firmware.   And like a reboot
2961	  you can start any kernel with it, not just Linux.
2962
2963	  The name comes from the similarity to the exec system call.
2964
2965	  It is an ongoing process to be certain the hardware in a machine
2966	  is properly shutdown, so do not be surprised if this code does not
2967	  initially work for you.  As of this writing the exact hardware
2968	  interface is strongly in flux, so no good recommendation can be
2969	  made.
2970
2971config CRASH_DUMP
2972	bool "Kernel crash dumps"
2973	help
2974	  Generate crash dump after being started by kexec.
2975	  This should be normally only set in special crash dump kernels
2976	  which are loaded in the main kernel with kexec-tools into
2977	  a specially reserved region and then later executed after
2978	  a crash by kdump/kexec. The crash dump kernel must be compiled
2979	  to a memory address not used by the main kernel or firmware using
2980	  PHYSICAL_START.
2981
2982config PHYSICAL_START
2983	hex "Physical address where the kernel is loaded"
2984	default "0xffffffff84000000"
2985	depends on CRASH_DUMP
2986	help
2987	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2988	  If you plan to use kernel for capturing the crash dump change
2989	  this value to start of the reserved region (the "X" value as
2990	  specified in the "crashkernel=YM@XM" command line boot parameter
2991	  passed to the panic-ed kernel).
2992
2993config MIPS_O32_FP64_SUPPORT
2994	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2995	depends on 32BIT || MIPS32_O32
2996	help
2997	  When this is enabled, the kernel will support use of 64-bit floating
2998	  point registers with binaries using the O32 ABI along with the
2999	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3000	  32-bit MIPS systems this support is at the cost of increasing the
3001	  size and complexity of the compiled FPU emulator. Thus if you are
3002	  running a MIPS32 system and know that none of your userland binaries
3003	  will require 64-bit floating point, you may wish to reduce the size
3004	  of your kernel & potentially improve FP emulation performance by
3005	  saying N here.
3006
3007	  Although binutils currently supports use of this flag the details
3008	  concerning its effect upon the O32 ABI in userland are still being
3009	  worked on. In order to avoid userland becoming dependent upon current
3010	  behaviour before the details have been finalised, this option should
3011	  be considered experimental and only enabled by those working upon
3012	  said details.
3013
3014	  If unsure, say N.
3015
3016config USE_OF
3017	bool
3018	select OF
3019	select OF_EARLY_FLATTREE
3020	select IRQ_DOMAIN
3021
3022config UHI_BOOT
3023	bool
3024
3025config BUILTIN_DTB
3026	bool
3027
3028choice
3029	prompt "Kernel appended dtb support" if USE_OF
3030	default MIPS_NO_APPENDED_DTB
3031
3032	config MIPS_NO_APPENDED_DTB
3033		bool "None"
3034		help
3035		  Do not enable appended dtb support.
3036
3037	config MIPS_ELF_APPENDED_DTB
3038		bool "vmlinux"
3039		help
3040		  With this option, the boot code will look for a device tree binary
3041		  DTB) included in the vmlinux ELF section .appended_dtb. By default
3042		  it is empty and the DTB can be appended using binutils command
3043		  objcopy:
3044
3045		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3046
3047		  This is meant as a backward compatibility convenience for those
3048		  systems with a bootloader that can't be upgraded to accommodate
3049		  the documented boot protocol using a device tree.
3050
3051	config MIPS_RAW_APPENDED_DTB
3052		bool "vmlinux.bin or vmlinuz.bin"
3053		help
3054		  With this option, the boot code will look for a device tree binary
3055		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3056		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3057
3058		  This is meant as a backward compatibility convenience for those
3059		  systems with a bootloader that can't be upgraded to accommodate
3060		  the documented boot protocol using a device tree.
3061
3062		  Beware that there is very little in terms of protection against
3063		  this option being confused by leftover garbage in memory that might
3064		  look like a DTB header after a reboot if no actual DTB is appended
3065		  to vmlinux.bin.  Do not leave this option active in a production kernel
3066		  if you don't intend to always append a DTB.
3067endchoice
3068
3069choice
3070	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3071	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3072					 !MACH_LOONGSON64 && !MIPS_MALTA && \
3073					 !CAVIUM_OCTEON_SOC
3074	default MIPS_CMDLINE_FROM_BOOTLOADER
3075
3076	config MIPS_CMDLINE_FROM_DTB
3077		depends on USE_OF
3078		bool "Dtb kernel arguments if available"
3079
3080	config MIPS_CMDLINE_DTB_EXTEND
3081		depends on USE_OF
3082		bool "Extend dtb kernel arguments with bootloader arguments"
3083
3084	config MIPS_CMDLINE_FROM_BOOTLOADER
3085		bool "Bootloader kernel arguments if available"
3086
3087	config MIPS_CMDLINE_BUILTIN_EXTEND
3088		depends on CMDLINE_BOOL
3089		bool "Extend builtin kernel arguments with bootloader arguments"
3090endchoice
3091
3092endmenu
3093
3094config LOCKDEP_SUPPORT
3095	bool
3096	default y
3097
3098config STACKTRACE_SUPPORT
3099	bool
3100	default y
3101
3102config PGTABLE_LEVELS
3103	int
3104	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3105	default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3106	default 2
3107
3108config MIPS_AUTO_PFN_OFFSET
3109	bool
3110
3111menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3112
3113config PCI_DRIVERS_GENERIC
3114	select PCI_DOMAINS_GENERIC if PCI
3115	bool
3116
3117config PCI_DRIVERS_LEGACY
3118	def_bool !PCI_DRIVERS_GENERIC
3119	select NO_GENERIC_PCI_IOPORT_MAP
3120	select PCI_DOMAINS if PCI
3121
3122#
3123# ISA support is now enabled via select.  Too many systems still have the one
3124# or other ISA chip on the board that users don't know about so don't expect
3125# users to choose the right thing ...
3126#
3127config ISA
3128	bool
3129
3130config TC
3131	bool "TURBOchannel support"
3132	depends on MACH_DECSTATION
3133	help
3134	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3135	  processors.  TURBOchannel programming specifications are available
3136	  at:
3137	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3138	  and:
3139	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3140	  Linux driver support status is documented at:
3141	  <http://www.linux-mips.org/wiki/DECstation>
3142
3143config MMU
3144	bool
3145	default y
3146
3147config ARCH_MMAP_RND_BITS_MIN
3148	default 12 if 64BIT
3149	default 8
3150
3151config ARCH_MMAP_RND_BITS_MAX
3152	default 18 if 64BIT
3153	default 15
3154
3155config ARCH_MMAP_RND_COMPAT_BITS_MIN
3156	default 8
3157
3158config ARCH_MMAP_RND_COMPAT_BITS_MAX
3159	default 15
3160
3161config I8253
3162	bool
3163	select CLKSRC_I8253
3164	select CLKEVT_I8253
3165	select MIPS_EXTERNAL_TIMER
3166endmenu
3167
3168config TRAD_SIGNALS
3169	bool
3170
3171config MIPS32_COMPAT
3172	bool
3173
3174config COMPAT
3175	bool
3176
3177config MIPS32_O32
3178	bool "Kernel support for o32 binaries"
3179	depends on 64BIT
3180	select ARCH_WANT_OLD_COMPAT_IPC
3181	select COMPAT
3182	select MIPS32_COMPAT
3183	help
3184	  Select this option if you want to run o32 binaries.  These are pure
3185	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3186	  existing binaries are in this format.
3187
3188	  If unsure, say Y.
3189
3190config MIPS32_N32
3191	bool "Kernel support for n32 binaries"
3192	depends on 64BIT
3193	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3194	select COMPAT
3195	select MIPS32_COMPAT
3196	help
3197	  Select this option if you want to run n32 binaries.  These are
3198	  64-bit binaries using 32-bit quantities for addressing and certain
3199	  data that would normally be 64-bit.  They are used in special
3200	  cases.
3201
3202	  If unsure, say N.
3203
3204config CC_HAS_MNO_BRANCH_LIKELY
3205	def_bool y
3206	depends on $(cc-option,-mno-branch-likely)
3207
3208menu "Power management options"
3209
3210config ARCH_HIBERNATION_POSSIBLE
3211	def_bool y
3212	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3213
3214config ARCH_SUSPEND_POSSIBLE
3215	def_bool y
3216	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3217
3218source "kernel/power/Kconfig"
3219
3220endmenu
3221
3222config MIPS_EXTERNAL_TIMER
3223	bool
3224
3225menu "CPU Power Management"
3226
3227if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3228source "drivers/cpufreq/Kconfig"
3229endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3230
3231source "drivers/cpuidle/Kconfig"
3232
3233endmenu
3234
3235source "arch/mips/kvm/Kconfig"
3236
3237source "arch/mips/vdso/Kconfig"
3238