1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> 5 */ 6#include <dt-bindings/pinctrl/stm32-pinfunc.h> 7 8&pinctrl { 9 i2c1_pins_a: i2c1-0 { 10 pins { 11 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ 12 <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */ 13 bias-disable; 14 drive-open-drain; 15 slew-rate = <0>; 16 }; 17 }; 18 19 i2c1_sleep_pins_a: i2c1-sleep-0 { 20 pins { 21 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ 22 <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */ 23 }; 24 }; 25 26 i2c5_pins_a: i2c5-0 { 27 pins { 28 pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */ 29 <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */ 30 bias-disable; 31 drive-open-drain; 32 slew-rate = <0>; 33 }; 34 }; 35 36 i2c5_sleep_pins_a: i2c5-sleep-0 { 37 pins { 38 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */ 39 <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */ 40 }; 41 }; 42 43 sdmmc1_b4_pins_a: sdmmc1-b4-0 { 44 pins { 45 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 46 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 47 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 48 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 49 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 50 slew-rate = <1>; 51 drive-push-pull; 52 bias-disable; 53 }; 54 }; 55 56 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { 57 pins1 { 58 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 59 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 60 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 61 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ 62 slew-rate = <1>; 63 drive-push-pull; 64 bias-disable; 65 }; 66 pins2 { 67 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 68 slew-rate = <1>; 69 drive-open-drain; 70 bias-disable; 71 }; 72 }; 73 74 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { 75 pins { 76 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ 77 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ 78 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ 79 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ 80 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ 81 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ 82 }; 83 }; 84 85 sdmmc1_clk_pins_a: sdmmc1-clk-0 { 86 pins { 87 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 88 slew-rate = <1>; 89 drive-push-pull; 90 bias-disable; 91 }; 92 }; 93 94 sdmmc2_b4_pins_a: sdmmc2-b4-0 { 95 pins { 96 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ 97 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ 98 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ 99 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */ 100 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 101 slew-rate = <1>; 102 drive-push-pull; 103 bias-pull-up; 104 }; 105 }; 106 107 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { 108 pins1 { 109 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ 110 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ 111 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ 112 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */ 113 slew-rate = <1>; 114 drive-push-pull; 115 bias-pull-up; 116 }; 117 pins2 { 118 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ 119 slew-rate = <1>; 120 drive-open-drain; 121 bias-pull-up; 122 }; 123 }; 124 125 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { 126 pins { 127 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ 128 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ 129 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ 130 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ 131 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ 132 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ 133 }; 134 }; 135 136 sdmmc2_clk_pins_a: sdmmc2-clk-0 { 137 pins { 138 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */ 139 slew-rate = <1>; 140 drive-push-pull; 141 bias-pull-up; 142 }; 143 }; 144 145 spi5_pins_a: spi5-0 { 146 pins1 { 147 pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */ 148 <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */ 149 bias-disable; 150 drive-push-pull; 151 slew-rate = <1>; 152 }; 153 154 pins2 { 155 pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */ 156 bias-disable; 157 }; 158 }; 159 160 spi5_sleep_pins_a: spi5-sleep-0 { 161 pins { 162 pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */ 163 <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */ 164 <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */ 165 }; 166 }; 167 168 uart4_pins_a: uart4-0 { 169 pins1 { 170 pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */ 171 bias-disable; 172 drive-push-pull; 173 slew-rate = <0>; 174 }; 175 pins2 { 176 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ 177 bias-disable; 178 }; 179 }; 180}; 181