1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device tree for the Tolino Shine 2 HD ebook reader
4 *
5 * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3
6 * Serials start with: E60QF2
7 *
8 * Copyright 2020 Andreas Kemnade
9 */
10
11/dts-v1/;
12
13#include <dt-bindings/input/input.h>
14#include <dt-bindings/gpio/gpio.h>
15#include "imx6sl.dtsi"
16
17/ {
18	model = "Tolino Shine 2 HD";
19	compatible = "kobo,tolino-shine2hd", "fsl,imx6sl";
20
21	chosen {
22		stdout-path = &uart1;
23	};
24
25	gpio_keys: gpio-keys {
26		compatible = "gpio-keys";
27		pinctrl-names = "default";
28		pinctrl-0 = <&pinctrl_gpio_keys>;
29
30		key-cover {
31			label = "Cover";
32			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
33			linux,code = <SW_LID>;
34			linux,input-type = <EV_SW>;
35			wakeup-source;
36		};
37
38		key-fl {
39			label = "Frontlight";
40			gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
41			linux,code = <KEY_BRIGHTNESS_CYCLE>;
42		};
43
44		key-home {
45			label = "Home";
46			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
47			linux,code = <KEY_HOME>;
48		};
49
50		key-power {
51			label = "Power";
52			gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
53			linux,code = <KEY_POWER>;
54			wakeup-source;
55		};
56	};
57
58	leds: leds {
59		compatible = "gpio-leds";
60		pinctrl-names = "default";
61		pinctrl-0 = <&pinctrl_led>;
62
63		led-0 {
64			label = "tolinoshine2hd:white:on";
65			gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
66			linux,default-trigger = "timer";
67		};
68	};
69
70	memory@80000000 {
71		device_type = "memory";
72		reg = <0x80000000 0x20000000>;
73	};
74
75	reg_wifi: regulator-wifi {
76		compatible = "regulator-fixed";
77		pinctrl-names = "default";
78		pinctrl-0 = <&pinctrl_wifi_power>;
79		regulator-name = "SD3_SPWR";
80		regulator-min-microvolt = <3000000>;
81		regulator-max-microvolt = <3000000>;
82		gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
83	};
84
85	wifi_pwrseq: wifi_pwrseq {
86		compatible = "mmc-pwrseq-simple";
87		pinctrl-names = "default";
88		pinctrl-0 = <&pinctrl_wifi_reset>;
89		post-power-on-delay-ms = <20>;
90		reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
91	};
92};
93
94&i2c1 {
95	pinctrl-names = "default","sleep";
96	pinctrl-0 = <&pinctrl_i2c1>;
97	pinctrl-1 = <&pinctrl_i2c1_sleep>;
98	status = "okay";
99
100	ec: embedded-controller@43 {
101		compatible = "netronix,ntxec";
102		reg = <0x43>;
103		#pwm-cells = <2>;
104	};
105};
106
107&i2c2 {
108	pinctrl-names = "default","sleep";
109	pinctrl-0 = <&pinctrl_i2c2>;
110	pinctrl-1 = <&pinctrl_i2c2_sleep>;
111	clock-frequency = <100000>;
112	status = "okay";
113
114	zforce: touchscreen@50 {
115		compatible = "neonode,zforce";
116		pinctrl-names = "default";
117		pinctrl-0 = <&pinctrl_zforce>;
118		reg = <0x50>;
119		interrupt-parent = <&gpio5>;
120		interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
121		vdd-supply = <&ldo1_reg>;
122		reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
123		x-size = <1072>;
124		y-size = <1448>;
125	};
126
127	/* TODO: TPS65185 PMIC for E Ink at 0x68 */
128
129};
130
131&i2c3 {
132	pinctrl-names = "default";
133	pinctrl-0 = <&pinctrl_i2c3>;
134	clock-frequency = <400000>;
135	status = "okay";
136
137	ricoh619: pmic@32 {
138		compatible = "ricoh,rc5t619";
139		pinctrl-names = "default";
140		pinctrl-0 = <&pinctrl_ricoh_gpio>;
141		reg = <0x32>;
142		interrupt-parent = <&gpio5>;
143		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
144		system-power-controller;
145
146		regulators {
147			dcdc1_reg: DCDC1 {
148				regulator-name = "DCDC1";
149				regulator-min-microvolt = <300000>;
150				regulator-max-microvolt = <1875000>;
151				regulator-always-on;
152				regulator-boot-on;
153
154				regulator-state-mem {
155					regulator-on-in-suspend;
156					regulator-suspend-max-microvolt = <900000>;
157					regulator-suspend-min-microvolt = <900000>;
158				};
159			};
160
161			/* Core3_3V3 */
162			dcdc2_reg: DCDC2 {
163				regulator-name = "DCDC2";
164				regulator-always-on;
165				regulator-boot-on;
166
167				regulator-state-mem {
168					regulator-on-in-suspend;
169					regulator-suspend-max-microvolt = <3100000>;
170					regulator-suspend-min-microvolt = <3100000>;
171				};
172			};
173
174			dcdc3_reg: DCDC3 {
175				regulator-name = "DCDC3";
176				regulator-min-microvolt = <300000>;
177				regulator-max-microvolt = <1875000>;
178				regulator-always-on;
179				regulator-boot-on;
180
181				regulator-state-mem {
182					regulator-on-in-suspend;
183					regulator-suspend-max-microvolt = <1140000>;
184					regulator-suspend-min-microvolt = <1140000>;
185				};
186			};
187
188			/* Core4_1V2 */
189			dcdc4_reg: DCDC4 {
190				regulator-name = "DCDC4";
191				regulator-min-microvolt = <1200000>;
192				regulator-max-microvolt = <1200000>;
193				regulator-always-on;
194				regulator-boot-on;
195
196				regulator-state-mem {
197					regulator-on-in-suspend;
198					regulator-suspend-max-microvolt = <1140000>;
199					regulator-suspend-min-microvolt = <1140000>;
200				};
201			};
202
203			/* Core4_1V8 */
204			dcdc5_reg: DCDC5 {
205				regulator-name = "DCDC5";
206				regulator-min-microvolt = <1800000>;
207				regulator-max-microvolt = <1800000>;
208				regulator-always-on;
209				regulator-boot-on;
210
211				regulator-state-mem {
212					regulator-on-in-suspend;
213					regulator-suspend-max-microvolt = <1700000>;
214					regulator-suspend-min-microvolt = <1700000>;
215				};
216			};
217
218			/* IR_3V3 */
219			ldo1_reg: LDO1  {
220				regulator-name = "LDO1";
221				regulator-boot-on;
222			};
223
224			/* Core1_3V3 */
225			ldo2_reg: LDO2  {
226				regulator-name = "LDO2";
227				regulator-always-on;
228				regulator-boot-on;
229
230				regulator-state-mem {
231					regulator-on-in-suspend;
232					regulator-suspend-max-microvolt = <3000000>;
233					regulator-suspend-min-microvolt = <3000000>;
234				};
235			};
236
237			/* Core5_1V2 */
238			ldo3_reg: LDO3  {
239				regulator-name = "LDO3";
240				regulator-always-on;
241				regulator-boot-on;
242			};
243
244			ldo4_reg: LDO4 {
245				regulator-name = "LDO4";
246				regulator-boot-on;
247			};
248
249			/* SPD_3V3 */
250			ldo5_reg: LDO5 {
251				regulator-name = "LDO5";
252				regulator-always-on;
253				regulator-boot-on;
254			};
255
256			/* DDR_0V6 */
257			ldo6_reg: LDO6 {
258				regulator-name = "LDO6";
259				regulator-always-on;
260				regulator-boot-on;
261			};
262
263			/* VDD_PWM */
264			ldo7_reg: LDO7 {
265				regulator-name = "LDO7";
266				regulator-always-on;
267				regulator-boot-on;
268			};
269
270			/* ldo_1v8 */
271			ldo8_reg: LDO8 {
272				regulator-name = "LDO8";
273				regulator-min-microvolt = <1800000>;
274				regulator-max-microvolt = <1800000>;
275				regulator-always-on;
276				regulator-boot-on;
277			};
278
279			ldo9_reg: LDO9 {
280				regulator-name = "LDO9";
281				regulator-boot-on;
282			};
283
284			ldo10_reg: LDO10 {
285				regulator-name = "LDO10";
286				regulator-boot-on;
287			};
288
289			ldortc1_reg: LDORTC1  {
290				regulator-name = "LDORTC1";
291				regulator-always-on;
292				regulator-boot-on;
293			};
294		};
295	};
296};
297
298&iomuxc {
299	pinctrl-names = "default";
300	pinctrl-0 = <&pinctrl_hog>;
301
302	pinctrl_gpio_keys: gpio-keysgrp {
303		fsl,pins = <
304			MX6SL_PAD_SD1_DAT1__GPIO5_IO08  0x17059
305			MX6SL_PAD_SD1_DAT4__GPIO5_IO12  0x17059
306			MX6SL_PAD_KEY_COL1__GPIO3_IO26  0x17059
307			MX6SL_PAD_KEY_ROW0__GPIO3_IO25  0x17059
308		>;
309	};
310
311	pinctrl_hog: hoggrp {
312		fsl,pins = <
313			MX6SL_PAD_LCD_DAT0__GPIO2_IO20	0x79
314			MX6SL_PAD_LCD_DAT1__GPIO2_IO21	0x79
315			MX6SL_PAD_LCD_DAT2__GPIO2_IO22	0x79
316			MX6SL_PAD_LCD_DAT3__GPIO2_IO23	0x79
317			MX6SL_PAD_LCD_DAT4__GPIO2_IO24	0x79
318			MX6SL_PAD_LCD_DAT5__GPIO2_IO25	0x79
319			MX6SL_PAD_LCD_DAT6__GPIO2_IO26	0x79
320			MX6SL_PAD_LCD_DAT7__GPIO2_IO27	0x79
321			MX6SL_PAD_LCD_DAT8__GPIO2_IO28	0x79
322			MX6SL_PAD_LCD_DAT9__GPIO2_IO29	0x79
323			MX6SL_PAD_LCD_DAT10__GPIO2_IO30	0x79
324			MX6SL_PAD_LCD_DAT11__GPIO2_IO31	0x79
325			MX6SL_PAD_LCD_DAT12__GPIO3_IO00	0x79
326			MX6SL_PAD_LCD_DAT13__GPIO3_IO01	0x79
327			MX6SL_PAD_LCD_DAT14__GPIO3_IO02	0x79
328			MX6SL_PAD_LCD_DAT15__GPIO3_IO03	0x79
329			MX6SL_PAD_LCD_DAT16__GPIO3_IO04	0x79
330			MX6SL_PAD_LCD_DAT17__GPIO3_IO05	0x79
331			MX6SL_PAD_LCD_DAT18__GPIO3_IO06	0x79
332			MX6SL_PAD_LCD_DAT19__GPIO3_IO07	0x79
333			MX6SL_PAD_LCD_DAT20__GPIO3_IO08	0x79
334			MX6SL_PAD_LCD_DAT21__GPIO3_IO09	0x79
335			MX6SL_PAD_LCD_DAT22__GPIO3_IO10	0x79
336			MX6SL_PAD_LCD_DAT23__GPIO3_IO11	0x79
337			MX6SL_PAD_LCD_CLK__GPIO2_IO15		0x79
338			MX6SL_PAD_LCD_ENABLE__GPIO2_IO16	0x79
339			MX6SL_PAD_LCD_HSYNC__GPIO2_IO17	0x79
340			MX6SL_PAD_LCD_VSYNC__GPIO2_IO18	0x79
341			MX6SL_PAD_LCD_RESET__GPIO2_IO19	0x79
342			MX6SL_PAD_KEY_COL3__GPIO3_IO30		0x79
343			MX6SL_PAD_KEY_ROW7__GPIO4_IO07		0x79
344			MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13	0x79
345			MX6SL_PAD_KEY_COL5__GPIO4_IO02		0x79
346		>;
347	};
348
349	pinctrl_i2c1: i2c1grp {
350		fsl,pins = <
351			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x4001f8b1
352			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x4001f8b1
353		>;
354	};
355
356	pinctrl_i2c1_sleep: i2c1grp-sleep {
357		fsl,pins = <
358			MX6SL_PAD_I2C1_SCL__I2C1_SCL	 0x400108b1
359			MX6SL_PAD_I2C1_SDA__I2C1_SDA	 0x400108b1
360		>;
361	};
362
363	pinctrl_i2c2: i2c2grp {
364		fsl,pins = <
365			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x4001f8b1
366			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x4001f8b1
367		>;
368	};
369
370	pinctrl_i2c2_sleep: i2c2grp-sleep {
371		fsl,pins = <
372			MX6SL_PAD_I2C2_SCL__I2C2_SCL	 0x400108b1
373			MX6SL_PAD_I2C2_SDA__I2C2_SDA	 0x400108b1
374		>;
375	};
376
377	pinctrl_i2c3: i2c3grp {
378		fsl,pins = <
379			MX6SL_PAD_REF_CLK_24M__I2C3_SCL  0x4001f8b1
380			MX6SL_PAD_REF_CLK_32K__I2C3_SDA  0x4001f8b1
381		>;
382	};
383
384	pinctrl_led: ledgrp {
385		fsl,pins = <
386			MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x17059
387		>;
388	};
389
390	pinctrl_ricoh_gpio: ricoh_gpiogrp {
391		fsl,pins = <
392			MX6SL_PAD_SD1_CLK__GPIO5_IO15	0x1b8b1 /* ricoh619 chg */
393			MX6SL_PAD_SD1_DAT0__GPIO5_IO11	0x1b8b1 /* ricoh619 irq */
394			MX6SL_PAD_KEY_COL2__GPIO3_IO28	0x1b8b1 /* ricoh619 bat_low_int */
395		>;
396	};
397
398	pinctrl_uart1: uart1grp {
399		fsl,pins = <
400			MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
401			MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
402		>;
403	};
404
405	pinctrl_uart4: uart4grp {
406		fsl,pins = <
407			MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1
408			MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1
409		>;
410	};
411
412	pinctrl_usbotg1: usbotg1grp {
413		fsl,pins = <
414			MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
415		>;
416	};
417
418	pinctrl_usdhc2: usdhc2grp {
419		fsl,pins = <
420			MX6SL_PAD_SD2_CMD__SD2_CMD		0x17059
421			MX6SL_PAD_SD2_CLK__SD2_CLK		0x13059
422			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x17059
423			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x17059
424			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x17059
425			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x17059
426		>;
427	};
428
429	pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
430		fsl,pins = <
431			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170b9
432			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130b9
433			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
434			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
435			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
436			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
437		>;
438	};
439
440	pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
441		fsl,pins = <
442			MX6SL_PAD_SD2_CMD__SD2_CMD		0x170f9
443			MX6SL_PAD_SD2_CLK__SD2_CLK		0x130f9
444			MX6SL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
445			MX6SL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
446			MX6SL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
447			MX6SL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
448		>;
449	};
450
451	pinctrl_usdhc2_sleep: usdhc2grp-sleep {
452		fsl,pins = <
453			MX6SL_PAD_SD2_CMD__GPIO5_IO04		0x100f9
454			MX6SL_PAD_SD2_CLK__GPIO5_IO05		0x100f9
455			MX6SL_PAD_SD2_DAT0__GPIO5_IO01		0x100f9
456			MX6SL_PAD_SD2_DAT1__GPIO4_IO30		0x100f9
457			MX6SL_PAD_SD2_DAT2__GPIO5_IO03		0x100f9
458			MX6SL_PAD_SD2_DAT3__GPIO4_IO28		0x100f9
459		>;
460	};
461
462	pinctrl_usdhc3: usdhc3grp {
463		fsl,pins = <
464			MX6SL_PAD_SD3_CMD__SD3_CMD	0x11059
465			MX6SL_PAD_SD3_CLK__SD3_CLK	0x11059
466			MX6SL_PAD_SD3_DAT0__SD3_DATA0	0x11059
467			MX6SL_PAD_SD3_DAT1__SD3_DATA1	0x11059
468			MX6SL_PAD_SD3_DAT2__SD3_DATA2	0x11059
469			MX6SL_PAD_SD3_DAT3__SD3_DATA3	0x11059
470		>;
471	};
472
473	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
474		fsl,pins = <
475			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170b9
476			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170b9
477			MX6SL_PAD_SD3_DAT0__SD3_DATA0	0x170b9
478			MX6SL_PAD_SD3_DAT1__SD3_DATA1	0x170b9
479			MX6SL_PAD_SD3_DAT2__SD3_DATA2	0x170b9
480			MX6SL_PAD_SD3_DAT3__SD3_DATA3	0x170b9
481		>;
482	};
483
484	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
485		fsl,pins = <
486			MX6SL_PAD_SD3_CMD__SD3_CMD	0x170f9
487			MX6SL_PAD_SD3_CLK__SD3_CLK	0x170f9
488			MX6SL_PAD_SD3_DAT0__SD3_DATA0	0x170f9
489			MX6SL_PAD_SD3_DAT1__SD3_DATA1	0x170f9
490			MX6SL_PAD_SD3_DAT2__SD3_DATA2	0x170f9
491			MX6SL_PAD_SD3_DAT3__SD3_DATA3	0x170f9
492		>;
493	};
494
495	pinctrl_usdhc3_sleep: usdhc3grp-sleep {
496		fsl,pins = <
497			MX6SL_PAD_SD3_CMD__GPIO5_IO21	0x100c1
498			MX6SL_PAD_SD3_CLK__GPIO5_IO18	0x100c1
499			MX6SL_PAD_SD3_DAT0__GPIO5_IO19	0x100c1
500			MX6SL_PAD_SD3_DAT1__GPIO5_IO20	0x100c1
501			MX6SL_PAD_SD3_DAT2__GPIO5_IO16	0x100c1
502			MX6SL_PAD_SD3_DAT3__GPIO5_IO17	0x100c1
503		>;
504	};
505
506	pinctrl_wifi_power: wifi-powergrp {
507		fsl,pins = <
508			MX6SL_PAD_SD2_DAT6__GPIO4_IO29	0x10059	/* WIFI_3V3_ON */
509		>;
510	};
511
512	pinctrl_wifi_reset: wifi-resetgrp {
513		fsl,pins = <
514			MX6SL_PAD_SD2_DAT7__GPIO5_IO00	0x10059	/* WIFI_RST */
515		>;
516	};
517
518	pinctrl_zforce: zforcegrp {
519		fsl,pins = <
520			MX6SL_PAD_SD1_DAT3__GPIO5_IO06		0x17059 /* TP_INT */
521			MX6SL_PAD_SD1_DAT5__GPIO5_IO09		0x10059 /* TP_RST */
522		>;
523	};
524};
525
526&reg_vdd1p1 {
527	vin-supply = <&dcdc2_reg>;
528};
529
530&reg_vdd2p5 {
531	vin-supply = <&dcdc2_reg>;
532};
533
534&reg_arm {
535	vin-supply = <&dcdc3_reg>;
536};
537
538&reg_soc {
539	vin-supply = <&dcdc1_reg>;
540};
541
542&reg_pu {
543	vin-supply = <&dcdc1_reg>;
544};
545
546&snvs_rtc {
547	/*
548	 * We are using the RTC in the PMIC, but this one is not disabled
549	 * in imx6sl.dtsi.
550	 */
551	status = "disabled";
552};
553
554&uart1 {
555	/* J4, through-holes */
556	pinctrl-names = "default";
557	pinctrl-0 = <&pinctrl_uart1>;
558	status = "okay";
559};
560
561&uart4 {
562	/* TP198, next to J4, SMD pads */
563	pinctrl-names = "default";
564	pinctrl-0 = <&pinctrl_uart4>;
565	status = "okay";
566};
567
568&usdhc2 {
569	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
570	pinctrl-0 = <&pinctrl_usdhc2>;
571	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
572	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
573	pinctrl-3 = <&pinctrl_usdhc2_sleep>;
574	non-removable;
575	status = "okay";
576
577	/* internal uSD card */
578};
579
580&usdhc3 {
581	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
582	pinctrl-0 = <&pinctrl_usdhc3>;
583	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
584	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
585	pinctrl-3 = <&pinctrl_usdhc3_sleep>;
586	vmmc-supply = <&reg_wifi>;
587	mmc-pwrseq = <&wifi_pwrseq>;
588	cap-power-off-card;
589	non-removable;
590	status = "okay";
591
592	/*
593	 * 37NB-E60QF0+4A2: CyberTan WC121 (BCM43362) SDIO WiFi
594	 * 37NB-E60QF0+4A3: RTL8189F SDIO WiFi
595	 */
596};
597
598&usbotg1 {
599	pinctrl-names = "default";
600	disable-over-current;
601	srp-disable;
602	hnp-disable;
603	adp-disable;
604	status = "okay";
605};
606