1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (C) 2015-2018 Y Soft Corporation, a.s.
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/input/input.h>
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/pwm/pwm.h>
10
11/ {
12	aliases: aliases {
13		ethernet1 = &eth1;
14		ethernet2 = &eth2;
15		mmc0 = &usdhc3;
16		mmc1 = &usdhc4;
17	};
18
19	backlight: backlight {
20		compatible = "pwm-backlight";
21		pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
22		brightness-levels = <0 32 64 128 255>;
23		default-brightness-level = <32>;
24		num-interpolated-steps = <8>;
25		power-supply = <&sw2_reg>;
26		status = "disabled";
27	};
28
29	lcd_display: display {
30		compatible = "fsl,imx-parallel-display";
31		#address-cells = <1>;
32		#size-cells = <0>;
33		interface-pix-fmt = "rgb24";
34		pinctrl-names = "default";
35		pinctrl-0 = <&pinctrl_ipu1>;
36		status = "disabled";
37
38		port@0 {
39			reg = <0>;
40
41			lcd_display_in: endpoint {
42				remote-endpoint = <&ipu1_di0_disp0>;
43			};
44		};
45
46		port@1 {
47			reg = <1>;
48
49			lcd_display_out: endpoint {
50				remote-endpoint = <&lcd_panel_in>;
51			};
52		};
53	};
54
55	panel: panel {
56		compatible = "dataimage,scf0700c48ggu18";
57		power-supply = <&sw2_reg>;
58		backlight = <&backlight>;
59		status = "disabled";
60
61		port {
62			lcd_panel_in: endpoint {
63				remote-endpoint = <&lcd_display_out>;
64			};
65		};
66	};
67
68	reg_pcie: regulator-pcie {
69		compatible = "regulator-fixed";
70		pinctrl-names = "default";
71		pinctrl-0 = <&pinctrl_pcie_reg>;
72		regulator-name = "MPCIE_3V3";
73		regulator-min-microvolt = <3300000>;
74		regulator-max-microvolt = <3300000>;
75		gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
76		enable-active-high;
77		status = "disabled";
78	};
79
80	reg_usb_h1_vbus: regulator-usb-h1-vbus {
81		compatible = "regulator-fixed";
82		pinctrl-names = "default";
83		pinctrl-0 = <&pinctrl_usbh1_vbus>;
84		regulator-name = "usb_h1_vbus";
85		regulator-min-microvolt = <5000000>;
86		regulator-max-microvolt = <5000000>;
87		gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
88		enable-active-high;
89		status = "disabled";
90	};
91
92	reg_usb_otg_vbus: regulator-usb-otg-vbus {
93		compatible = "regulator-fixed";
94		pinctrl-names = "default";
95		pinctrl-0 = <&pinctrl_usbotg_vbus>;
96		regulator-name = "usb_otg_vbus";
97		regulator-min-microvolt = <5000000>;
98		regulator-max-microvolt = <5000000>;
99		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
100		enable-active-high;
101		status = "okay";
102	};
103};
104
105&fec {
106	pinctrl-names = "default";
107	pinctrl-0 = <&pinctrl_enet>;
108	phy-mode = "rgmii-id";
109	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
110	phy-reset-duration = <20>;
111	phy-supply = <&sw2_reg>;
112	status = "okay";
113
114	fixed-link {
115		speed = <1000>;
116		full-duplex;
117	};
118
119	mdio {
120		#address-cells = <1>;
121		#size-cells = <0>;
122
123		phy_port2: phy@1 {
124			reg = <1>;
125		};
126
127		phy_port3: phy@2 {
128			reg = <2>;
129		};
130
131		switch@10 {
132			compatible = "qca,qca8334";
133			reg = <10>;
134
135			switch_ports: ports {
136				#address-cells = <1>;
137				#size-cells = <0>;
138
139				ethphy0: port@0 {
140					reg = <0>;
141					label = "cpu";
142					phy-mode = "rgmii-id";
143					ethernet = <&fec>;
144
145					fixed-link {
146						speed = <1000>;
147						full-duplex;
148					};
149				};
150
151				eth2: port@2 {
152					reg = <2>;
153					label = "eth2";
154					phy-handle = <&phy_port2>;
155				};
156
157				eth1: port@3 {
158					reg = <3>;
159					label = "eth1";
160					phy-handle = <&phy_port3>;
161				};
162			};
163		};
164	};
165};
166
167&hdmi {
168	pinctrl-names = "default";
169	pinctrl-0 = <&pinctrl_hdmi_cec>;
170	ddc-i2c-bus = <&i2c2>;
171	status = "disabled";
172};
173
174&i2c2 {
175	clock-frequency = <100000>;
176	pinctrl-names = "default";
177	pinctrl-0 = <&pinctrl_i2c2>;
178	status = "okay";
179
180	pmic@8 {
181		compatible = "fsl,pfuze200";
182		pinctrl-names = "default";
183		pinctrl-0 = <&pinctrl_pmic>;
184		reg = <0x8>;
185
186		regulators {
187			sw1a_reg: sw1ab {
188				regulator-min-microvolt = <300000>;
189				regulator-max-microvolt = <1875000>;
190				regulator-boot-on;
191				regulator-always-on;
192				regulator-ramp-delay = <6250>;
193			};
194
195			sw2_reg: sw2 {
196				regulator-min-microvolt = <800000>;
197				regulator-max-microvolt = <3300000>;
198				regulator-boot-on;
199				regulator-always-on;
200			};
201
202			sw3a_reg: sw3a {
203				regulator-min-microvolt = <400000>;
204				regulator-max-microvolt = <1975000>;
205				regulator-boot-on;
206				regulator-always-on;
207			};
208
209			sw3b_reg: sw3b {
210				regulator-min-microvolt = <400000>;
211				regulator-max-microvolt = <1975000>;
212				regulator-boot-on;
213				regulator-always-on;
214			};
215
216			swbst_reg: swbst {
217				regulator-min-microvolt = <5000000>;
218				regulator-max-microvolt = <5150000>;
219			};
220
221			vgen1_reg: vgen1 {
222				regulator-min-microvolt = <800000>;
223				regulator-max-microvolt = <1550000>;
224			};
225
226			vgen2_reg: vgen2 {
227				regulator-min-microvolt = <800000>;
228				regulator-max-microvolt = <1550000>;
229			};
230
231			vgen3_reg: vgen3 {
232				regulator-min-microvolt = <1800000>;
233				regulator-max-microvolt = <3300000>;
234				regulator-always-on;
235			};
236
237			vgen4_reg: vgen4 {
238				regulator-min-microvolt = <1800000>;
239				regulator-max-microvolt = <3300000>;
240				regulator-always-on;
241			};
242
243			vgen5_reg: vgen5 {
244				regulator-min-microvolt = <1800000>;
245				regulator-max-microvolt = <3300000>;
246				regulator-always-on;
247			};
248
249			vgen6_reg: vgen6 {
250				regulator-min-microvolt = <1800000>;
251				regulator-max-microvolt = <3300000>;
252				regulator-always-on;
253			};
254
255			vref_reg: vrefddr {
256				regulator-boot-on;
257				regulator-always-on;
258			};
259
260			vsnvs_reg: vsnvs {
261				regulator-min-microvolt = <1000000>;
262				regulator-max-microvolt = <3000000>;
263				regulator-boot-on;
264				regulator-always-on;
265			};
266		};
267	};
268
269	leds: led-controller@30 {
270		compatible = "ti,lp5562";
271		reg = <0x30>;
272		clock-mode = /bits/ 8 <1>;
273		status = "disabled";
274		#address-cells = <1>;
275		#size-cells = <0>;
276
277		chan@0 {
278			chan-name = "R";
279			led-cur = /bits/ 8 <0x20>;
280			max-cur = /bits/ 8 <0x60>;
281			reg = <0>;
282			color = <LED_COLOR_ID_RED>;
283		};
284
285		chan@1 {
286			chan-name = "G";
287			led-cur = /bits/ 8 <0x20>;
288			max-cur = /bits/ 8 <0x60>;
289			reg = <1>;
290			color = <LED_COLOR_ID_GREEN>;
291		};
292
293		chan@2 {
294			chan-name = "B";
295			led-cur = /bits/ 8 <0x20>;
296			max-cur = /bits/ 8 <0x60>;
297			reg = <2>;
298			color = <LED_COLOR_ID_BLUE>;
299		};
300	};
301
302	eeprom@57 {
303		compatible = "atmel,24c128";
304		reg = <0x57>;
305		pagesize = <64>;
306		status = "okay";
307	};
308
309	touchscreen: touchscreen@5c {
310		compatible = "pixcir,pixcir_tangoc";
311		reg = <0x5c>;
312		pinctrl-0 = <&pinctrl_touch>;
313		interrupt-parent = <&gpio4>;
314		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
315		attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
316		reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
317		touchscreen-size-x = <800>;
318		touchscreen-size-y = <480>;
319		status = "disabled";
320	};
321};
322
323&i2c3 {
324	clock-frequency = <100000>;
325	pinctrl-names = "default";
326	pinctrl-0 = <&pinctrl_i2c3>;
327	status = "okay";
328
329	oled_1309: oled@3c {
330		compatible = "solomon,ssd1309fb-i2c";
331		reg = <0x3c>;
332		solomon,height = <64>;
333		solomon,width = <128>;
334		solomon,page-offset = <0>;
335		solomon,segment-no-remap;
336		solomon,prechargep2 = <15>;
337		reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
338		vbat-supply = <&sw2_reg>;
339		status = "disabled";
340	};
341
342	oled_1305: oled@3d {
343		compatible = "solomon,ssd1305fb-i2c";
344		reg = <0x3d>;
345		solomon,height = <64>;
346		solomon,width = <128>;
347		solomon,page-offset = <0>;
348		solomon,col-offset = <4>;
349		solomon,prechargep2 = <15>;
350		reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
351		vbat-supply = <&sw2_reg>;
352		status = "disabled";
353	};
354
355	gpio_oled: gpio@41 {
356		compatible = "nxp,pca9536";
357		gpio-controller;
358		#gpio-cells = <2>;
359		reg = <0x41>;
360		vcc-supply = <&sw2_reg>;
361		status = "disabled";
362	};
363
364	touchkeys: keys@5a {
365		compatible = "fsl,mpr121-touchkey";
366		reg = <0x5a>;
367		vdd-supply = <&sw2_reg>;
368		autorepeat;
369		linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
370				<KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
371				<KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
372		poll-interval = <50>;
373		status = "disabled";
374	};
375};
376
377&iomuxc {
378	pinctrl_enet: enetgrp {
379		fsl,pins = <
380			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b020
381			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b020
382			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b020
383			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b020
384			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b020
385			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b020
386			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b020
387			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b020
388			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b020
389			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b020
390			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b020
391			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b020
392			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b020
393			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b020
394			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b010
395			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x1b010
396			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b098
397		>;
398	};
399
400	pinctrl_hdmi_cec: hdmicecgrp {
401		fsl,pins = <
402			MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1b898
403		>;
404	};
405
406	pinctrl_i2c2: i2c2grp {
407		fsl,pins = <
408			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b899
409			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b899
410		>;
411	};
412
413	pinctrl_i2c3: i2c3grp {
414		fsl,pins = <
415			MX6QDL_PAD_GPIO_3__I2C3_SCL	0x4001b899
416			MX6QDL_PAD_GPIO_6__I2C3_SDA	0x4001b899
417		>;
418	};
419
420	pinctrl_ipu1: ipu1grp {
421		fsl,pins = <
422			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10
423			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10
424			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10
425			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10
426			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
427			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
428			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10
429			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10
430			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10
431			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10
432			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10
433			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10
434			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10
435			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10
436			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10
437			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10
438			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10
439			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10
440			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10
441			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10
442			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10
443			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10
444			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10
445			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10
446			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10
447			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10
448			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10
449		>;
450	};
451
452	pinctrl_pcie: pciegrp {
453		fsl,pins = <
454			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b098
455			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b098
456			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x1b098
457		>;
458	};
459
460	pinctrl_pcie_reg: pciereggrp {
461		fsl,pins = <
462			MX6QDL_PAD_EIM_D19__GPIO3_IO19	0x1b098
463		>;
464	};
465
466	pinctrl_pmic: pmicgrp {
467		fsl,pins = <
468			MX6QDL_PAD_GPIO_18__GPIO7_IO13	0x1b098
469		>;
470	};
471
472	pinctrl_pwm1: pwm1grp {
473		fsl,pins = <
474			MX6QDL_PAD_GPIO_9__PWM1_OUT	0x8
475		>;
476	};
477
478	pinctrl_touch: touchgrp {
479		fsl,pins = <
480			MX6QDL_PAD_GPIO_19__GPIO4_IO05	0x1b098
481			MX6QDL_PAD_GPIO_2__GPIO1_IO02	0x1b098
482		>;
483	};
484
485	pinctrl_uart1: uart1grp {
486		fsl,pins = <
487			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0a8
488			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0a8
489		>;
490	};
491
492	pinctrl_uart2: uart2grp {
493		fsl,pins = <
494			MX6QDL_PAD_GPIO_7__UART2_TX_DATA	0x1b098
495			MX6QDL_PAD_GPIO_8__UART2_RX_DATA	0x1b098
496		>;
497	};
498
499	pinctrl_usbh1: usbh1grp {
500		fsl,pins = <
501			MX6QDL_PAD_EIM_D30__USB_H1_OC	0x1b098
502		>;
503	};
504
505	pinctrl_usbh1_vbus: usbh1-vbus {
506		fsl,pins = <
507			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29	0x98
508		>;
509	};
510
511	pinctrl_usbotg: usbotggrp {
512		fsl,pins = <
513			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x1b098
514			MX6QDL_PAD_EIM_D21__USB_OTG_OC		0x1b098
515		>;
516	};
517
518	pinctrl_usbotg_vbus: usbotg-vbus {
519		fsl,pins = <
520			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x98
521		>;
522	};
523
524	pinctrl_usdhc3: usdhc3grp {
525		fsl,pins = <
526			MX6QDL_PAD_EIM_A16__GPIO2_IO22	0x1b018
527			MX6QDL_PAD_SD3_RST__GPIO7_IO08	0x1b018
528			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
529			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
530			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
531			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
532			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
533			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
534		>;
535	};
536
537	pinctrl_usdhc4: usdhc4grp {
538		fsl,pins = <
539			MX6QDL_PAD_SD4_CMD__SD4_CMD	0x1f069
540			MX6QDL_PAD_SD4_CLK__SD4_CLK	0x10069
541			MX6QDL_PAD_SD4_DAT0__SD4_DATA0	0x17069
542			MX6QDL_PAD_SD4_DAT1__SD4_DATA1	0x17069
543			MX6QDL_PAD_SD4_DAT2__SD4_DATA2	0x17069
544			MX6QDL_PAD_SD4_DAT3__SD4_DATA3	0x17069
545			MX6QDL_PAD_SD4_DAT4__SD4_DATA4	0x17069
546			MX6QDL_PAD_SD4_DAT5__SD4_DATA5	0x17069
547			MX6QDL_PAD_SD4_DAT6__SD4_DATA6	0x17069
548			MX6QDL_PAD_SD4_DAT7__SD4_DATA7	0x17069
549		>;
550	};
551
552	pinctrl_wdog: wdoggrp {
553		fsl,pins = <
554			MX6QDL_PAD_GPIO_1__WDOG2_B	0x1b0b0
555		>;
556	};
557};
558
559&ipu1_di0_disp0 {
560	remote-endpoint = <&lcd_display_in>;
561};
562
563&pcie {
564	pinctrl-names = "default";
565	pinctrl-0 = <&pinctrl_pcie>;
566	reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
567	vpcie-supply = <&reg_pcie>;
568	status = "disabled";
569};
570
571&pwm1 {
572	pinctrl-names = "default";
573	pinctrl-0 = <&pinctrl_pwm1>;
574	status = "disabled";
575};
576
577&uart1 {
578	pinctrl-names = "default";
579	pinctrl-0 = <&pinctrl_uart1>;
580	status = "okay";
581};
582
583&uart2 {
584	pinctrl-names = "default";
585	pinctrl-0 = <&pinctrl_uart2>;
586	status = "okay";
587};
588
589&usbh1 {
590	pinctrl-names = "default";
591	pinctrl-0 = <&pinctrl_usbh1>;
592	vbus-supply = <&reg_usb_h1_vbus>;
593	over-current-active-low;
594	status = "disabled";
595};
596
597&usbotg {
598	pinctrl-names = "default";
599	pinctrl-0 = <&pinctrl_usbotg>;
600	vbus-supply = <&reg_usb_otg_vbus>;
601	over-current-active-low;
602	srp-disable;
603	hnp-disable;
604	adp-disable;
605	status = "okay";
606};
607
608&usbphy1 {
609	fsl,tx-d-cal = <106>;
610	status = "okay";
611};
612
613&usbphy2 {
614	fsl,tx-d-cal = <109>;
615	status = "disabled";
616};
617
618&usdhc3 {
619	pinctrl-names = "default";
620	pinctrl-0 = <&pinctrl_usdhc3>;
621	bus-width = <4>;
622	cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
623	wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
624	no-1-8-v;
625	keep-power-in-suspend;
626	wakeup-source;
627	vmmc-supply = <&sw2_reg>;
628	status = "disabled";
629};
630
631&usdhc4 {
632	pinctrl-names = "default";
633	pinctrl-0 = <&pinctrl_usdhc4>;
634	bus-width = <8>;
635	non-removable;
636	no-1-8-v;
637	keep-power-in-suspend;
638	vmmc-supply = <&sw2_reg>;
639	status = "okay";
640};
641
642&wdog1 {
643	status = "disabled";
644};
645
646&wdog2 {
647	pinctrl-names = "default";
648	pinctrl-0 = <&pinctrl_wdog>;
649	fsl,ext-reset-output;
650	status = "okay";
651};
652