1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5 */
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16	chosen {
17		stdout-path = &serial_1;
18	};
19
20	firmware@204f000 {
21		compatible = "samsung,secure-firmware";
22		reg = <0x0204F000 0x1000>;
23	};
24
25	gpio_keys: gpio-keys {
26		compatible = "gpio-keys";
27		pinctrl-names = "default";
28		pinctrl-0 = <&gpio_power_key>;
29
30		power-key {
31			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32			linux,code = <KEY_POWER>;
33			label = "power key";
34			debounce-interval = <10>;
35			wakeup-source;
36		};
37	};
38
39	sound: sound {
40		compatible = "hardkernel,odroid-xu4-audio";
41
42		cpu {
43			sound-dai = <&i2s0 0>;
44		};
45
46		codec {
47			sound-dai = <&hdmi>, <&max98090>;
48		};
49	};
50
51	emmc_pwrseq: pwrseq {
52		pinctrl-0 = <&emmc_rstn>;
53		pinctrl-names = "default";
54		compatible = "mmc-pwrseq-emmc";
55		reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
56	};
57
58	fixed-rate-clocks {
59		xxti {
60			compatible = "samsung,clock-xxti";
61			clock-frequency = <0>;
62		};
63
64		xusbxti {
65			compatible = "samsung,clock-xusbxti";
66			clock-frequency = <24000000>;
67		};
68	};
69};
70
71&bus_dmc {
72	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
73	vdd-supply = <&buck1_reg>;
74	status = "okay";
75};
76
77&bus_acp {
78	devfreq = <&bus_dmc>;
79	status = "okay";
80};
81
82&bus_c2c {
83	devfreq = <&bus_dmc>;
84	status = "okay";
85};
86
87&bus_leftbus {
88	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
89	vdd-supply = <&buck3_reg>;
90	status = "okay";
91};
92
93&bus_rightbus {
94	devfreq = <&bus_leftbus>;
95	status = "okay";
96};
97
98&bus_display {
99	devfreq = <&bus_leftbus>;
100	status = "okay";
101};
102
103&bus_fsys {
104	devfreq = <&bus_leftbus>;
105	status = "okay";
106};
107
108&bus_peri {
109	devfreq = <&bus_leftbus>;
110	status = "okay";
111};
112
113&bus_mfc {
114	devfreq = <&bus_leftbus>;
115	status = "okay";
116};
117
118&camera {
119	status = "okay";
120	pinctrl-names = "default";
121	pinctrl-0 = <>;
122};
123
124&clock {
125	clocks = <&clock CLK_XUSBXTI>;
126	assigned-clocks = <&clock CLK_FOUT_EPLL>;
127	assigned-clock-rates = <45158401>;
128};
129
130&clock_audss {
131	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
132			<&clock_audss EXYNOS_MOUT_I2S>,
133			<&clock_audss EXYNOS_DOUT_SRP>,
134			<&clock_audss EXYNOS_DOUT_AUD_BUS>,
135			<&clock_audss EXYNOS_DOUT_I2S>;
136
137	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
138			  <&clock_audss EXYNOS_MOUT_AUDSS>;
139
140	assigned-clock-rates = <0>, <0>,
141			<196608001>,
142			<(196608001 / 2)>,
143			<(196608001 / 8)>;
144};
145
146&cpu0 {
147	cpu0-supply = <&buck2_reg>;
148};
149
150&cpu0_opp_table {
151	opp-1000000000 {
152		opp-suspend;
153	};
154	opp-800000000 {
155		/delete-property/opp-suspend;
156	};
157};
158
159&cpu_thermal {
160	cooling-maps {
161		cooling_map0: map0 {
162			/* Corresponds to 800MHz at freq_table */
163			cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
164					 <&cpu2 7 7>, <&cpu3 7 7>;
165		};
166		cooling_map1: map1 {
167			/* Corresponds to 200MHz at freq_table */
168			cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
169					 <&cpu2 13 13>, <&cpu3 13 13>;
170		};
171	};
172};
173
174&pinctrl_1 {
175	gpio_power_key: power-key-pins {
176		samsung,pins = "gpx1-3";
177		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
178	};
179
180	max77686_irq: max77686-irq-pins {
181		samsung,pins = "gpx3-2";
182		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
183		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
184		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
185	};
186
187	hdmi_hpd: hdmi-hpd-pins {
188		samsung,pins = "gpx3-7";
189		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
190	};
191
192	emmc_rstn: emmc-rstn-pins {
193		samsung,pins = "gpk1-2";
194		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
195	};
196};
197
198&ehci {
199	status = "okay";
200};
201
202&exynos_usbphy {
203	status = "okay";
204};
205
206&fimc_0 {
207	status = "okay";
208	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
209			<&clock CLK_SCLK_FIMC0>;
210	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
211	assigned-clock-rates = <0>, <176000000>;
212};
213
214&fimc_1 {
215	status = "okay";
216	assigned-clocks = <&clock CLK_MOUT_FIMC1>,
217			<&clock CLK_SCLK_FIMC1>;
218	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
219	assigned-clock-rates = <0>, <176000000>;
220};
221
222&fimc_2 {
223	status = "okay";
224	assigned-clocks = <&clock CLK_MOUT_FIMC2>,
225			<&clock CLK_SCLK_FIMC2>;
226	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
227	assigned-clock-rates = <0>, <176000000>;
228};
229
230&fimc_3 {
231	status = "okay";
232	assigned-clocks = <&clock CLK_MOUT_FIMC3>,
233			<&clock CLK_SCLK_FIMC3>;
234	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
235	assigned-clock-rates = <0>, <176000000>;
236};
237
238&gpu {
239	mali-supply = <&buck4_reg>;
240	status = "okay";
241};
242
243&hdmi {
244	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
245	pinctrl-names = "default";
246	pinctrl-0 = <&hdmi_hpd>;
247	vdd-supply = <&ldo8_reg>;
248	vdd_osc-supply = <&ldo10_reg>;
249	vdd_pll-supply = <&ldo8_reg>;
250	ddc = <&i2c_2>;
251	status = "okay";
252};
253
254&hdmicec {
255	status = "okay";
256};
257
258&hsotg {
259	status = "okay";
260	vusb_d-supply = <&ldo15_reg>;
261	vusb_a-supply = <&ldo12_reg>;
262};
263
264&i2c_0 {
265	samsung,i2c-sda-delay = <100>;
266	samsung,i2c-max-bus-freq = <400000>;
267	status = "okay";
268
269	usb3503: usb-hub@8 {
270		compatible = "smsc,usb3503";
271		reg = <0x08>;
272
273		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
274		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
275		reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
276		initial-mode = <1>;
277	};
278
279	max77686: pmic@9 {
280		compatible = "maxim,max77686";
281		interrupt-parent = <&gpx3>;
282		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
283		pinctrl-names = "default";
284		pinctrl-0 = <&max77686_irq>;
285		wakeup-source;
286		reg = <0x09>;
287		#clock-cells = <1>;
288
289		voltage-regulators {
290			ldo1_reg: LDO1 {
291				regulator-name = "VDD_ALIVE_1.0V";
292				regulator-min-microvolt = <1000000>;
293				regulator-max-microvolt = <1000000>;
294				regulator-always-on;
295			};
296
297			ldo2_reg: LDO2 {
298				regulator-name = "VDDQ_M1_2_1.8V";
299				regulator-min-microvolt = <1800000>;
300				regulator-max-microvolt = <1800000>;
301				regulator-always-on;
302			};
303
304			ldo3_reg: LDO3 {
305				regulator-name = "VDDQ_EXT_1.8V";
306				regulator-min-microvolt = <1800000>;
307				regulator-max-microvolt = <1800000>;
308				regulator-always-on;
309			};
310
311			ldo4_reg: LDO4 {
312				regulator-name = "VDDQ_MMC2_2.8V";
313				regulator-min-microvolt = <2800000>;
314				regulator-max-microvolt = <2800000>;
315				regulator-boot-on;
316			};
317
318			ldo5_reg: LDO5 {
319				regulator-name = "VDDQ_MMC1_3_1.8V";
320				regulator-min-microvolt = <1800000>;
321				regulator-max-microvolt = <1800000>;
322				regulator-always-on;
323				regulator-boot-on;
324			};
325
326			ldo6_reg: LDO6 {
327				regulator-name = "VDD10_MPLL_1.0V";
328				regulator-min-microvolt = <1000000>;
329				regulator-max-microvolt = <1000000>;
330				regulator-always-on;
331			};
332
333			ldo7_reg: LDO7 {
334				regulator-name = "VDD10_XPLL_1.0V";
335				regulator-min-microvolt = <1000000>;
336				regulator-max-microvolt = <1000000>;
337				regulator-always-on;
338			};
339
340			ldo8_reg: LDO8 {
341				regulator-name = "VDD10_HDMI_1.0V";
342				regulator-min-microvolt = <1000000>;
343				regulator-max-microvolt = <1000000>;
344			};
345
346			ldo10_reg: LDO10 {
347				regulator-name = "VDDQ_MIPIHSI_1.8V";
348				regulator-min-microvolt = <1800000>;
349				regulator-max-microvolt = <1800000>;
350			};
351
352			ldo11_reg: LDO11 {
353				regulator-name = "VDD18_ABB1_1.8V";
354				regulator-min-microvolt = <1800000>;
355				regulator-max-microvolt = <1800000>;
356				regulator-always-on;
357			};
358
359			ldo12_reg: LDO12 {
360				regulator-name = "VDD33_USB_3.3V";
361				regulator-min-microvolt = <3300000>;
362				regulator-max-microvolt = <3300000>;
363				regulator-always-on;
364				regulator-boot-on;
365			};
366
367			ldo13_reg: LDO13 {
368				regulator-name = "VDDQ_C2C_W_1.8V";
369				regulator-min-microvolt = <1800000>;
370				regulator-max-microvolt = <1800000>;
371				regulator-always-on;
372				regulator-boot-on;
373			};
374
375			ldo14_reg: LDO14 {
376				regulator-name = "VDD18_ABB0_2_1.8V";
377				regulator-min-microvolt = <1800000>;
378				regulator-max-microvolt = <1800000>;
379				regulator-always-on;
380				regulator-boot-on;
381			};
382
383			ldo15_reg: LDO15 {
384				regulator-name = "VDD10_HSIC_1.0V";
385				regulator-min-microvolt = <1000000>;
386				regulator-max-microvolt = <1000000>;
387				regulator-always-on;
388				regulator-boot-on;
389			};
390
391			ldo16_reg: LDO16 {
392				regulator-name = "VDD18_HSIC_1.8V";
393				regulator-min-microvolt = <1800000>;
394				regulator-max-microvolt = <1800000>;
395				regulator-always-on;
396				regulator-boot-on;
397			};
398
399			ldo20_reg: LDO20 {
400				regulator-name = "LDO20_1.8V";
401				regulator-min-microvolt = <1800000>;
402				regulator-max-microvolt = <1800000>;
403			};
404
405			ldo21_reg: LDO21 {
406				regulator-name = "TFLASH_2.8V";
407				regulator-min-microvolt = <2800000>;
408				regulator-max-microvolt = <2800000>;
409				regulator-boot-on;
410			};
411
412			ldo22_reg: LDO22 {
413				/*
414				 * Only U3 uses it, so let it define the
415				 * constraints
416				 */
417				regulator-name = "LDO22";
418				regulator-boot-on;
419			};
420
421			ldo25_reg: LDO25 {
422				regulator-name = "VDDQ_LCD_1.8V";
423				regulator-min-microvolt = <1800000>;
424				regulator-max-microvolt = <1800000>;
425				regulator-always-on;
426				regulator-boot-on;
427			};
428
429			buck1_reg: BUCK1 {
430				regulator-name = "VDD_MIF";
431				regulator-min-microvolt = <900000>;
432				regulator-max-microvolt = <1100000>;
433				regulator-always-on;
434				regulator-boot-on;
435			};
436
437			buck2_reg: BUCK2 {
438				regulator-name = "VDD_ARM";
439				regulator-min-microvolt = <900000>;
440				regulator-max-microvolt = <1350000>;
441				regulator-always-on;
442				regulator-boot-on;
443			};
444
445			buck3_reg: BUCK3 {
446				regulator-name = "VDD_INT";
447				regulator-min-microvolt = <900000>;
448				regulator-max-microvolt = <1050000>;
449				regulator-always-on;
450				regulator-boot-on;
451			};
452
453			buck4_reg: BUCK4 {
454				regulator-name = "VDD_G3D";
455				regulator-min-microvolt = <900000>;
456				regulator-max-microvolt = <1100000>;
457				regulator-microvolt-offset = <50000>;
458			};
459
460			buck5_reg: BUCK5 {
461				regulator-name = "VDDQ_CKEM1_2_1.2V";
462				regulator-min-microvolt = <1200000>;
463				regulator-max-microvolt = <1200000>;
464				regulator-always-on;
465				regulator-boot-on;
466			};
467
468			buck6_reg: BUCK6 {
469				regulator-name = "BUCK6_1.35V";
470				regulator-min-microvolt = <1350000>;
471				regulator-max-microvolt = <1350000>;
472				regulator-always-on;
473				regulator-boot-on;
474			};
475
476			buck7_reg: BUCK7 {
477				regulator-name = "BUCK7_2.0V";
478				regulator-min-microvolt = <2000000>;
479				regulator-max-microvolt = <2000000>;
480				regulator-always-on;
481			};
482
483			buck8_reg: BUCK8 {
484				/*
485				 * Constraints set by specific board: X,
486				 * X2 and U3.
487				 */
488				regulator-name = "BUCK8_2.8V";
489			};
490		};
491	};
492};
493
494&i2c_1 {
495	status = "okay";
496	max98090: audio-codec@10 {
497		compatible = "maxim,max98090";
498		reg = <0x10>;
499		interrupt-parent = <&gpx0>;
500		interrupts = <0 IRQ_TYPE_NONE>;
501		clocks = <&i2s0 CLK_I2S_CDCLK>;
502		clock-names = "mclk";
503		#sound-dai-cells = <0>;
504	};
505};
506
507&i2c_2 {
508	status = "okay";
509};
510
511&i2c_8 {
512	status = "okay";
513};
514
515&i2s0 {
516	pinctrl-0 = <&i2s0_bus>;
517	pinctrl-names = "default";
518	status = "okay";
519	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
520	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
521};
522
523&mixer {
524	status = "okay";
525};
526
527&mshc_0 {
528	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
529	pinctrl-names = "default";
530	vmmc-supply = <&ldo20_reg>;
531	mmc-pwrseq = <&emmc_pwrseq>;
532	status = "okay";
533
534	broken-cd;
535	card-detect-delay = <200>;
536	samsung,dw-mshc-ciu-div = <3>;
537	samsung,dw-mshc-sdr-timing = <2 3>;
538	samsung,dw-mshc-ddr-timing = <1 2>;
539	bus-width = <8>;
540	cap-mmc-highspeed;
541};
542
543&rtc {
544	status = "okay";
545	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
546	clock-names = "rtc", "rtc_src";
547};
548
549&sdhci_2 {
550	bus-width = <4>;
551	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
552	pinctrl-names = "default";
553	vmmc-supply = <&ldo21_reg>;
554	vqmmc-supply = <&ldo4_reg>;
555	cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
556	status = "okay";
557};
558
559&serial_0 {
560	status = "okay";
561};
562
563&serial_1 {
564	status = "okay";
565};
566
567&tmu {
568	vtmu-supply = <&ldo10_reg>;
569	status = "okay";
570};
571